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mediatek: correct MT7986 system timer rate
Port MediaTek commit 6a4c41c41410 ("fix timer inaccurate"), which
corrects the architected timer rate from 13 MHz to 12,986,200 Hz in the
DTS files for both MT7986A and MT7986B.
Upstream mt7986b.dtsi includes mt7986a.dtsi, so add the corrected rate
once to the common timer node. This makes the architected timer driver
override the 13 MHz value reported by firmware through CNTFRQ_EL0 for
both SoC variants.
The resulting 1062 ppm discrepancy exceeds the kernel's 500 ppm NTP
correction limit. This matches reports of sysntpd remaining saturated at
+500 ppm on the GL-MT6000.
Link: https://github.com/mediatek/mtk-openwrt-feeds/commit/6a4c41c41410cd5042ad10c39da6593ba036283c
Link: https://github.com/openwrt/openwrt/issues/24789
Signed-off-by: Andrea Pesaresi <andreapesaresi82@gmail.com>
This commit is contained in:
committed by
Daniel Golle
parent
3b35c7074a
commit
f36067d4e9
+35
@@ -0,0 +1,35 @@
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From d99238733debc1e1e8783f794e88adf5f17820f5 Mon Sep 17 00:00:00 2001
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From: Andrea Pesaresi <andreapesaresi82@gmail.com>
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Date: Sat, 29 Aug 2026 17:06:18 +0200
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Subject: [PATCH] arm64: dts: mediatek: mt7986: correct timer frequency
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The MT7986 architected timer runs at 12,986,200 Hz rather than 13 MHz.
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Firmware reports 13 MHz through CNTFRQ_EL0, causing the system clock to
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run slow by about 1062 ppm. This exceeds the kernel's 500 ppm NTP
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correction limit and leaves clock discipline saturated.
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The corrected rate comes from MediaTek's downstream OpenWrt feed, where
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it is applied to both MT7986A and MT7986B. Since upstream mt7986b.dtsi
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includes mt7986a.dtsi, add it once to the common timer node so the
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architected timer driver uses the actual counter rate.
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Fixes: 50137c150f5f ("arm64: dts: mediatek: add basic mt7986 support")
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Cc: stable@vger.kernel.org
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Link: https://github.com/mediatek/mtk-openwrt-feeds/commit/6a4c41c41410cd5042ad10c39da6593ba036283c
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Link: https://github.com/openwrt/openwrt/issues/24789
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Link: https://lore.kernel.org/r/20260829151955.3661893-1-andreapesaresi82@gmail.com
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Signed-off-by: Andrea Pesaresi <andreapesaresi82@gmail.com>
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---
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arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 +
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1 file changed, 1 insertion(+)
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--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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@@ -661,6 +661,7 @@
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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+ clock-frequency = <12986200>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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