From 33c225f622d596034a9261316666089a92aa6834 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 25 Nov 2024 12:30:06 +0000
Subject: [PATCH] rp1: clk: Only set PLL_SEC_RST in rp1_pll_divider_off

Rather than clearing all the bits in rp1_pll_divider_off
and setting PLL_SEC_RST, retain the status of all the other
bits.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
 drivers/clk/clk-rp1.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--- a/drivers/clk/clk-rp1.c
+++ b/drivers/clk/clk-rp1.c
@@ -927,7 +927,8 @@ static void rp1_pll_divider_off(struct c
 	const struct rp1_pll_data *data = divider->data;
 
 	spin_lock(&clockman->regs_lock);
-	clockman_write(clockman, data->ctrl_reg, PLL_SEC_RST);
+	clockman_write(clockman, data->ctrl_reg,
+		       clockman_read(clockman, data->ctrl_reg) | PLL_SEC_RST);
 	spin_unlock(&clockman->regs_lock);
 }
 
