Matthew Gerlach 24822c4b47 dt-bindings: clock: socfpga: convert to yaml ... Convert the clock device tree bindings to yaml for the Altera SoCFPGA Cyclone5, Arria5, and Arria10 chip families. Since the clock nodes are subnodes to Altera SOCFPGA Clock Manager, the yaml was added to socfpga-clk-manager.yaml. Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>		2025-05-21 18:49:56 +02:00
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socfpga-clk-manager.yaml	dt-bindings: clock: socfpga: convert to yaml	2025-05-21 18:49:56 +02:00
socfpga-sdram-edac.txt	arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support	2015-06-24 18:16:10 +02:00