linux-kernelorg-stable/include/linux/mlx5
Mark Bloch 20d78ead94 net/mlx5: Add balance ID support for LAG multiplane groups
Implement balance ID support for multiplane LAG configurations. This
feature enables per-multiplane group load balancing by extending the
software system image GUID with a balance ID component.

Key implementations:
- Enable lag_per_mp_group capability when supported by hardware.
- Append load_balance_id to software system image GUID when conditions
  are met.
- Increase MLX5_SW_IMAGE_GUID_MAX_BYTES from 8 to 9 to accommodate the
  extra byte.

The balance ID is appended to the system image GUID only when both
load_balance_id and lag_per_mp_group capabilities are available, ensuring
backward compatibility while enabling enhanced LAG functionality.

This enhancement allows for more granular load balancing control in complex
multi-plane LAG deployments, improving network performance and flexibility.

Signed-off-by: Mark Bloch <mbloch@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Reviewed-by: Shay Drori <shayd@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1761211020-925651-6-git-send-email-tariqt@nvidia.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-10-28 11:11:27 +01:00
..
cq.h net/mlx5e: Prepare for using different CQ doorbells 2025-09-17 18:30:40 -07:00
device.h net/mlx5: Add RS FEC histogram infrastructure 2025-09-09 04:18:19 -04:00
doorbell.h
driver.h net/mlx5: Add balance ID support for LAG multiplane groups 2025-10-28 11:11:27 +01:00
eq.h
eswitch.h
fs.h net/mlx5: fs, fix UAF in flow counter release 2025-09-23 17:17:30 -07:00
fs_helpers.h
macsec.h
mlx5_ifc.h net/mlx5: Add PPHCR to PCAM supported registers mask 2025-10-23 07:14:32 -07:00
mlx5_ifc_fpga.h
mlx5_ifc_vdpa.h
mpfs.h
port.h
qp.h net/mlx5e: Prevent WQE metadata conflicts between timestamping and offloads 2025-09-17 04:38:10 -04:00
rsc_dump.h
transobj.h
vport.h {rdma,net}/mlx5: export mlx5_vport_get_vhca_id 2025-08-15 12:17:47 -07:00