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Merge tag 'irq_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

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Pull irq fixes from Borislav Petkov:

 - Remove unnecessary and noisy WARN_ONs in gic-v5's init path

 - Avoid a kmemleak false positive for the gic-v5's L2 IST table entries

 - Fix a retval check in mvebu-gicp's probe function

 - Fix a wrong conversion to guards in atmel-aic[5] irqchip

* tag 'irq_urgent_for_v6.17_rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/gic-v5: Remove undue WARN_ON()s in the IRS affinity parsing
  irqchip/gic-v5: Fix kmemleak L2 IST table entries false positives
  irqchip/mvebu-gicp: Fix an IS_ERR() vs NULL check in probe()
  irqchip/atmel-aic[5]: Fix incorrect lock guard conversion
This commit is contained in:
Linus Torvalds
2025-08-31 09:07:37 -07:00
parent 9acd5b8beb 35c23871be
commit c9e4e96185
4 changed files with 10 additions and 5 deletions
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drivers/irqchip/irq-atmel-aic.c
+1 -1
View File
@@ -188,7 +188,7 @@ static int aic_irq_domain_xlate(struct irq_domain *d,
gc = dgc->gc[idx];
guard(raw_spinlock_irq)(&gc->lock);
guard(raw_spinlock_irqsave)(&gc->lock);
smr = irq_reg_readl(gc, AT91_AIC_SMR(*out_hwirq));
aic_common_set_priority(intspec[2], &smr);
irq_reg_writel(gc, smr, AT91_AIC_SMR(*out_hwirq));
drivers/irqchip/irq-atmel-aic5.c
+1 -1
View File
@@ -279,7 +279,7 @@ static int aic5_irq_domain_xlate(struct irq_domain *d,
if (ret)
return ret;
guard(raw_spinlock_irq)(&bgc->lock);
guard(raw_spinlock_irqsave)(&bgc->lock);
irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR);
smr = irq_reg_readl(bgc, AT91_AIC5_SMR);
aic_common_set_priority(intspec[2], &smr);
drivers/irqchip/irq-gic-v5-irs.c
+7 -2
View File
@@ -5,6 +5,7 @@
#define pr_fmt(fmt) "GICv5 IRS: " fmt
#include <linux/kmemleak.h>
#include <linux/log2.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -117,6 +118,7 @@ static int __init gicv5_irs_init_ist_linear(struct gicv5_irs_chip_data *irs_data
kfree(ist);
return ret;
}
kmemleak_ignore(ist);
return 0;
}
@@ -232,6 +234,7 @@ int gicv5_irs_iste_alloc(const u32 lpi)
kfree(l2ist);
return ret;
}
kmemleak_ignore(l2ist);
/*
* Make sure we invalidate the cache line pulled before the IRS
@@ -623,12 +626,14 @@ static int __init gicv5_irs_of_init_affinity(struct device_node *node,
int cpu;
cpu_node = of_parse_phandle(node, "cpus", i);
if (WARN_ON(!cpu_node))
if (!cpu_node) {
pr_warn(FW_BUG "Erroneous CPU node phandle\n");
continue;
}
cpu = of_cpu_node_to_id(cpu_node);
of_node_put(cpu_node);
if (WARN_ON(cpu < 0))
if (cpu < 0)
continue;
if (iaffids[i] & ~iaffid_mask) {
drivers/irqchip/irq-mvebu-gicp.c
+1 -1
View File
@@ -238,7 +238,7 @@ static int mvebu_gicp_probe(struct platform_device *pdev)
}
base = ioremap(gicp->res->start, resource_size(gicp->res));
if (IS_ERR(base)) {
if (!base) {
dev_err(&pdev->dev, "ioremap() failed. Unable to clear pending interrupts.\n");
} else {
for (i = 0; i < 64; i++)