Zong Li 38caf7a1cc riscv: Get level 3 cache's information ... RISC-V architecture extends the cache information for level 3 cache in AUX vector in Linux v.6.1-rc1. This patch supports sysconf to get the level 3 cache information. Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>		2022-11-09 11:40:59 -03:00
..
bits	…
rv32	Update syscall lists for Linux 5.19	2022-08-02 21:05:07 +00:00
rv64	Update syscall lists for Linux 5.19	2022-08-02 21:05:07 +00:00
sys	…
Implies	…
Makefile	…
Versions	…
atomic-machine.h	…
clone.S	RISC-V: Allow long jumps to __syscall_error	2022-09-16 23:25:45 -04:00
configure	…
configure.ac	…
dl-cache.h	…
flush-icache.c	…
getcontext.S	RISC-V: Allow long jumps to __syscall_error	2022-09-16 23:25:45 -04:00
kernel-features.h	…
ldd-rewrite.sed	…
localplt.data	elf: Rework exception handling in the dynamic loader [BZ #25486]	2022-11-03 09:39:31 +01:00
makecontext.c	…
readelflib.c	elf: Remove ldconfig kernel version check	2022-05-16 15:03:49 -03:00
setcontext.S	RISC-V: Allow long jumps to __syscall_error	2022-09-16 23:25:45 -04:00
shlib-versions	…
sigcontextinfo.h	…
swapcontext.S	RISC-V: Allow long jumps to __syscall_error	2022-09-16 23:25:45 -04:00
syscall.c	…
sysconf.c	riscv: Get level 3 cache's information	2022-11-09 11:40:59 -03:00
sysdep.S	…
sysdep.h	Introduce <pointer_guard.h>, extracted from <sysdep.h>	2022-10-18 17:03:55 +02:00
ucontext-macros.h	…
ucontext_i.sym	…
vfork.S	RISC-V: Allow long jumps to __syscall_error	2022-09-16 23:25:45 -04:00