mirror of git://sourceware.org/git/glibc.git
111 lines
3.5 KiB
C
111 lines
3.5 KiB
C
/* Copyright (C) 1996 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If not,
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write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef _SYS_SERIAL_H
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#define _SYS_SERIAL_H 1
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/* Defines for PC AT serial port. */
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/* Serial port addresses and IRQs. */
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#define PORT_0 0x03F8
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#define PORT_1 0x02F8
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#define IRQ_0 0x04
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#define IRQ_1 0x03
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/* Definitions for INS8250 / 16550 chips. */
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/* Defined as offsets from the port address (data port). */
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#define DAT 0 /* Receive/transmit data. */
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#define ICR 1 /* Interrupt control register. */
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#define ISR 2 /* Interrupt status register. */
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#define LCR 3 /* Line control register. */
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#define MCR 4 /* Modem control register. */
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#define LSR 5 /* Line status register. */
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#define MSR 6 /* Modem status register. */
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#define DLL 0 /* Divisor latch (lsb). */
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#define DLH 1 /* Divisor latch (msb). */
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/* ICR. */
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#define RIEN 0x01 /* Enable receiver interrupt. */
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#define TIEN 0x02 /* Enable transmitter interrupt. */
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#define SIEN 0x04 /* Enable receiver line status interrupt. */
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#define MIEN 0x08 /* Enable modem status interrupt. */
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/* ISR */
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#define FFTMOUT 0x0c /* Fifo rcvr timeout. */
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#define RSTATUS 0x06 /* Change in receiver line status. */
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#define RxRDY 0x04 /* Receiver data available. */
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#define TxRDY 0x02 /* Transmitter holding register empty. */
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#define MSTATUS 0x00 /* Change in modem status. */
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/* LCR 3
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Number of data bits per received/transmitted character. */
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#define RXLEN 0x03
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#define STOP1 0x00
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#define STOP2 0x04
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#define PAREN 0x08
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#define PAREVN 0x10
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#define PARMARK 0x20
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#define SNDBRK 0x40
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#define DLAB 0x80
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/* Baud rate definitions. */
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#define ASY9600 12
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/* Definitions for character length (data bits) in RXLEN field. */
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#define BITS5 0x00
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#define BITS6 0x01
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#define BITS7 0x02
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#define BITS8 0x03
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/* MCR. */
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#define DTR 0x01 /* Bring up DTR. */
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#define RTS 0x02 /* Bring up RTS. */
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#define OUT1 0x04
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#define OUT2 0x08
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#define LOOP 0x10 /* Put chip into loopback state. */
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/* LSR */
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#define RCA 0x01 /* Receive char available. */
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#define OVRRUN 0x02 /* Receive overrun. */
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#define PARERR 0x04 /* Parity error. */
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#define FRMERR 0x08 /* Framing/CRC error. */
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#define BRKDET 0x10 /* Break detected (null char + frame error). */
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#define XHRE 0x20 /* Transmit holding register empty. */
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#define XSRE 0x40 /* Transmit shift register empty. */
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/* MSR */
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#define DCTS 0x01 /* CTS has changed state. */
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#define DDSR 0x02 /* DSR has changed state. */
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#define DRI 0x04 /* RI has changed state. */
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#define DDCD 0x08 /* DCD has changed state. */
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#define CTS 0x10 /* State of CTS. */
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#define DSR 0x20 /* State of DSR. */
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#define RI 0x40 /* State of RI. */
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#define DCD 0x80 /* State of DCD. */
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#define DELTAS(x) ((x) & (DCTS | DDSR | DRI | DDCD))
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#define STATES(x) ((x) (CTS | DSR | RI | DCD))
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#endif /* sys/serial.h */
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