mirror of git://sourceware.org/git/glibc.git
96 lines
3.7 KiB
C
96 lines
3.7 KiB
C
/* Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <stdint.h>
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#include <sysdep.h>
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typedef int8_t atomic8_t;
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typedef uint8_t uatomic8_t;
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typedef int_fast8_t atomic_fast8_t;
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typedef uint_fast8_t uatomic_fast8_t;
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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void __arm_link_error (void);
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#define atomic_exchange_acq(mem, newvalue) \
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({ __typeof (*mem) result; \
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if (sizeof (*mem) == 1) \
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__asm__ __volatile__ ("swpb %0, %1, [%2]" \
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: "=&r,&r" (result) \
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: "r,0" (newvalue), "r,r" (mem) : "memory"); \
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else if (sizeof (*mem) == 4) \
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__asm__ __volatile__ ("swp %0, %1, [%2]" \
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: "=&r,&r" (result) \
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: "r,0" (newvalue), "r,r" (mem) : "memory"); \
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else \
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{ \
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result = 0; \
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abort (); \
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} \
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result; })
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/* Atomic compare and exchange. This sequence relies on the kernel to
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provide a compare and exchange operation which is atomic on the
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current architecture, either via cleverness on pre-ARMv6 or via
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ldrex / strex on ARMv6. */
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#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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/* It doesn't matter what register is used for a_oldval2, but we must
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specify one to work around GCC PR rtl-optimization/21223. Otherwise
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it may cause a_oldval or a_tmp to be moved to a different register. */
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ register __typeof (oldval) a_oldval asm ("r0"); \
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register __typeof (oldval) a_newval asm ("r1") = (newval); \
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register __typeof (mem) a_ptr asm ("r2") = (mem); \
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register __typeof (oldval) a_tmp asm ("r3"); \
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register __typeof (oldval) a_oldval2 asm ("r4") = (oldval); \
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__asm__ __volatile__ \
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("0:\tldr\t%1,[%3]\n\t" \
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"cmp\t%1, %4\n\t" \
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"bne\t1f\n\t" \
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"mov\t%0, %4\n\t" \
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"mov\t%1, #0xffff0fff\n\t" \
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"mov\tlr, pc\n\t" \
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"add\tpc, %1, #(0xffff0fc0 - 0xffff0fff)\n\t" \
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"bcc\t0b\n\t" \
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"mov\t%1, %4\n\t" \
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"1:" \
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: "=&r" (a_oldval), "=&r" (a_tmp) \
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: "r" (a_newval), "r" (a_ptr), "r" (a_oldval2) \
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: "ip", "lr", "cc", "memory"); \
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a_tmp; })
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#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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