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Author SHA1 Message Date
Adhemerval Zanella f779b1efb3 nptl: Implement raise in terms of pthread_kill 
Now that pthread_kill is provided by libc.so it is possible to
implement the generic POSIX implementation as
'pthread_kill(pthread_self(), sig)'.

For Linux implementation, pthread_kill read the targeting TID from
the TCB.  For raise, this it not possible because it would make raise
fail when issue after vfork (where creates the resulting process
has a different TID from the parent, but its TCB is not updated as
for pthread_create).  To make raise use pthread_kill, it is make
usable from vfork by getting the target thread id through gettid
syscall.

Checked on x86_64-linux-gnu and aarch64-linux-gnu.
 2021-06-09 15:16:45 -03:00
Adhemerval Zanella 8c1c0aae20 nptl: Move cancel type out of cancelhandling 
Now that the thread cancellation type is not accessed concurrently
anymore, it is possible to move it out the cancelhandling.

By removing the cancel state out of the internal thread cancel handling
state there is no need to check if cancelled bit was set in CAS
operation.

It allows simplifing the cancellation wrappers and the
CANCEL_CANCELED_AND_ASYNCHRONOUS is removed.

Checked on x86_64-linux-gnu and aarch64-linux-gnu.
 2021-06-09 15:16:45 -03:00
Adhemerval Zanella 2b51742531 nptl: Move cancel state out of cancelhandling 
Now that thread cancellation state is not accessed concurrently anymore,
it is possible to move it out the 'cancelhandling'.

The code is also simplified: CANCELLATION_P is replaced with a
internal pthread_testcancel call and the CANCELSTATE_BIT{MASK} is
removed.

With this behavior pthread_setcancelstate does not require to act on
cancellation if cancel type is asynchronous (is already handled either
by pthread_setcanceltype or by the signal handler).

Checked on x86_64-linux-gnu and aarch64-linux-gnu.
 2021-06-09 15:16:45 -03:00
Florian Weimer 699361795f Remove stale references to libdl.a 
Since commit 0c1c3a771e
("dlfcn: Move dlopen into libc") libdl.a is empty, so linking
against it is no longer necessary.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-09 19:14:02 +02:00
Siddhesh Poyarekar fc5bfade69 iconvdata: Move gconv-modules configuration to gconv-modules.conf 
Move all gconv-modules configuration files to gconv-modules.conf.
That is, the S390 extensions now become gconv-modules-s390.conf.  Move
both configuration files into gconv-modules.d.

Now GCONV_PATH/gconv-modules is read only for backward compatibility
for third-party gconv modules directories.

Reviewed-by: DJ Delorie <dj@redhat.com>
 2021-06-09 09:47:16 +05:30
Wilco Dijkstra 6a86bc0992 AArch64: Add support for roundeven[f] 
Add inline assembler for the roundeven functions.
Passes GLIBC regression.  Note GCC does not inline the builtin (PR100966),
so this cannot be used for now.
 2021-06-08 13:33:09 +01:00
Naohiro Tamura b190bccc8a configure: Replaced obsolete AC_TRY_COMPILE 
This patch replaced obsolete AC_TRY_COMPILE to AC_COMPILE_IFELSE or
AC_PREPROC_IFELSE.
It has been confirmed that GNU 'autoconf' 2.69 suppressed obsolete
warnings, updated the following files:
  - configure
  - sysdeps/mach/configure
  - sysdeps/mach/hurd/configure
  - sysdeps/s390/configure
  - sysdeps/unix/sysv/linux/configure
and didn't change the following files:
  - sysdeps/ieee754/ldbl-opt/configure
  - sysdeps/unix/sysv/linux/powerpc/configure

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-04 10:16:00 -03:00
Adhemerval Zanella 57094e576a libio: Assume _IO_lock_inexpensive 
It is already set by both Linux and Hurd.
 2021-06-04 09:54:52 -03:00
Adhemerval Zanella eaa53d0f77 nptl: Remove exit-thread.h 
No function change.  The code is used only for Linux, besides
being included in generic code.
 2021-06-04 09:52:28 -03:00
Florian Weimer 466c1ea15f dlfcn: Rework static dlopen hooks 
Consolidate all hooks structures into a single one.  There are
no static dlopen ABI concerns because glibc 2.34 already comes
with substantial ABI-incompatible changes in this area.  (Static
dlopen requires the exact same dynamic glibc version that was used
for static linking.)

The new approach uses a pointer to the hooks structure into
_rtld_global_ro and initalizes it in __rtld_static_init.  This avoids
a back-and-forth with various callback functions.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 09:12:05 +02:00
Florian Weimer 6f1c701026 dlfcn: Cleanups after -ldl is no longer required 
This commit removes the ELF constructor and internal variables from
dlfcn/dlfcn.c.  The file now serves the same purpose as
nptl/libpthread-compat.c, so it is renamed to dlfcn/libdl-compat.c.
The use of libdl-shared-only-routines ensures that libdl.a is empty.

This commit adjusts the test suite not to use $(libdl).  The libdl.so
symbolic link is no longer installed.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 09:11:45 +02:00
Florian Weimer 0c1c3a771e dlfcn: Move dlopen into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer add8d7ea01 dlfcn: Move dlvsym into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer 6dfc0207eb dlfcn: Move dlinfo into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer 492560a32e dlfcn: Move dladdr1 into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer 6a1ed32789 dlfcn: Move dlmopen into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer 77f876c0e3 dlfcn: Move dlsym into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

In elf/Makefile, remove the $(libdl) dependency from testobj1.so
because it the unused libdl DSO now causes elf/tst-unused-deps to
fail.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer 602252b553 dlfcn: Move dladdr into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer d8cce17d2a dlfcn: Move dlclose into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-03 08:26:04 +02:00
Florian Weimer a23c28ec0d dlfcn: Move dlerror into libc 
The symbol was moved using scripts/move-symbol-to-libc.py.

There is a minor functionality enhancement: dlerror now sets
errno if it was set as part of the exception.  (This is the result
of using %m in asprintf, to avoid the strerror PLT call.) The
previous errno value upon function return was unpredictable.
Documenting this as a feature is premature; we need to make sure
that the error codes are meaningful when they are set by the dynamic
loader.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-02 09:06:10 +02:00
Florian Weimer c44838ebf8 Add libc ABI extension kludge for baseline-violating libdl symbols 
Some targets have a GLIBC_2.0 baseline for libdl, while using
GLIBC_2.2 for libc.  This means that the generated libc.map file
does not have any version nodes for GLIBC_2.0 or GLIBC_2.1.  However,
moving symbols from libdl into libc needs such version nodes.
(Future symbol moves from librt will need this as well.)

This kludge is only necessary for symbols predating GLIBC_2.2 because
the affected targets use GLIBC_2.2 as the baseline for libc.  Given
the small number and fixed set of affected architectures, no generic
mechanism is implemented, and instead the map file fragment is
hard-coded in scripts/versions.mk.

The compat_symbol macro already emits the appropriate version strings,
so no adjustments are needed there.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-02 07:34:24 +02:00
Florian Weimer 186cd80b1e Add missing symbols to Version files 
Some symbols have explicit versioned_symbol or compat_symbol markers
in the sources, but no corresponding entry in the Versions files.
This presently works because the local: * directive is only applied
to the base version.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-02 07:32:19 +02:00
Florian Weimer 217b6dc298 Fix use of __pthread_attr_copy in mq_notify (bug 27896) 
__pthread_attr_copy can fail and does not initialize the attribute
structure in that case.

If __pthread_attr_copy is never called and there is no allocated
attribute, pthread_attr_destroy should not be called, otherwise
there is a null pointer dereference in rt/tst-mqueue6.

Fixes commit 42d3593505
("Use __pthread_attr_copy in mq_notify (bug 27896)").

Reviewed-by: Siddhesh Poyarekar <siddhesh@sourceware.org>
 2021-06-02 07:12:18 +02:00
Andreas Schwab 42d3593505 Use __pthread_attr_copy in mq_notify (bug 27896) 
Make a deep copy of the pthread attribute object to remove a potential
use-after-free issue.
 2021-06-01 17:12:33 +02:00
Florian Weimer c8a11c5867 stdio-common: Remove _IO_vfwscanf 
The symbol has never been exported, so no compatibility symbol is
needed.  Removing this file prevents ld from creation an exported
symbol in case GLIBC_2_0 expands to a symbol version which
does not have a local: *; directive in the symbol version map file.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-06-01 16:00:52 +02:00
Szabolcs Nagy 3842ba4949 aarch64: align stack in clone [BZ #27939] 
The AArch64 PCS requires 16 byte aligned stack.  Previously if the
caller passed an unaligned stack to clone then the child crashed.

Fixes bug 27939.
 2021-06-01 09:47:48 +01:00
Lucas A. M. Magalhaes a55e2da270 powerpc: Optimized memcmp for power10 
This patch was based on the __memcmp_power8 and the recent
__strlen_power10.

Improvements from __memcmp_power8:

1. Don't need alignment code.

   On POWER10 lxvp and lxvl do not generate alignment interrupts, so
they are safe for use on caching-inhibited memory.  Notice that the
comparison on the main loop will wait for both VSR to be ready.
Therefore aligning one of the input address does not improve
performance.  In order to align both registers a vperm is necessary
which add too much overhead.

2. Uses new POWER10 instructions

   This code uses lxvp to decrease contention on load by loading 32 bytes
per instruction.
   The vextractbm is used to have a smaller tail code for calculating the
return value.

3. Performance improvement

   This version has around 35% better performance on average. I saw no
performance regressions for any length or alignment.

Thanks Matheus for helping me out with some details.

Co-authored-by: Matheus Castanho <msc@linux.ibm.com>
Reviewed-by: Raphael M Zinsly <rzinsly@linux.ibm.com>
 2021-05-31 18:00:20 -03:00
H.J. Lu 92a7d13439 x86-64: Align child stack to 16 bytes [BZ #27902] 
In the x86-64 clone wrapper, align child stack to 16 bytes per the
x86-64 psABI.

Reviewed-by: Carlos O'Donell <carlos@redhat.com>
 2021-05-31 12:03:36 -07:00
Adhemerval Zanella 65ba6fa431 nptl: Move Linux createthread to nptl 
git mv -f sysdeps/unix/sysv/linux/createthread.c nptl/createthread.c

No functional change.
 2021-05-27 13:11:35 -03:00
Naohiro Tamura 4f26956d5b aarch64: Added optimized memset for A64FX 
This patch optimizes the performance of memset for A64FX [1] which
implements ARMv8-A SVE and has L1 64KB cache per core and L2 8MB cache
per NUMA node.

The performance optimization makes use of Scalable Vector Register
with several techniques such as loop unrolling, memory access
alignment, cache zero fill and prefetch.

SVE assembler code for memset is implemented as Vector Length Agnostic
code so theoretically it can be run on any SOC which supports ARMv8-A
SVE standard.

We confirmed that all testcases have been passed by running 'make
check' and 'make xcheck' not only on A64FX but also on ThunderX2.

And also we confirmed that the SVE 512 bit vector register performance
is roughly 4 times better than Advanced SIMD 128 bit register and 8
times better than scalar 64 bit register by running 'make bench'.

[1] https://github.com/fujitsu/A64FX

Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Reviewed-by: Szabolcs Nagy <Szabolcs.Nagy@arm.com>
 2021-05-27 09:47:53 +01:00
Naohiro Tamura fa527f345c aarch64: Added optimized memcpy and memmove for A64FX 
This patch optimizes the performance of memcpy/memmove for A64FX [1]
which implements ARMv8-A SVE and has L1 64KB cache per core and L2 8MB
cache per NUMA node.

The performance optimization makes use of Scalable Vector Register
with several techniques such as loop unrolling, memory access
alignment, cache zero fill, and software pipelining.

SVE assembler code for memcpy/memmove is implemented as Vector Length
Agnostic code so theoretically it can be run on any SOC which supports
ARMv8-A SVE standard.

We confirmed that all testcases have been passed by running 'make
check' and 'make xcheck' not only on A64FX but also on ThunderX2.

And also we confirmed that the SVE 512 bit vector register performance
is roughly 4 times better than Advanced SIMD 128 bit register and 8
times better than scalar 64 bit register by running 'make bench'.

[1] https://github.com/fujitsu/A64FX

Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Reviewed-by: Szabolcs Nagy <Szabolcs.Nagy@arm.com>
 2021-05-27 09:47:53 +01:00
Naohiro Tamura 3856056358 aarch64: Added Vector Length Set test helper script 
This patch is a test helper script to change Vector Length for child
process. This script can be used as test-wrapper for 'make check'.

Usage examples:

~/build$ make check subdirs=string \
test-wrapper='~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 16'

~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 16 \
make test t=string/test-memcpy

~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 32 \
./debugglibc.sh string/test-memmove

~/build$ ~/glibc/sysdeps/unix/sysv/linux/aarch64/vltest.py 64 \
./testrun.sh string/test-memset
 2021-05-26 12:01:06 +01:00
Naohiro Tamura bd4317fbd6 aarch64: define BTI_C and BTI_J macros as NOP unless HAVE_AARCH64_BTI 
This patch defines BTI_C and BTI_J macros conditionally for
performance.
If HAVE_AARCH64_BTI is true, BTI_C and BTI_J are defined as HINT
instruction for ARMv8.5 BTI (Branch Target Identification).
If HAVE_AARCH64_BTI is false, both BTI_C and BTI_J are defined as
NOP.
 2021-05-26 12:01:06 +01:00
Naohiro Tamura 77d175e14e config: Added HAVE_AARCH64_SVE_ASM for aarch64 
This patch checks if assembler supports '-march=armv8.2-a+sve' to
generate SVE code or not, and then define HAVE_AARCH64_SVE_ASM macro.
 2021-05-26 12:01:06 +01:00
Florian Weimer ac0353af81 Linux: Remove remaining references to $(shared-thread-library) 
Since the variable expands to nothing under Linux, it is no longer
necessary to clutter the makefiles with it.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-05-25 11:30:23 +02:00
Florian Weimer 3b638095a5 nptl: Do not install libpthread.so and do not link tests with it 
Keep installing libpthread.a, so that -lpthread works.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-05-25 11:30:23 +02:00
Nicholas Piggin 7de36744ee powerpc: Fix handling of scv return error codes [BZ #27892] 
When using scv for templated ASM syscalls, current code interprets any
negative return value as error, but the only valid error codes are in
the range -4095..-1 according to the ABI.

This commit also fixes 'signal.gen.test' strace test, where the issue
was first identified.

Reviewed-by: Matheus Castanho <msc@linux.ibm.com>
 2021-05-24 17:01:40 -03:00
H.J. Lu 79aec84102 Properly check stack alignment [BZ #27901] 
1. Replace

if ((((uintptr_t) &_d) & (__alignof (double) - 1)) != 0)

which may be optimized out by compiler, with

int
__attribute__ ((weak, noclone, noinline))
is_aligned (void *p, int align)
{
  return (((uintptr_t) p) & (align - 1)) != 0;
}

2. Add TEST_STACK_ALIGN_INIT to TEST_STACK_ALIGN.
3. Add a common TEST_STACK_ALIGN_INIT to check 16-byte stack alignment
for both i386 and x86-64.
4. Update powerpc to use TEST_STACK_ALIGN_INIT.

Reviewed-by: Carlos O'Donell <carlos@redhat.com>
 2021-05-24 07:42:12 -07:00
Noah Goldstein 1b992204f6 x86: Improve memmove-vec-unaligned-erms.S 
This patch changes the condition for copy 4x VEC so that if length is
exactly equal to 4 * VEC_SIZE it will use the 4x VEC case instead of
8x VEC case.

Results For Skylake memcpy-avx2-erms
size, al1 , al2 , Cur T   , New T   , Win , New / Cur
128 , 0   , 0   , 9.137   , 6.873   , New , 75.22
128 , 7   , 0   , 12.933  , 7.732   , New , 59.79
128 , 0   , 7   , 11.852  , 6.76    , New , 57.04
128 , 7   , 7   , 12.587  , 6.808   , New , 54.09

Results For Icelake memcpy-evex-erms
size, al1 , al2 , Cur T   , New T   , Win , New / Cur
128 , 0   , 0   , 9.963   , 5.416   , New , 54.36
128 , 7   , 0   , 16.467  , 8.061   , New , 48.95
128 , 0   , 7   , 14.388  , 7.644   , New , 53.13
128 , 7   , 7   , 14.546  , 7.642   , New , 52.54

Results For Tigerlake memcpy-evex-erms
size, al1 , al2 , Cur T   , New T   , Win , New / Cur
128 , 0   , 0   , 8.979   , 4.95    , New , 55.13
128 , 7   , 0   , 14.245  , 7.122   , New , 50.0
128 , 0   , 7   , 12.668  , 6.675   , New , 52.69
128 , 7   , 7   , 13.042  , 6.802   , New , 52.15

Results For Skylake memmove-avx2-erms
size, al1 , al2 , Cur T   , New T   , Win , New / Cur
128 , 0   , 32  , 6.181   , 5.691   , New , 92.07
128 , 32  , 0   , 6.165   , 5.752   , New , 93.3
128 , 0   , 7   , 13.923  , 9.37    , New , 67.3
128 , 7   , 0   , 12.049  , 10.182  , New , 84.5

Results For Icelake memmove-evex-erms
size, al1 , al2 , Cur T   , New T   , Win , New / Cur
128 , 0   , 32  , 5.479   , 4.889   , New , 89.23
128 , 32  , 0   , 5.127   , 4.911   , New , 95.79
128 , 0   , 7   , 18.885  , 13.547  , New , 71.73
128 , 7   , 0   , 15.565  , 14.436  , New , 92.75

Results For Tigerlake memmove-evex-erms
size, al1 , al2 , Cur T   , New T   , Win , New / Cur
128 , 0   , 32  , 5.275   , 4.815   , New , 91.28
128 , 32  , 0   , 5.376   , 4.565   , New , 84.91
128 , 0   , 7   , 19.426  , 14.273  , New , 73.47
128 , 7   , 0   , 15.924  , 14.951  , New , 93.89

Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
 2021-05-23 22:50:49 -04:00
Florian Weimer 49e182c737 nptl: Remove remaining code from libpthread 
Only the placeholder compatibility symbols are left now.

The __errno_location symbol was removed (moved) using
scripts/move-symbol-to-libc.py.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-05-21 22:35:01 +02:00
Florian Weimer f47f1d91af nptl: Move pthread_create, thrd_create into libc 
The symbols were moved using scripts/move-symbol-to-libc.py.

The libpthread placeholder symbols need some changes because some
symbol versions have gone away completely.  But
__errno_location@@GLIBC_2.0 still exists, so the GLIBC_2.0 version
is still there.

The internal __pthread_create symbol now points to the correct
function, so the sysdeps/nptl/thrd_create.c override is no longer
necessary.

There was an issue how the hidden alias of pthread_getattr_default_np
was defined, so this commit cleans up that aspects and removes the
GLIBC_PRIVATE export altogether.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-05-21 22:35:00 +02:00
Florian Weimer d03511f48f nptl: Eliminate the __static_tls_size, __static_tls_align_m1 variables 
Use the  __nptl_tls_static_size_for_stack inline function instead,
and the GLRO (dl_tls_static_align) value directly.

The computation of GLRO (dl_tls_static_align)  in
_dl_determine_tlsoffset ensures that the alignment is at least
TLS_TCB_ALIGN, which at least STACK_ALIGN (see allocate_stack).
Therefore, the additional rounding-up step is removed.

ALso move the initialization of the default stack size from
__pthread_initialize_minimal_internal to __pthread_early_init.
This introduces an extra system call during single-threaded startup,
but this simplifies the initialization sequence.  No locking is
needed around the writes to __default_pthread_attr because the
process is single-threaded at this point.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 2021-05-21 22:35:00 +02:00
Noah Goldstein 6abf27980a x86: Improve memset-vec-unaligned-erms.S 
No bug. This commit makes a few small improvements to
memset-vec-unaligned-erms.S. The changes are 1) only aligning to 64
instead of 128. Either alignment will perform equally well in a loop
and 128 just increases the odds of having to do an extra iteration
which can be significant overhead for small values. 2) Align some
targets and the loop. 3) Remove an ALU from the alignment process. 4)
Reorder the last 4x VEC so that they are stored after the loop. 5)
Move the condition for leq 8x VEC to before the alignment
process. test-memset and test-wmemset are both passing.

Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
 2021-05-20 17:28:33 -04:00
Florian Weimer f5e196b5a0 Hurd: Define ARCH_MIN_GUARD_SIZE in internal <pthread.h> 
This macro is always defined on Linux.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
 2021-05-20 18:56:57 +02:00
Florian Weimer 1805bf753f s390x: Check HWCAP bits against compiler flags 
When compiled with GCC 11.1 and -march=z14 -O3 build flags, running
ld.so (or any dynamically linked program) prints:

Fatal glibc error: CPU lacks VXE support (z14 or later required)

Co-Authored-By: Stefan Liebler <stli@linux.ibm.com>
Reviewed-by: Stefan Liebler <stli@linux.ibm.com>
 2021-05-19 11:09:57 +02:00
Florian Weimer d337345ce1 powerpc64le: Check HWCAP bits against compiler build flags 
When built with GCC 11.1 and -mcpu=power9, ld.so prints this error
message when running on POWER8:

Fatal glibc error: CPU lacks ISA 3.00 support (POWER9 or later required)
 2021-05-19 11:09:57 +02:00
Florian Weimer eb24865637 elf: Add hook for checking HWCAP bits after auxiliary vector parsing 
Reviewed-by: Stefan Liebler <stli@linux.ibm.com>
 2021-05-19 11:09:57 +02:00
Noah Goldstein 4ad473e97a x86: Optimize memcmp-evex-movbe.S 
No bug. This commit optimizes memcmp-evex.S. The optimizations include
adding a new vec compare path for small sizes, reorganizing the entry
control flow, removing some unnecissary ALU instructions from the main
loop, and most importantly replacing the heavy use of vpcmp + kand
logic with vpxor + vptern. test-memcmp and test-wmemcmp are both
passing.

Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
 2021-05-18 22:57:51 -04:00
Noah Goldstein 16d12015c5 x86: Optimize memcmp-avx2-movbe.S 
No bug. This commit optimizes memcmp-avx2.S. The optimizations include
adding a new vec compare path for small sizes, reorganizing the entry
control flow, and removing some unnecissary ALU instructions from the
main loop. test-memcmp and test-wmemcmp are both passing.

Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
 2021-05-18 22:57:44 -04:00
Adhemerval Zanella 3f500e7202 linux: Fix clock_getres fallback 
The tst-timespec_getres (e5ac7bd679) triggers an issue on 32-bit
architecture on Linux older than 5.1, where the fallback syscall
is used.

Checked on powerpc-linux-gnu.
 2021-05-18 16:59:56 -03:00