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powerpc: fix tst-ucontext-ppc64-vscr test for POWER 5/6. 

An error "impossible register constraint in 'asm'" was raised on POWER
5 and due to __vector __int128_t being used as operands without passing the
option -msvx to gcc.
This patch replaces "__vector __int128_t" with "__vector unsigned int"
which requires only -maltivec, available since POWER ISA 2.03, and which
is already passed to the compiler.

	* sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c:
	(do_test): Changed __vector __int128_t to __vector unsigned int.

Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
This commit is contained in:
Rogerio Alves 2019-01-14 07:53:50 -06:00 committed by Tulio Magno Quites Machado Filho
parent 1a153e47fc
commit 56054664cc
2 changed files with 7 additions and 2 deletions
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5
ChangeLog
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@ -1,3 +1,8 @@
2019-01-15 Rogerio A. Cardoso <rcardoso@linux.ibm.com>
* sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c:
(do_test): Changed __vector __int128_t to __vector unsigned int.
2019-01-14 Leonardo Sandoval <leonardo.sandoval.gonzalez@intel.com>
* sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Add

4
sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
View File

@ -44,8 +44,8 @@ do_test (void)
uint32_t* vscr_ptr = vscr;
uint32_t vscr_word;
ucontext_t ucp;
__vector __int128_t v0 = {0};
__vector __int128_t v1 = {0};
__vector unsigned int v0 = {0};
__vector unsigned int v1 = {0};
/* Set SAT bit in VSCR register. */
asm volatile (".machine push;\n"