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ARM: Make armv6t2 memchr implementation usable without Thumb.

This commit is contained in:
Roland McGrath 2013-03-12 10:03:56 -07:00
parent 47c71d9323
commit 4f510e3aee
2 changed files with 26 additions and 2 deletions
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3
ports/ChangeLog.arm
View File

@ -1,5 +1,8 @@
2013-03-12 Roland McGrath <roland@hack.frob.com> 2013-03-12 Roland McGrath <roland@hack.frob.com>
* sysdeps/arm/armv6t2/memchr.S [NO_THUMB]:
Use .arm rather than .thumb, .thumb_func. Avoid cbz/cnbz instructions.
* sysdeps/arm/armv6t2/memchr.S: Change register allocation so ldrd use * sysdeps/arm/armv6t2/memchr.S: Change register allocation so ldrd use
is r4,r5 rather than r5,r6; this way ARM mode will allow that ldrd. is r4,r5 rather than r5,r6; this way ARM mode will allow that ldrd.

25
ports/sysdeps/arm/armv6t2/memchr.S
View File

@ -42,10 +42,12 @@
.syntax unified .syntax unified
.text .text
#ifdef NO_THUMB
.arm
#else
.thumb .thumb
@ ---------------------------------------------------------------------------
.thumb_func .thumb_func
#endif
.global memchr .global memchr
.type memchr,%function .type memchr,%function
ENTRY(memchr) ENTRY(memchr)
@ -89,14 +91,22 @@ ENTRY(memchr)
15: 15:
ldrd r4,r5, [r0],#8 ldrd r4,r5, [r0],#8
#ifndef NO_THUMB
subs r6, r6, #8 subs r6, r6, #8
#endif
eor r4,r4, r1 @ Get it so that r4,r5 have 00's where the bytes match the target eor r4,r4, r1 @ Get it so that r4,r5 have 00's where the bytes match the target
eor r5,r5, r1 eor r5,r5, r1
uadd8 r4, r4, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0 uadd8 r4, r4, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
sel r4, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION sel r4, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
uadd8 r5, r5, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0 uadd8 r5, r5, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
sel r5, r4, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION sel r5, r4, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
#ifndef NO_THUMB
cbnz r5, 60f cbnz r5, 60f
#else
cmp r5, #0
bne 60f
subs r6, r6, #8
#endif
bne 15b @ (Flags from the subs above) If not run out of bytes then go around again bne 15b @ (Flags from the subs above) If not run out of bytes then go around again
pop {r4,r5,r6,r7} pop {r4,r5,r6,r7}
@ -110,13 +120,24 @@ ENTRY(memchr)
and r2,r2,#7 @ Leave the count remaining as the number after the double words have been done and r2,r2,#7 @ Leave the count remaining as the number after the double words have been done
20: 20:
#ifndef NO_THUMB
cbz r2, 40f @ 0 length or hit the end already then not found cbz r2, 40f @ 0 length or hit the end already then not found
#else
cmp r2, #0
beq 40f
#endif
21: @ Post aligned section, or just a short call 21: @ Post aligned section, or just a short call
ldrb r3,[r0],#1 ldrb r3,[r0],#1
#ifndef NO_THUMB
subs r2,r2,#1 subs r2,r2,#1
eor r3,r3,r1 @ r3 = 0 if match - doesn't break flags from sub eor r3,r3,r1 @ r3 = 0 if match - doesn't break flags from sub
cbz r3, 50f cbz r3, 50f
#else
eors r3, r3, r1
beq 50f
subs r2, r2, #1
#endif
bne 21b @ on r2 flags bne 21b @ on r2 flags
40: 40: