mirror of git://sourceware.org/git/glibc.git
2004-12-15 Steven Munroe <sjmunroe@us.ibm.com>
* sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S: Make no_vmx symbol local. * sysdeps/powerpc/powerpc32/fpu/setjmp-common.S: Make no_vmx symbol local. * sysdeps/powerpc/powerpc64/__longjmp-common.S: Make no_vmx symbol local. * sysdeps/powerpc/powerpc64/setjmp-common.S: Make no_vmx and aligned_save_vmx symbol local.
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@ -50,7 +50,7 @@ ENTRY (BP_SYM (__longjmp))
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lwz r5,_dl_hwcap@l(r5)
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# endif
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andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
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beq no_vmx
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beq L(no_vmx)
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la r5,((JB_VRS)*4)(3)
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andi. r6,r5,0xf
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lwz r0,((JB_VRSAVE)*4)(3)
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@ -78,7 +78,7 @@ ENTRY (BP_SYM (__longjmp))
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load_misaligned_vmx_lo_loaded(v30,v31,v0,r6,r5)
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lvx v1,0,r5
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vperm v31,v31,v1,v0
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b no_vmx
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b L(no_vmx)
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aligned_restore_vmx:
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addi r6,r5,16
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lvx v20,0,r5
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@ -103,7 +103,7 @@ aligned_restore_vmx:
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addi r6,r6,32
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lvx v30,0,r5
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lvx v31,0,r6
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no_vmx:
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L(no_vmx):
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#endif
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lwz r1,(JB_GPR1*4)(r3)
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lwz r0,(JB_LR*4)(r3)
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@ -92,13 +92,13 @@ ENTRY (BP_SYM (__sigsetjmp))
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lwz r5,_dl_hwcap@l(r5)
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#endif
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andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
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beq no_vmx
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beq L(no_vmx)
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la r5,((JB_VRS)*4)(3)
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andi. r6,r5,0xf
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mfspr r0,VRSAVE
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stw r0,((JB_VRSAVE)*4)(3)
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addi r6,r5,16
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beq+ aligned_save_vmx
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beq+ L(aligned_save_vmx)
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lvsr v0,0,r5
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vspltisb v1,-1 /* set v1 to all 1's */
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vspltisb v2,0 /* set v2 to all 0's */
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@ -137,9 +137,9 @@ ENTRY (BP_SYM (__sigsetjmp))
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stvx v5,0,r6
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vsel v4,v31,v4,v3
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stvx v4,0,r5
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b no_vmx
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b L(no_vmx)
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aligned_save_vmx:
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L(aligned_save_vmx):
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stvx 20,0,r5
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addi r5,r5,32
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stvx 21,0,r6
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@ -162,7 +162,7 @@ aligned_save_vmx:
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addi r6,r6,32
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stvx 30,0,r5
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stvx 31,0,r6
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no_vmx:
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L(no_vmx):
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#endif
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b JUMPTARGET (BP_SYM (__sigjmp_save))
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END (BP_SYM (__sigsetjmp))
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@ -53,7 +53,7 @@ ENTRY (BP_SYM (__longjmp))
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ld r5,0(r5) /* Load extern _dl_hwcap. */
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# endif
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andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
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beq no_vmx
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beq L(no_vmx)
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la r5,((JB_VRS)*8)(3)
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andi. r6,r5,0xf
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lwz r0,((JB_VRSAVE)*8)(3)
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@ -81,7 +81,7 @@ ENTRY (BP_SYM (__longjmp))
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load_misaligned_vmx_lo_loaded(v30,v31,v0,r6,r5)
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lvx v1,0,r5
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vperm v31,v31,v1,v0
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b no_vmx
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b L(no_vmx)
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aligned_restore_vmx:
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addi r6,r5,16
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lvx v20,0,r5
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@ -106,7 +106,7 @@ aligned_restore_vmx:
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addi r6,r6,32
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lvx v30,0,r5
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lvx v31,0,r6
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no_vmx:
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L(no_vmx):
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#endif
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ld r1,(JB_GPR1*8)(r3)
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ld r2,(JB_GPR2*8)(r3)
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@ -102,13 +102,13 @@ JUMPTARGET(GLUE(__sigsetjmp,_ent)):
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ld r5,0(r5) /* Load extern _dl_hwcap. */
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# endif
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andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16)
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beq no_vmx
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beq L(no_vmx)
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la r5,((JB_VRS)*8)(3)
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andi. r6,r5,0xf
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mfspr r0,VRSAVE
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stw r0,((JB_VRSAVE)*8)(3)
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addi r6,r5,16
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beq+ aligned_save_vmx
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beq+ L(aligned_save_vmx)
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lvsr v0,0,r5
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vspltisb v1,-1 /* set v1 to all 1's */
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vspltisb v2,0 /* set v2 to all 0's */
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@ -150,9 +150,9 @@ JUMPTARGET(GLUE(__sigsetjmp,_ent)):
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stvx v5,0,r6
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vsel v4,v31,v4,v3
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stvx v4,0,r5
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b no_vmx
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b L(no_vmx)
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aligned_save_vmx:
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L(aligned_save_vmx):
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stvx 20,0,r5
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addi r5,r5,32
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stvx 21,0,r6
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@ -175,7 +175,7 @@ aligned_save_vmx:
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addi r6,r6,32
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stvx 30,0,r5
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stvx 31,0,r6
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no_vmx:
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L(no_vmx):
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#endif
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b JUMPTARGET (BP_SYM (__sigjmp_save))
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END (BP_SYM (__sigsetjmp))
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