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x86: Align entry for memrchr to 64-bytes. 

The function was tuned around 64-byte entry alignment and performs
better for all sizes with it.

As well different code boths where explicitly written to touch the
minimum number of cache line i.e sizes <= 32 touch only the entry
cache line.
This commit is contained in:
Noah Goldstein 2022-06-24 09:42:12 -07:00
parent dbb0f06cc0
commit 227afaa672
1 changed files with 1 additions and 1 deletions
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2
sysdeps/x86_64/multiarch/memrchr-avx2.S
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@ -35,7 +35,7 @@
# define VEC_SIZE 32
# define PAGE_SIZE 4096
.section SECTION(.text), "ax", @progbits
ENTRY(MEMRCHR)
ENTRY_P2ALIGN(MEMRCHR, 6)
# ifdef __ILP32__
/* Clear upper bits. */
and %RDX_LP, %RDX_LP