Stop powerpc copysignl raising "invalid" for sNaN argument (bug 20718).

The powerpc (hard-float) implementations of copysignl, both 32-bit and
64-bit, raise spurious "invalid" exceptions when the first argument is
a signaling NaN.  copysign functions should never raise exceptions
even for signaling NaNs.

The problem is the use of an fcmpu instruction to test the sign of the
high part of the long double argument.  This patch fixes the functions
to use fsel instead (as used for fabsl following my fixes for a
similar bug there), or to examine the integer representation for older
32-bit processors without fsel.

Tested for powerpc64 and powerpc32 (configurations with and without
fsel used).

	[BZ #20718]
	* sysdeps/powerpc/powerpc32/fpu/s_copysignl.S (__copysignl): Do
	not use floating-point comparisons to test sign.
	* sysdeps/powerpc/powerpc64/fpu/s_copysignl.S (__copysignl):
	Likewise.

ChangeLog

@@ -1,5 +1,11 @@
 2016-10-19  Joseph Myers  <joseph@codesourcery.com>
 
+	[BZ #20718]
+	* sysdeps/powerpc/powerpc32/fpu/s_copysignl.S (__copysignl): Do
+	not use floating-point comparisons to test sign.
+	* sysdeps/powerpc/powerpc64/fpu/s_copysignl.S (__copysignl):
+	Likewise.
+
 	* math/bits/mathcalls.h [__GLIBC_USE (IEC_60559_BFP_EXT)]
 	(getpayload): New declaration.
 	* math/Versions (getpayload): New libm symbol at version

sysdeps/powerpc/powerpc32/fpu/s_copysignl.S

@@ -24,22 +24,39 @@ ENTRY(__copysignl)
 /* long double [f1,f2] copysign (long double [f1,f2] x, long double [f3,f4] y);
    copysign(x,y) returns a value with the magnitude of x and
    with the sign bit of y.  */
+#ifdef _ARCH_PPCGR
+	/* fsel available.  */
 	stwu	r1,-16(r1)
 	cfi_adjust_cfa_offset (16)
 	stfd	fp3,8(r1)
 	fmr	fp0,fp1
 	fabs	fp1,fp1
-	fcmpu	cr7,fp0,fp1
 	lwz	r3,8+HIWORD(r1)
 	cmpwi	cr6,r3,0
 	addi	r1,r1,16
 	cfi_adjust_cfa_offset (-16)
-	beq	cr7,L(0)
+	fneg	fp3,fp2
-	fneg	fp2,fp2
+	fsel	fp2,fp0,fp2,fp3
-L(0):	bgelr	cr6
+	bgelr	cr6
 	fneg	fp1,fp1
 	fneg	fp2,fp2
 	blr
+#else
+	stwu	r1,-32(r1)
+	cfi_adjust_cfa_offset (32)
+	stfd	fp3,8(r1)
+	stfd	fp1,16(r1)
+	lwz	r3,8+HIWORD(r1)
+	lwz	r4,16+HIWORD(r1)
+	xor	r3,r3,r4
+	cmpwi	cr6,r3,0
+	addi	r1,r1,32
+	cfi_adjust_cfa_offset (-32)
+	bgelr	cr6
+	fneg	fp1,fp1
+	fneg	fp2,fp2
+	blr
+#endif
 END (__copysignl)
 
 #if IS_IN (libm)

sysdeps/powerpc/powerpc64/fpu/s_copysignl.S

@@ -30,16 +30,14 @@ ENTRY(__copysignl)
 	blt     L(0)
 	fmr	fp0,fp1
 	fabs	fp1,fp1
-	fcmpu	cr1,fp0,fp1
+	fneg	fp3,fp2
-	beqlr	cr1
+	fsel	fp2,fp0,fp2,fp3
-	fneg	fp2,fp2
 	blr
 L(0):
 	fmr	fp0,fp1
 	fnabs   fp1,fp1
-	fcmpu	cr1,fp0,fp1
+	fneg	fp3,fp2
-	beqlr	cr1
+	fsel	fp2,fp0,fp3,fp2
-	fneg	fp2,fp2
 	blr
 END (__copysignl)