mirror of git://sourceware.org/git/glibc.git
75 lines
2.5 KiB
C
75 lines
2.5 KiB
C
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/* RISC-V architecture probe interface
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef _SYS_HWPROBE_H
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#define _SYS_HWPROBE_H 1
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#include <features.h>
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#include <stddef.h>
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#ifdef __has_include
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# if __has_include (<asm/hwprobe.h>)
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# include <asm/hwprobe.h>
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# endif
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#endif
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/* Define a (probably stale) version of the interface if the Linux headers
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aren't present. */
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#ifndef RISCV_HWPROBE_KEY_MVENDORID
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struct riscv_hwprobe {
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signed long long int key;
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unsigned long long int value;
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};
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#define RISCV_HWPROBE_KEY_MVENDORID 0
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#define RISCV_HWPROBE_KEY_MARCHID 1
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#define RISCV_HWPROBE_KEY_MIMPID 2
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#define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3
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#define RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
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#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
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#define RISCV_HWPROBE_IMA_FD (1 << 0)
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#define RISCV_HWPROBE_IMA_C (1 << 1)
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#define RISCV_HWPROBE_IMA_V (1 << 2)
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#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
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#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
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#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
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#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6)
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#define RISCV_HWPROBE_KEY_CPUPERF_0 5
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#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
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#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
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#define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0)
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#define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0)
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#define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0)
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#define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0)
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#define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6
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#endif /* RISCV_HWPROBE_KEY_MVENDORID */
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__BEGIN_DECLS
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extern int __riscv_hwprobe (struct riscv_hwprobe *__pairs, size_t __pair_count,
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size_t __cpu_count, unsigned long int *__cpus,
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unsigned int __flags)
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__nonnull ((1)) __wur
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__fortified_attr_access (__read_write__, 1, 2)
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__fortified_attr_access (__read_only__, 4, 3);
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__END_DECLS
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#endif /* sys/hwprobe.h */
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