523 lines
14 KiB
Rust
523 lines
14 KiB
Rust
// SPDX-License-Identifier: MPL-2.0
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use alloc::{
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format,
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string::{String, ToString},
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vec::Vec,
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};
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use ostd::{
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cpu::{cpuid, CpuException, CpuExceptionInfo, RawGeneralRegs, UserContext},
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Pod,
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};
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use crate::{cpu::LinuxAbi, thread::exception::PageFaultInfo, vm::perms::VmPerms};
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impl LinuxAbi for UserContext {
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fn syscall_num(&self) -> usize {
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self.rax()
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}
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fn syscall_ret(&self) -> usize {
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self.rax()
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}
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fn set_syscall_ret(&mut self, ret: usize) {
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self.set_rax(ret);
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}
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fn syscall_args(&self) -> [usize; 6] {
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[
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self.rdi(),
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self.rsi(),
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self.rdx(),
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self.r10(),
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self.r8(),
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self.r9(),
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]
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}
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fn set_tls_pointer(&mut self, tls: usize) {
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self.set_fsbase(tls);
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}
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fn tls_pointer(&self) -> usize {
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self.fsbase()
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}
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}
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/// General-purpose registers.
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#[derive(Debug, Clone, Copy, Pod, Default)]
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#[repr(C)]
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pub struct GpRegs {
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pub rax: usize,
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pub rbx: usize,
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pub rcx: usize,
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pub rdx: usize,
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pub rsi: usize,
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pub rdi: usize,
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pub rbp: usize,
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pub rsp: usize,
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pub r8: usize,
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pub r9: usize,
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pub r10: usize,
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pub r11: usize,
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pub r12: usize,
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pub r13: usize,
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pub r14: usize,
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pub r15: usize,
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pub rip: usize,
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pub rflags: usize,
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pub fsbase: usize,
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pub gsbase: usize,
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}
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macro_rules! copy_gp_regs {
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($src: ident, $dst: ident) => {
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$dst.rax = $src.rax;
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$dst.rbx = $src.rbx;
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$dst.rcx = $src.rcx;
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$dst.rdx = $src.rdx;
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$dst.rsi = $src.rsi;
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$dst.rdi = $src.rdi;
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$dst.rbp = $src.rbp;
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$dst.rsp = $src.rsp;
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$dst.r8 = $src.r8;
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$dst.r9 = $src.r9;
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$dst.r10 = $src.r10;
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$dst.r11 = $src.r11;
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$dst.r12 = $src.r12;
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$dst.r13 = $src.r13;
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$dst.r14 = $src.r14;
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$dst.r15 = $src.r15;
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$dst.rip = $src.rip;
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$dst.rflags = $src.rflags;
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$dst.fsbase = $src.fsbase;
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$dst.gsbase = $src.gsbase;
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};
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}
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impl GpRegs {
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pub fn copy_to_raw(&self, dst: &mut RawGeneralRegs) {
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copy_gp_regs!(self, dst);
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}
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pub fn copy_from_raw(&mut self, src: &RawGeneralRegs) {
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copy_gp_regs!(src, self);
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}
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}
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impl TryFrom<&CpuExceptionInfo> for PageFaultInfo {
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// [`Err`] indicates that the [`CpuExceptionInfo`] is not a page fault,
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// with no additional error information.
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type Error = ();
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fn try_from(value: &CpuExceptionInfo) -> Result<Self, ()> {
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if value.cpu_exception() != CpuException::PAGE_FAULT {
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return Err(());
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}
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const WRITE_ACCESS_MASK: usize = 0x1 << 1;
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const INSTRUCTION_FETCH_MASK: usize = 0x1 << 4;
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let required_perms = if value.error_code & INSTRUCTION_FETCH_MASK != 0 {
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VmPerms::EXEC
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} else if value.error_code & WRITE_ACCESS_MASK != 0 {
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VmPerms::WRITE
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} else {
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VmPerms::READ
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};
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Ok(PageFaultInfo {
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address: value.page_fault_addr,
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required_perms,
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})
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}
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}
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/// CPU Information structure
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///
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/// Reference:
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/// - https://www.felixcloutier.com/x86/cpuid
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///
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/// FIXME: The crate x86 works not well on AMD CPUs, so some information may be missing.
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pub struct CpuInfo {
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processor: u32,
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vendor_id: String,
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cpu_family: u32,
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model: u32,
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model_name: String,
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stepping: u32,
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microcode: u32,
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cpu_mhz: u32,
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cache_size: u32,
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tlb_size: u32,
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physical_id: u32,
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siblings: u32,
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core_id: u32,
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cpu_cores: u32,
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apicid: u32,
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initial_apicid: u32,
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cpuid_level: u32,
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flags: String,
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bugs: String,
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clflush_size: u8,
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cache_alignment: u32,
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address_sizes: String,
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power_management: String,
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}
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impl CpuInfo {
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pub fn new(processor_id: u32) -> Self {
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Self {
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processor: processor_id,
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vendor_id: Self::get_vendor_id(),
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cpu_family: Self::get_cpu_family(),
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model: Self::get_model(),
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model_name: Self::get_model_name(),
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stepping: Self::get_stepping(),
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microcode: Self::get_microcode(),
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cpu_mhz: Self::get_clock_speed().unwrap_or(0),
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cache_size: Self::get_cache_size().unwrap_or(0),
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tlb_size: Self::get_tlb_size().unwrap_or(0),
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physical_id: Self::get_physical_id().unwrap_or(0),
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siblings: Self::get_siblings_count().unwrap_or(0),
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core_id: Self::get_core_id(),
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cpu_cores: Self::get_cpu_cores(),
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apicid: Self::get_apicid(),
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initial_apicid: Self::get_initial_apicid(),
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cpuid_level: Self::get_cpuid_level(),
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flags: Self::get_cpu_flags(),
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bugs: Self::get_cpu_bugs(),
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// bogomips: Self::get_bogomips(),
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clflush_size: Self::get_clflush_size(),
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cache_alignment: Self::get_cache_alignment(),
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address_sizes: Self::get_address_sizes(),
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power_management: Self::get_power_management(),
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}
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}
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/// Collect and format CPU information into a `String`
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pub fn collect_cpu_info(&self) -> String {
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format!(
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"processor\t: {}\n\
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vendor_id\t: {}\n\
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cpu family\t: {}\n\
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model\t\t: {}\n\
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model name\t: {}\n\
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stepping\t: {}\n\
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microcode\t: 0x{:x}\n\
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cpu MHz\t\t: {}\n\
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cache size\t: {} KB\n\
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TLB size\t: {} 4K pages\n\
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physical id\t: {}\n\
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siblings\t: {}\n\
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core id\t\t: {}\n\
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cpu cores\t: {}\n\
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apicid\t\t: {}\n\
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initial apicid\t: {}\n\
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cpuid level\t: {}\n\
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flags\t\t: {}\n\
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bugs\t\t: {}\n\
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clflush size\t: {} bytes\n\
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cache_alignment\t: {} bytes\n\
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address sizes\t: {}\n\
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power management: {}\n",
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self.processor,
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self.vendor_id,
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self.cpu_family,
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self.model,
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self.model_name,
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self.stepping,
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self.microcode,
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self.cpu_mhz,
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self.cache_size / 1024,
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self.tlb_size,
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self.physical_id,
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self.siblings,
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self.core_id,
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self.cpu_cores,
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self.apicid,
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self.initial_apicid,
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self.cpuid_level,
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self.flags,
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self.bugs,
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self.clflush_size,
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self.cache_alignment,
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self.address_sizes,
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self.power_management
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)
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}
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fn get_vendor_id() -> String {
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let cpuid = cpuid::CpuId::new();
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cpuid.get_vendor_info().unwrap().to_string()
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}
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fn get_cpu_family() -> u32 {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info().unwrap();
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feature_info.family_id().into()
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}
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fn get_model() -> u32 {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info().unwrap();
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feature_info.model_id().into()
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}
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fn get_stepping() -> u32 {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info().unwrap();
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feature_info.stepping_id().into()
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}
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fn get_model_name() -> String {
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let cpuid = cpuid::CpuId::new();
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let brand_string = cpuid.get_processor_brand_string().unwrap();
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brand_string.as_str().to_string()
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}
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fn get_microcode() -> u32 {
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let cpuid = cpuid::cpuid!(0x1);
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cpuid.ecx
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}
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fn get_clock_speed() -> Option<u32> {
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let cpuid = cpuid::CpuId::new();
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let tsc_info = cpuid.get_tsc_info()?;
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Some(
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(tsc_info.tsc_frequency().unwrap_or(0) / 1_000_000)
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.try_into()
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.unwrap(),
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)
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}
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/// Get cache size in KB
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fn get_cache_size() -> Option<u32> {
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let cpuid = cpuid::CpuId::new();
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let cache_info = cpuid.get_cache_info()?;
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for cache in cache_info {
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let desc = cache.desc();
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if let Some(size) = desc.split_whitespace().find(|word| {
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word.ends_with("KBytes") || word.ends_with("MBytes") || word.ends_with("GBytes")
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}) {
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let size_str = size
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.trim_end_matches(&['K', 'M', 'G'][..])
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.trim_end_matches("Bytes");
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let cache_size = size_str.parse::<u32>().unwrap_or(0);
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let cache_size = match size.chars().last().unwrap() {
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'K' => cache_size * 1024,
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'M' => cache_size * 1024 * 1024,
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'G' => cache_size * 1024 * 1024 * 1024,
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_ => cache_size,
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};
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return Some(cache_size);
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}
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}
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None
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}
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fn get_tlb_size() -> Option<u32> {
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let cpuid = cpuid::CpuId::new();
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let cache_info = cpuid.get_cache_info()?;
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for cache in cache_info {
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let desc = cache.desc();
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if let Some(size) = desc.split_whitespace().find(|word| word.ends_with("pages")) {
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let size_str = size.trim_end_matches("pages");
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let tlb_size = size_str.parse::<u32>().unwrap_or(0);
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return Some(tlb_size);
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}
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}
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None
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}
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fn get_physical_id() -> Option<u32> {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info()?;
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Some(feature_info.initial_local_apic_id().into())
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}
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fn get_siblings_count() -> Option<u32> {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info()?;
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Some(feature_info.max_logical_processor_ids().into())
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}
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fn get_core_id() -> u32 {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info().unwrap();
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feature_info.initial_local_apic_id().into()
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}
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fn get_cpu_cores() -> u32 {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info().unwrap();
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feature_info.max_logical_processor_ids().into()
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}
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fn get_apicid() -> u32 {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info().unwrap();
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feature_info.initial_local_apic_id().into()
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}
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fn get_initial_apicid() -> u32 {
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Self::get_apicid()
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}
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fn get_cpuid_level() -> u32 {
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let cpuid = cpuid::CpuId::new();
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if let Some(basic_info) = cpuid.get_tsc_info() {
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basic_info.denominator()
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} else {
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0
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}
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}
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fn get_cpu_flags() -> String {
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let cpuid = cpuid::CpuId::new();
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let feature_info = cpuid.get_feature_info().unwrap();
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let mut flags = Vec::new();
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if feature_info.has_fpu() {
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flags.push("fpu");
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}
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if feature_info.has_vme() {
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flags.push("vme");
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}
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if feature_info.has_de() {
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flags.push("de");
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}
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if feature_info.has_pse() {
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flags.push("pse");
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}
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if feature_info.has_tsc() {
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flags.push("tsc");
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}
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if feature_info.has_msr() {
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flags.push("msr");
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}
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if feature_info.has_pae() {
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flags.push("pae");
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}
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if feature_info.has_mce() {
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flags.push("mce");
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}
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if feature_info.has_cmpxchg8b() {
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flags.push("cx8");
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}
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if feature_info.has_apic() {
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flags.push("apic");
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}
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if feature_info.has_de() {
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flags.push("sep");
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}
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if feature_info.has_mtrr() {
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flags.push("mtrr");
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}
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if feature_info.has_pge() {
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flags.push("pge");
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}
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if feature_info.has_mca() {
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flags.push("mca");
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}
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if feature_info.has_cmov() {
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flags.push("cmov");
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}
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if feature_info.has_pat() {
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flags.push("pat");
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}
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if feature_info.has_pse36() {
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flags.push("pse-36");
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}
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if feature_info.has_psn() {
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flags.push("psn");
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}
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if feature_info.has_clflush() {
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flags.push("clfsh");
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}
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if feature_info.has_ds() {
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flags.push("ds");
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}
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if feature_info.has_acpi() {
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flags.push("acpi");
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}
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if feature_info.has_mmx() {
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flags.push("mmx");
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}
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if feature_info.has_ds() {
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flags.push("fxsr");
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}
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if feature_info.has_sse() {
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flags.push("sse");
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}
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if feature_info.has_sse2() {
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flags.push("sse2");
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}
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if feature_info.has_ss() {
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flags.push("ss");
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}
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if feature_info.has_htt() {
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flags.push("ht");
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}
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if feature_info.has_tm() {
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flags.push("tm");
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}
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if feature_info.has_pbe() {
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flags.push("pbe");
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}
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flags.join(" ")
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}
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// FIXME: https://github.com/torvalds/linux/blob/master/tools/arch/x86/include/asm/cpufeatures.h#L505
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fn get_cpu_bugs() -> String {
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" ".to_string()
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}
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fn get_clflush_size() -> u8 {
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let cpuid = cpuid::CpuId::new();
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cpuid.get_feature_info().unwrap().cflush_cache_line_size()
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}
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fn get_cache_alignment() -> u32 {
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let cpuid = cpuid::CpuId::new();
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if let Some(cache_info) = cpuid.get_cache_info() {
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for cache in cache_info {
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let desc = cache.desc();
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if let Some(alignment) = desc
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.split_whitespace()
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.find(|word| word.ends_with("byte line size"))
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{
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let alignment_str = alignment.trim_end_matches(" byte line size");
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if let Ok(alignment) = alignment_str.parse::<u32>() {
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return alignment;
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}
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}
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}
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}
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64
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}
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fn get_address_sizes() -> String {
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let leaf = cpuid::cpuid!(0x80000008); // Extended Function CPUID Information
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let physical_address_bits = (leaf.eax & 0xFF) as u32;
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let virtual_address_bits = ((leaf.eax >> 8) & 0xFF) as u32;
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format!(
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"{} bits physical, {} bits virtual",
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physical_address_bits, virtual_address_bits
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)
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}
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// FIXME: add power management information
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fn get_power_management() -> String {
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" ".to_string()
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}
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}
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