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2957 Commits

Author SHA1 Message Date
Chen Chengjun cdeb9ec5fd Add tests for cgroup process management 2025-11-07 11:47:23 +08:00
Chen Chengjun b17602693a Add /proc/[pid]/cgroup 2025-11-07 11:47:23 +08:00
Chen Chengjun 77fb73bdd7 Enable the process management for cgroup 2025-11-07 11:47:23 +08:00
Chen Chengjun cda06613f0 Revise the content of root field for the mountinfo file 2025-11-07 11:44:04 +08:00
Wang Siyuan e336882eee Do not drop `Arc<dyn FileLike>` in an incorrect context 2025-11-06 20:24:25 +08:00
Hang Shu e27b16ec4b Remove IntervalSet::find_one unreachable code 2025-11-06 19:36:12 +08:00
Ruihan Li 0fb306e0af Enhance related regression tests 2025-11-06 15:41:13 +08:00
Ruihan Li 0bff86582a Handle TID events in procfs 2025-11-06 15:41:13 +08:00
Ruihan Li 9171a0d13f Correct `main_thread()` usages in procfs 2025-11-06 15:41:13 +08:00
Ruihan Li 2d01804d19 Correct lock usages in procfs 2025-11-06 15:41:13 +08:00
Ruihan Li 4e0142b176 Resolve some minor issues 2025-11-06 15:41:13 +08:00
Ruihan Li d447fe0ca8 Update APICs' MMIO region sizes 2025-11-05 22:48:40 +08:00
Wang Siyuan ff021e0b89 Make `memfd` a sub module of `ramfs` 2025-11-04 13:02:06 +08:00
Wang Siyuan 6ba1a84ae9 Support sealing memfd files 2025-11-04 13:02:06 +08:00
Wang Siyuan d1506171d2 Count writable mappings of each MemfdInode's VMO 
The "writable mappings" refers to shared mappings that may include the `PROT_WRITE` permission.
 2025-11-04 13:02:06 +08:00
Wang Siyuan 7aa6a47612 Add `MemfdInode` 2025-11-04 13:02:06 +08:00
jiangjianfeng 6e8dac0c36 Refactor the implementation of signalfd 2025-11-04 11:56:13 +08:00
jiangjianfeng d2b88f48ff Refactor the implementation of kill process 2025-11-04 11:56:13 +08:00
jiangjianfeng 00c79732e6 Re-introduce the process-wide sigqueues 2025-11-04 11:56:13 +08:00
jiangjianfeng c7058c7233 Add regression test for signalfd 2025-11-04 11:56:13 +08:00
Chen Chengjun 9b0b445e4a Enable some mount givsor tests 2025-11-03 15:56:05 +08:00
Chen Chengjun 6f8877f252 Rename some variables and let src_name_addr can be NULL for some mount operations 2025-11-03 15:56:05 +08:00
Chen Chengjun 1ef7a1a11b Enable some pipe gvisor tests 2025-11-03 09:57:48 +08:00
Chen Chengjun d66dbdd3bc Revise some error numbers and messages 2025-11-03 09:57:48 +08:00
Chen Chengjun d42b006e1a Refactor named pipe to correct its opening and blocking behaviors 2025-11-03 09:57:48 +08:00
Chen Chengjun 5eddf21596 Introduce open API for Inode trait to replace as_* APIs 2025-11-03 09:57:48 +08:00
Chen Chengjun 4fe8554d63 Decouple PipeReader/Writer with status flags 2025-11-03 09:57:48 +08:00
Chen Chengjun b447a605ed Introduce PerMountFlags and support MS_REMOUNT 2025-11-02 21:24:50 +08:00
Chen Chengjun 498c2f3c91 Make FsFlags consistent with Linux's super block flags 2025-11-02 21:24:50 +08:00
Zhang Junyang 3b4569e14d Add RISC-V SMP boot entrypoint 2025-11-02 21:23:32 +08:00
Chen Chengjun c77edbace8 Provide mem_unit and procs in sysinfo 2025-11-02 14:09:55 +08:00
Hsy-Intel 63efd4891b Fix Linux TDX network performance by unifying virtio-net-pci parameters 2025-10-31 13:47:38 +08:00
Tao Su 31cb7433eb Hardcode qemu args to add `quote-generation-socket` 2025-10-31 08:53:27 +08:00
Tao Su 73cd7e0c02 Add generate_tdx_quote test 2025-10-31 08:53:27 +08:00
Tao Su eb4edd25e8 Add TSM module 2025-10-31 08:53:27 +08:00
Zejun Zhao 31e352dc6b Add some riscv64 CI 2025-10-31 08:52:34 +08:00
Zejun Zhao 1f8fb13cb4 Enable svpbmt extension for riscv64 by default 2025-10-31 08:52:34 +08:00
Zejun Zhao 431b6fdff7 Make riscv64's `PageTableEntry::set_prop` recognize A/D bit 2025-10-31 08:52:34 +08:00
Ruihan Li 9c70ac0f0a Mark `sync_dma_range` as `unsafe` 2025-10-30 17:04:45 +08:00
Ruihan Li d487e42b7c Reunify the style of defining `arch` modules 2025-10-30 17:04:45 +08:00
Zejun Zhao 35720de928 Add sifive_u SCHEME 2025-10-30 14:51:37 +08:00
Zejun Zhao 6af524b451 Support RISC-V Sv39 Paging mode 2025-10-30 14:51:37 +08:00
Zejun Zhao ff84f60489 Add .ex_table section on loongarch64 platforms 2025-10-30 11:27:08 +08:00
Zejun Zhao 577d8294d0 Use exception table to recover in RISC-V page fault handler 2025-10-30 11:27:08 +08:00
Zejun Zhao 79992c66de Implement fallible memory operations on RISC-V platform 2025-10-30 11:27:08 +08:00
Zejun Zhao 629b053ea8 Make exception table arch-agnostic 2025-10-30 11:27:08 +08:00
Zejun Zhao bfcb1d2c00 Implement `DmaStream::sync` on RISC-V platforms 2025-10-30 10:47:53 +08:00
Zejun Zhao 3353e53577 Add VirtIO device probing code on RISC-V platforms 2025-10-30 10:47:53 +08:00
Zejun Zhao 39a541fdeb Add RISC-V FPU support 2025-10-29 13:24:30 +08:00
Wang Siyuan 89e759894f Remove `Rights` from VMO 2025-10-29 12:22:22 +08:00