Refactor page table
This commit is contained in:
Yuke Peng
Tate, Hongliang Tian
parent
a5d719579d
commit
c21c25a7d5
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@ -1,10 +1,47 @@
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use alloc::vec::Vec;
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use alloc::{collections::BTreeMap, fmt, vec::Vec};
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use limine::{LimineMemmapEntry, LimineMemmapRequest, LimineMemoryMapEntryType};
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use log::debug;
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use spin::Once;
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use pod::Pod;
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use spin::{Mutex, Once};
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use x86_64::structures::paging::PhysFrame;
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use crate::vm::{MemoryRegions, MemoryRegionsType, Paddr};
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use crate::{
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config::{ENTRY_COUNT, PAGE_SIZE},
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vm::{
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page_table::{table_of, PageTableEntryTrait, PageTableFlagsTrait},
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MemoryRegions, MemoryRegionsType, Paddr,
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},
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};
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bitflags::bitflags! {
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#[derive(Pod)]
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#[repr(C)]
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/// Possible flags for a page table entry.
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pub struct PageTableFlags: usize {
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/// Specifies whether the mapped frame or page table is loaded in memory.
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const PRESENT = 1 << 0;
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/// Controls whether writes to the mapped frames are allowed.
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const WRITABLE = 1 << 1;
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/// Controls whether accesses from userspace (i.e. ring 3) are permitted.
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const USER = 1 << 2;
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/// If this bit is set, a “write-through” policy is used for the cache, else a “write-back”
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/// policy is used.
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const WRITE_THROUGH = 1 << 3;
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/// Disables caching for the pointed entry is cacheable.
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const NO_CACHE = 1 << 4;
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/// Whether this entry has been used for linear-address translation.
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const ACCESSED = 1 << 5;
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/// Indicates that the mapping is present in all address spaces, so it isn't flushed from
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/// the TLB on an address space switch.
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const GLOBAL = 1 << 8;
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/// Forbid execute codes on the page. The NXE bits in EFER msr must be set.
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const NO_EXECUTE = 1 << 63;
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}
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}
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#[derive(Clone, Copy, Pod)]
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#[repr(C)]
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pub struct PageTableEntry(usize);
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pub unsafe fn activate_page_table(root_paddr: Paddr, flags: x86_64::registers::control::Cr3Flags) {
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x86_64::registers::control::Cr3::write(
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@ -13,8 +50,151 @@ pub unsafe fn activate_page_table(root_paddr: Paddr, flags: x86_64::registers::c
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);
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}
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pub static ALL_MAPPED_PTE: Mutex<BTreeMap<usize, PageTableEntry>> = Mutex::new(BTreeMap::new());
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/// Get memory regions, this function should call after the heap was initialized
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pub fn get_memory_regions() -> Vec<MemoryRegions> {
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let mut memory_regions = Vec::new();
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let response = MEMMAP_REQUEST
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.get_response()
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.get()
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.expect("Not found memory region information");
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for i in response.memmap() {
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debug!("Found memory region:{:x?}", **i);
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memory_regions.push(MemoryRegions::from(&**i));
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}
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memory_regions
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}
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pub fn init() {
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let (page_directory_base, _) = x86_64::registers::control::Cr3::read();
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let page_directory_base = page_directory_base.start_address().as_u64() as usize;
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// Safety: page_directory_base is read from Cr3, the address is valid.
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let p4 = unsafe { table_of::<PageTableEntry>(page_directory_base).unwrap() };
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// Cancel mapping in lowest addresses.
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p4[0].clear();
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let mut map_pte = ALL_MAPPED_PTE.lock();
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for i in 0..512 {
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if p4[i].flags().contains(PageTableFlags::PRESENT) {
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map_pte.insert(i, p4[i]);
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}
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}
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}
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impl PageTableFlagsTrait for PageTableFlags {
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fn new() -> Self {
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Self::empty()
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}
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fn set_present(mut self, present: bool) -> Self {
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self.set(Self::PRESENT, present);
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self
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}
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fn set_writable(mut self, writable: bool) -> Self {
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self.set(Self::WRITABLE, writable);
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self
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}
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fn set_readable(self, readable: bool) -> Self {
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// do nothing
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self
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}
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fn set_accessible_by_user(mut self, accessible: bool) -> Self {
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self.set(Self::USER, accessible);
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self
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}
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fn is_present(&self) -> bool {
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self.contains(Self::PRESENT)
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}
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fn writable(&self) -> bool {
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self.contains(Self::WRITABLE)
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}
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fn readable(&self) -> bool {
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// always true
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true
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}
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fn accessible_by_user(&self) -> bool {
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self.contains(Self::USER)
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}
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fn set_executable(mut self, executable: bool) -> Self {
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self.set(Self::NO_EXECUTE, !executable);
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self
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}
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fn executable(&self) -> bool {
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!self.contains(Self::NO_EXECUTE)
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}
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fn has_accessed(&self) -> bool {
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self.contains(Self::ACCESSED)
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}
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fn union(&self, flags: &Self) -> Self {
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(*self).union(*flags)
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}
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fn remove(&mut self, flags: &Self) {
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self.remove(*flags)
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}
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fn insert(&mut self, flags: &Self) {
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self.insert(*flags)
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}
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}
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impl PageTableEntry {
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/// 51:12
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const PHYS_ADDR_MASK: usize = 0xF_FFFF_FFFF_F000;
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}
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impl PageTableEntryTrait for PageTableEntry {
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type F = PageTableFlags;
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fn new(paddr: Paddr, flags: PageTableFlags) -> Self {
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Self((paddr & Self::PHYS_ADDR_MASK) | flags.bits)
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}
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fn paddr(&self) -> Paddr {
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self.0 as usize & Self::PHYS_ADDR_MASK
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}
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fn flags(&self) -> PageTableFlags {
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PageTableFlags::from_bits_truncate(self.0)
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}
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fn is_unused(&self) -> bool {
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self.0 == 0
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}
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fn update(&mut self, paddr: Paddr, flags: Self::F) {
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self.0 = (paddr & Self::PHYS_ADDR_MASK) | flags.bits;
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}
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fn clear(&mut self) {
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self.0 = 0;
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}
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fn page_index(va: crate::vm::Vaddr, level: usize) -> usize {
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debug_assert!(level >= 1 && level <= 5);
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va >> (12 + 9 * (level - 1)) & (ENTRY_COUNT - 1)
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}
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}
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impl fmt::Debug for PageTableEntry {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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let mut f = f.debug_struct("PageTableEntry");
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f.field("raw", &self.0)
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.field("paddr", &self.paddr())
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.field("flags", &self.flags())
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.finish()
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}
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}
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static MEMMAP_REQUEST: LimineMemmapRequest = LimineMemmapRequest::new(0);
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static MEMORY_REGIONS: Once<Vec<MemoryRegions>> = Once::new();
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impl From<&LimineMemmapEntry> for MemoryRegions {
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fn from(value: &LimineMemmapEntry) -> Self {
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@ -40,18 +220,3 @@ impl From<LimineMemoryMapEntryType> for MemoryRegionsType {
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}
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}
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}
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/// Get memory regions, this function should call after the heap was initialized
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pub fn get_memory_regions() -> &'static Vec<MemoryRegions> {
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let mut memory_regions = Vec::new();
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let response = MEMMAP_REQUEST
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.get_response()
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.get()
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.expect("Not found memory region information");
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for i in response.memmap() {
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debug!("Found memory region:{:x?}", **i);
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memory_regions.push(MemoryRegions::from(&**i));
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}
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MEMORY_REGIONS.call_once(|| memory_regions);
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MEMORY_REGIONS.get().unwrap()
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}
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@ -20,6 +20,7 @@ pub(crate) fn before_all_init() {
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pub(crate) fn after_all_init() {
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irq::init();
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mm::init();
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device::serial::callback_init();
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kernel::acpi::init();
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match kernel::apic::init() {
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@ -1,12 +1,9 @@
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use core::ops::Range;
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use align_ext::AlignExt;
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use alloc::vec::Vec;
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use buddy_system_allocator::FrameAllocator;
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use log::{debug, info};
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use log::info;
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use spin::{Mutex, Once};
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use crate::{config::PAGE_SIZE, vm::Paddr};
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use crate::config::PAGE_SIZE;
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use super::{frame::VmFrameFlags, MemoryRegions, MemoryRegionsType, VmFrame};
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@ -1,6 +1,7 @@
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use super::page_table::{PageTable, PageTableFlags};
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use super::page_table::{PageTable, PageTableConfig};
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use crate::{
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config::PAGE_SIZE,
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arch::mm::{PageTableEntry, PageTableFlags},
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config::{PAGE_SIZE, PHYS_OFFSET},
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vm::is_page_aligned,
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vm::{VmFrame, VmFrameVec},
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};
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@ -10,6 +11,7 @@ use core::fmt;
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use super::frame_allocator;
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#[derive(Debug)]
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pub struct MapArea {
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pub flags: PageTableFlags,
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pub start_va: Vaddr,
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@ -18,7 +20,7 @@ pub struct MapArea {
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}
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pub struct MemorySet {
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pub pt: PageTable,
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pub pt: PageTable<PageTableEntry>,
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/// all the map area, sort by the start virtual address
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areas: BTreeMap<Vaddr, MapArea>,
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}
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@ -149,7 +151,11 @@ impl MemorySet {
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if area.size > 0 {
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// TODO: check overlap
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if let Entry::Vacant(e) = self.areas.entry(area.start_va) {
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self.pt.map_area(e.insert(area));
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let area = e.insert(area);
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for (va, pa) in area.mapper.iter() {
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debug_assert!(pa.start_paddr() < PHYS_OFFSET);
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self.pt.map(*va, pa.start_paddr(), area.flags).unwrap();
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}
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} else {
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panic!(
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"MemorySet::map: MapArea starts from {:#x?} is existed!",
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@ -173,15 +179,27 @@ impl MemorySet {
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}
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pub fn new() -> Self {
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let mut page_table = PageTable::new(PageTableConfig {
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address_width: super::page_table::AddressWidth::Level4PageTable,
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});
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let mapped_pte = crate::arch::mm::ALL_MAPPED_PTE.lock();
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for (index, pte) in mapped_pte.iter() {
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// Safety: These PTEs are all valid PTEs fetched from the initial page table during memory initialization.
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unsafe {
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page_table.add_root_mapping(*index, pte);
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}
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}
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Self {
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pt: PageTable::new(),
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pt: page_table,
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areas: BTreeMap::new(),
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}
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}
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pub fn unmap(&mut self, va: Vaddr) -> Result<()> {
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if let Some(area) = self.areas.remove(&va) {
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self.pt.unmap_area(&area);
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for (va, _) in area.mapper.iter() {
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self.pt.unmap(*va).unwrap();
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}
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Ok(())
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} else {
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Err(Error::PageFault)
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@ -190,7 +208,9 @@ impl MemorySet {
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pub fn clear(&mut self) {
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for area in self.areas.values_mut() {
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self.pt.unmap_area(area);
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for (va, _) in area.mapper.iter() {
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self.pt.unmap(*va).unwrap();
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}
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}
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self.areas.clear();
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}
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@ -246,7 +266,7 @@ impl MemorySet {
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pub fn protect(&mut self, addr: Vaddr, flags: PageTableFlags) {
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let va = addr;
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self.pt.protect(va, flags)
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self.pt.protect(va, flags).unwrap();
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}
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}
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@ -265,15 +285,6 @@ impl Drop for MemorySet {
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}
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}
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impl fmt::Debug for MapArea {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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f.debug_struct("MapArea")
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.field("flags", &self.flags)
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.field("mapped area", &self.mapper)
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.finish()
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}
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}
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impl fmt::Debug for MemorySet {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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f.debug_struct("MemorySet")
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@ -76,14 +76,13 @@ pub const fn is_page_aligned(p: usize) -> bool {
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}
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/// Only available inside jinux-frame
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pub(crate) static MEMORY_REGIONS: Once<&Vec<MemoryRegions>> = Once::new();
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pub(crate) static MEMORY_REGIONS: Once<Vec<MemoryRegions>> = Once::new();
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pub static FRAMEBUFFER_REGIONS: Once<Vec<MemoryRegions>> = Once::new();
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pub(crate) fn init() {
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heap_allocator::init();
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#[cfg(target_arch = "x86_64")]
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let memory_regions = crate::arch::x86::mm::get_memory_regions();
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let memory_regions = crate::arch::mm::get_memory_regions();
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let mut framebuffer_regions = Vec::new();
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for i in memory_regions.iter() {
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@ -92,8 +91,7 @@ pub(crate) fn init() {
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}
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}
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frame_allocator::init(memory_regions);
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page_table::init();
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frame_allocator::init(&memory_regions);
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MEMORY_REGIONS.call_once(|| memory_regions);
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FRAMEBUFFER_REGIONS.call_once(|| framebuffer_regions);
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@ -1,255 +1,269 @@
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use super::{
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frame_allocator,
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memory_set::MapArea,
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{Paddr, Vaddr},
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frame_allocator, paddr_to_vaddr, VmAllocOptions, VmFrameVec, {Paddr, Vaddr},
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};
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use crate::{
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config::{ENTRY_COUNT, PAGE_SIZE, PHYS_OFFSET},
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arch::mm::PageTableEntry,
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config::{ENTRY_COUNT, PAGE_SIZE},
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vm::VmFrame,
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};
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use align_ext::AlignExt;
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use alloc::{collections::BTreeMap, vec, vec::Vec};
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use core::{fmt, panic};
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use lazy_static::lazy_static;
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use spin::Mutex;
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use alloc::{vec, vec::Vec};
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use core::{fmt::Debug, marker::PhantomData, mem::size_of};
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use log::trace;
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use pod::Pod;
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lazy_static! {
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pub(crate) static ref ALL_MAPPED_PTE: Mutex<BTreeMap<usize, PageTableEntry>> =
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Mutex::new(BTreeMap::new());
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pub trait PageTableFlagsTrait: Clone + Copy + Sized + Pod + Debug {
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fn new() -> Self;
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fn set_present(self, present: bool) -> Self;
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fn set_writable(self, writable: bool) -> Self;
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fn set_readable(self, readable: bool) -> Self;
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fn set_accessible_by_user(self, accessible: bool) -> Self;
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fn set_executable(self, executable: bool) -> Self;
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fn is_present(&self) -> bool;
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fn writable(&self) -> bool;
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fn readable(&self) -> bool;
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fn executable(&self) -> bool;
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fn has_accessed(&self) -> bool;
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fn accessible_by_user(&self) -> bool;
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/// Returns a new set of flags, containing any flags present in either self or other. It is similar to the OR operation.
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fn union(&self, other: &Self) -> Self;
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/// Remove the specified flags.
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fn remove(&mut self, flags: &Self);
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/// Insert the specified flags.
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fn insert(&mut self, flags: &Self);
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}
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bitflags::bitflags! {
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/// Possible flags for a page table entry.
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pub struct PageTableFlags: usize {
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/// Specifies whether the mapped frame or page table is loaded in memory.
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const PRESENT = 1 << 0;
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/// Controls whether writes to the mapped frames are allowed.
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const WRITABLE = 1 << 1;
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/// Controls whether accesses from userspace (i.e. ring 3) are permitted.
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const USER = 1 << 2;
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/// If this bit is set, a “write-through” policy is used for the cache, else a “write-back”
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/// policy is used.
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const WRITE_THROUGH = 1 << 3;
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/// Disables caching for the pointed entry is cacheable.
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const NO_CACHE = 1 << 4;
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/// Indicates that the mapping is present in all address spaces, so it isn't flushed from
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/// the TLB on an address space switch.
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const GLOBAL = 1 << 8;
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/// Forbid execute codes on the page. The NXE bits in EFER msr must be set.
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const NO_EXECUTE = 1 << 63;
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}
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pub trait PageTableEntryTrait: Clone + Copy + Sized + Pod + Debug {
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type F: PageTableFlagsTrait;
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fn new(paddr: Paddr, flags: Self::F) -> Self;
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fn paddr(&self) -> Paddr;
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fn flags(&self) -> Self::F;
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||||
|
||||
fn update(&mut self, paddr: Paddr, flags: Self::F);
|
||||
|
||||
/// To determine whether the PTE is unused, it usually checks whether it is 0.
|
||||
///
|
||||
/// The page table will first use this value to determine whether a new page needs to be created to complete the mapping.
|
||||
fn is_unused(&self) -> bool;
|
||||
|
||||
/// Clear the PTE and reset it to the initial state, which is usually 0.
|
||||
fn clear(&mut self);
|
||||
|
||||
/// The index of the next PTE is determined based on the virtual address and the current level, and the level range is [1,5].
|
||||
///
|
||||
/// For example, in x86 we use the following expression to get the index (ENTRY_COUNT is 512):
|
||||
/// ```
|
||||
/// va >> (12 + 9 * (level - 1)) & (ENTRY_COUNT - 1)
|
||||
/// ```
|
||||
///
|
||||
fn page_index(va: Vaddr, level: usize) -> usize;
|
||||
}
|
||||
|
||||
#[derive(Clone, Copy)]
|
||||
#[repr(transparent)]
|
||||
pub struct PageTableEntry(usize);
|
||||
|
||||
impl PageTableEntry {
|
||||
const PHYS_ADDR_MASK: usize = !(PAGE_SIZE - 1);
|
||||
|
||||
pub const fn new_page(pa: Paddr, flags: PageTableFlags) -> Self {
|
||||
Self((pa & Self::PHYS_ADDR_MASK) | flags.bits)
|
||||
}
|
||||
const fn paddr(self) -> Paddr {
|
||||
self.0 as usize & Self::PHYS_ADDR_MASK
|
||||
}
|
||||
const fn flags(self) -> PageTableFlags {
|
||||
PageTableFlags::from_bits_truncate(self.0)
|
||||
}
|
||||
const fn is_unused(self) -> bool {
|
||||
self.0 == 0
|
||||
}
|
||||
const fn is_present(self) -> bool {
|
||||
(self.0 & PageTableFlags::PRESENT.bits) != 0
|
||||
}
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
pub struct PageTableConfig {
|
||||
pub address_width: AddressWidth,
|
||||
}
|
||||
|
||||
impl fmt::Debug for PageTableEntry {
|
||||
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
|
||||
let mut f = f.debug_struct("PageTableEntry");
|
||||
f.field("raw", &self.0)
|
||||
.field("paddr", &self.paddr())
|
||||
.field("flags", &self.flags())
|
||||
.finish()
|
||||
}
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
#[repr(usize)]
|
||||
pub enum AddressWidth {
|
||||
Level3PageTable = 3,
|
||||
Level4PageTable = 4,
|
||||
Level5PageTable = 5,
|
||||
}
|
||||
|
||||
pub struct PageTable {
|
||||
#[derive(Debug)]
|
||||
pub enum PageTableError {
|
||||
/// Modifications to page tables (map, unmap, protect, etc.) are invalid for the following reasons:
|
||||
///
|
||||
/// 1. The mapping is present before map operation.
|
||||
/// 2. The mapping is already invalid before unmap operation.
|
||||
/// 3. The mapping is not exists before protect operation.
|
||||
InvalidModification,
|
||||
}
|
||||
|
||||
#[derive(Clone, Debug)]
|
||||
pub struct PageTable<T: PageTableEntryTrait> {
|
||||
pub root_pa: Paddr,
|
||||
/// store all the physical frame that the page table need to map all the frame e.g. the frame of the root_pa
|
||||
tables: Vec<VmFrame>,
|
||||
config: PageTableConfig,
|
||||
_phantom: PhantomData<T>,
|
||||
}
|
||||
|
||||
impl PageTable {
|
||||
pub fn new() -> Self {
|
||||
impl<T: PageTableEntryTrait> PageTable<T> {
|
||||
pub fn new(config: PageTableConfig) -> Self {
|
||||
let root_frame = frame_allocator::alloc_zero().unwrap();
|
||||
let p4 = table_of(root_frame.start_paddr()).unwrap();
|
||||
let map_pte = ALL_MAPPED_PTE.lock();
|
||||
for (index, pte) in map_pte.iter() {
|
||||
p4[*index] = *pte;
|
||||
}
|
||||
Self {
|
||||
root_pa: root_frame.start_paddr(),
|
||||
tables: vec![root_frame],
|
||||
config,
|
||||
_phantom: PhantomData,
|
||||
}
|
||||
}
|
||||
|
||||
pub fn map(&mut self, va: Vaddr, pa: Paddr, flags: PageTableFlags) {
|
||||
let entry = self.get_entry_or_create(va).unwrap();
|
||||
if !entry.is_unused() {
|
||||
panic!("{:#x?} is mapped before mapping", va);
|
||||
}
|
||||
*entry = PageTableEntry::new_page(pa.align_down(PAGE_SIZE), flags);
|
||||
}
|
||||
|
||||
pub fn unmap(&mut self, va: Vaddr) {
|
||||
let entry = get_entry(self.root_pa, va).unwrap();
|
||||
if entry.is_unused() {
|
||||
panic!("{:#x?} is invalid before unmapping", va);
|
||||
}
|
||||
entry.0 = 0;
|
||||
}
|
||||
|
||||
pub fn protect(&mut self, va: Vaddr, flags: PageTableFlags) {
|
||||
let entry = self.get_entry_or_create(va).unwrap();
|
||||
if entry.is_unused() || !entry.is_present() {
|
||||
panic!("{:#x?} is invalid before protect", va);
|
||||
}
|
||||
// clear old mask
|
||||
let clear_flags_mask = !PageTableFlags::all().bits;
|
||||
entry.0 &= clear_flags_mask;
|
||||
// set new mask
|
||||
entry.0 |= flags.bits;
|
||||
}
|
||||
|
||||
pub fn map_area(&mut self, area: &MapArea) {
|
||||
for (va, pa) in area.mapper.iter() {
|
||||
assert!(pa.start_paddr() < PHYS_OFFSET);
|
||||
self.map(*va, pa.start_paddr(), area.flags);
|
||||
/// Create the page table structure according to the physical address, note that the created page table can only use the page_walk function without create.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// User should ensure the physical address is valid and only invoke the `page_walk` function without creating new PTE.
|
||||
///
|
||||
pub unsafe fn from_paddr(config: PageTableConfig, paddr: Paddr) -> Self {
|
||||
Self {
|
||||
root_pa: paddr,
|
||||
tables: Vec::new(),
|
||||
config,
|
||||
_phantom: PhantomData,
|
||||
}
|
||||
}
|
||||
|
||||
pub fn unmap_area(&mut self, area: &MapArea) {
|
||||
for (va, _) in area.mapper.iter() {
|
||||
self.unmap(*va);
|
||||
/// Add a new mapping directly in the root page table.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// User must guarantee the validity of the PTE.
|
||||
///
|
||||
pub unsafe fn add_root_mapping(&mut self, index: usize, pte: &T) {
|
||||
debug_assert!((index + 1) * size_of::<T>() <= PAGE_SIZE);
|
||||
// Safety: The root_pa is refer to the root of a valid page table.
|
||||
let root_ptes: &mut [T] = table_of(self.root_pa).unwrap();
|
||||
root_ptes[index] = *pte;
|
||||
}
|
||||
|
||||
pub fn map(&mut self, vaddr: Vaddr, paddr: Paddr, flags: T::F) -> Result<(), PageTableError> {
|
||||
let last_entry = self.page_walk(vaddr, true).unwrap();
|
||||
trace!(
|
||||
"Page Table: Map vaddr:{:x?}, paddr:{:x?}, flags:{:x?}",
|
||||
vaddr,
|
||||
paddr,
|
||||
flags
|
||||
);
|
||||
if !last_entry.is_unused() && last_entry.flags().is_present() {
|
||||
return Err(PageTableError::InvalidModification);
|
||||
}
|
||||
last_entry.update(paddr, flags);
|
||||
Ok(())
|
||||
}
|
||||
|
||||
/// Find the last PTE
|
||||
///
|
||||
/// If create is set, it will create the next table until the last PTE.
|
||||
/// If not, it will return None if it is not reach the last PTE.
|
||||
///
|
||||
fn page_walk(&mut self, vaddr: Vaddr, create: bool) -> Option<&mut T> {
|
||||
let mut count = self.config.address_width as usize;
|
||||
debug_assert!(size_of::<T>() * (T::page_index(vaddr, count) + 1) <= PAGE_SIZE);
|
||||
// Safety: The offset does not exceed the value of PAGE_SIZE.
|
||||
// It only change the memory controlled by page table.
|
||||
let mut current: &mut T = unsafe {
|
||||
&mut *(paddr_to_vaddr(self.root_pa + size_of::<T>() * T::page_index(vaddr, count))
|
||||
as *mut T)
|
||||
};
|
||||
|
||||
while count > 1 {
|
||||
if current.paddr() == 0 {
|
||||
if !create {
|
||||
return None;
|
||||
}
|
||||
// Create next table
|
||||
let frame = VmFrameVec::allocate(&VmAllocOptions::new(1).uninit(false))
|
||||
.unwrap()
|
||||
.pop()
|
||||
.unwrap();
|
||||
// Default flags: read, write, user, present
|
||||
let flags = T::F::new()
|
||||
.set_present(true)
|
||||
.set_accessible_by_user(true)
|
||||
.set_readable(true)
|
||||
.set_writable(true);
|
||||
current.update(frame.start_paddr(), flags);
|
||||
self.tables.push(frame);
|
||||
}
|
||||
count -= 1;
|
||||
debug_assert!(size_of::<T>() * (T::page_index(vaddr, count) + 1) <= PAGE_SIZE);
|
||||
// Safety: The offset does not exceed the value of PAGE_SIZE.
|
||||
// It only change the memory controlled by page table.
|
||||
current = unsafe {
|
||||
&mut *(paddr_to_vaddr(
|
||||
current.paddr() + size_of::<T>() * T::page_index(vaddr, count),
|
||||
) as *mut T)
|
||||
};
|
||||
}
|
||||
Some(current)
|
||||
}
|
||||
|
||||
pub fn unmap(&mut self, vaddr: Vaddr) -> Result<(), PageTableError> {
|
||||
let last_entry = self.page_walk(vaddr, false).unwrap();
|
||||
trace!("Page Table: Unmap vaddr:{:x?}", vaddr);
|
||||
if last_entry.is_unused() && !last_entry.flags().is_present() {
|
||||
return Err(PageTableError::InvalidModification);
|
||||
}
|
||||
last_entry.clear();
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn protect(&mut self, vaddr: Vaddr, flags: T::F) -> Result<(), PageTableError> {
|
||||
let last_entry = self.page_walk(vaddr, false).unwrap();
|
||||
trace!("Page Table: Protect vaddr:{:x?}, flags:{:x?}", vaddr, flags);
|
||||
if last_entry.is_unused() || !last_entry.flags().is_present() {
|
||||
return Err(PageTableError::InvalidModification);
|
||||
}
|
||||
last_entry.update(last_entry.paddr(), flags);
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn root_paddr(&self) -> Paddr {
|
||||
self.root_pa
|
||||
}
|
||||
}
|
||||
|
||||
impl PageTable {
|
||||
fn alloc_table(&mut self) -> Paddr {
|
||||
let frame = frame_allocator::alloc_zero().unwrap();
|
||||
let pa = frame.start_paddr();
|
||||
self.tables.push(frame);
|
||||
pa
|
||||
}
|
||||
|
||||
fn get_entry_or_create(&mut self, va: Vaddr) -> Option<&mut PageTableEntry> {
|
||||
let p4 = table_of(self.root_pa).unwrap();
|
||||
let p4e = &mut p4[p4_index(va)];
|
||||
let p3 = next_table_or_create(p4e, || self.alloc_table())?;
|
||||
let p3e = &mut p3[p3_index(va)];
|
||||
let p2 = next_table_or_create(p3e, || self.alloc_table())?;
|
||||
let p2e = &mut p2[p2_index(va)];
|
||||
let p1 = next_table_or_create(p2e, || self.alloc_table())?;
|
||||
let p1e = &mut p1[p1_index(va)];
|
||||
Some(p1e)
|
||||
}
|
||||
}
|
||||
|
||||
const fn p4_index(va: Vaddr) -> usize {
|
||||
(va >> (12 + 27)) & (ENTRY_COUNT - 1)
|
||||
}
|
||||
|
||||
const fn p3_index(va: Vaddr) -> usize {
|
||||
(va >> (12 + 18)) & (ENTRY_COUNT - 1)
|
||||
}
|
||||
|
||||
const fn p2_index(va: Vaddr) -> usize {
|
||||
(va >> (12 + 9)) & (ENTRY_COUNT - 1)
|
||||
}
|
||||
|
||||
const fn p1_index(va: Vaddr) -> usize {
|
||||
(va >> 12) & (ENTRY_COUNT - 1)
|
||||
}
|
||||
|
||||
fn get_entry(root_pa: Paddr, va: Vaddr) -> Option<&'static mut PageTableEntry> {
|
||||
let p4 = table_of(root_pa).unwrap();
|
||||
let p4e = &mut p4[p4_index(va)];
|
||||
let p3 = next_table(p4e)?;
|
||||
let p3e = &mut p3[p3_index(va)];
|
||||
let p2 = next_table(p3e)?;
|
||||
let p2e = &mut p2[p2_index(va)];
|
||||
let p1 = next_table(p2e)?;
|
||||
let p1e = &mut p1[p1_index(va)];
|
||||
Some(p1e)
|
||||
}
|
||||
|
||||
fn table_of<'a>(pa: Paddr) -> Option<&'a mut [PageTableEntry]> {
|
||||
/// Read `ENTRY_COUNT` of PageTableEntry from an address
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// User must ensure that the physical address refers to the root of a valid page table.
|
||||
///
|
||||
pub unsafe fn table_of<'a, T: PageTableEntryTrait>(pa: Paddr) -> Option<&'a mut [T]> {
|
||||
if pa == 0 {
|
||||
return None;
|
||||
}
|
||||
let ptr = super::paddr_to_vaddr(pa) as *mut _;
|
||||
unsafe { Some(core::slice::from_raw_parts_mut(ptr, ENTRY_COUNT)) }
|
||||
}
|
||||
|
||||
fn next_table<'a>(entry: &PageTableEntry) -> Option<&'a mut [PageTableEntry]> {
|
||||
if entry.is_present() {
|
||||
Some(table_of(entry.paddr()).unwrap())
|
||||
} else {
|
||||
None
|
||||
}
|
||||
}
|
||||
|
||||
fn next_table_or_create<'a>(
|
||||
entry: &mut PageTableEntry,
|
||||
mut alloc: impl FnMut() -> Paddr,
|
||||
) -> Option<&'a mut [PageTableEntry]> {
|
||||
if entry.is_unused() {
|
||||
let pa = alloc();
|
||||
*entry = PageTableEntry::new_page(
|
||||
pa,
|
||||
PageTableFlags::PRESENT | PageTableFlags::WRITABLE | PageTableFlags::USER,
|
||||
);
|
||||
Some(table_of(pa).unwrap())
|
||||
} else {
|
||||
next_table(entry)
|
||||
}
|
||||
Some(core::slice::from_raw_parts_mut(ptr, ENTRY_COUNT))
|
||||
}
|
||||
|
||||
/// translate a virtual address to physical address which cannot use offset to get physical address
|
||||
pub fn vaddr_to_paddr(virtual_address: Vaddr) -> Option<Paddr> {
|
||||
pub fn vaddr_to_paddr(vaddr: Vaddr) -> Option<Paddr> {
|
||||
#[cfg(target_arch = "x86_64")]
|
||||
let (page_directory_base, _) = x86_64::registers::control::Cr3::read();
|
||||
|
||||
// TODO: Read and use different level page table.
|
||||
// Safety: The page_directory_base is valid since it is read from PDBR.
|
||||
// We only use this instance to do the page walk without creating.
|
||||
let mut page_table: PageTable<PageTableEntry> = unsafe {
|
||||
PageTable::from_paddr(
|
||||
PageTableConfig {
|
||||
address_width: AddressWidth::Level4PageTable,
|
||||
},
|
||||
page_directory_base.start_address().as_u64() as usize,
|
||||
)
|
||||
};
|
||||
let page_directory_base = page_directory_base.start_address().as_u64() as usize;
|
||||
let p4 = table_of(page_directory_base)?;
|
||||
|
||||
let pte = p4[p4_index(virtual_address)];
|
||||
let p3 = table_of(pte.paddr())?;
|
||||
|
||||
let pte = p3[p3_index(virtual_address)];
|
||||
let p2 = table_of(pte.paddr())?;
|
||||
|
||||
let pte = p2[p2_index(virtual_address)];
|
||||
let p1 = table_of(pte.paddr())?;
|
||||
|
||||
let pte = p1[p1_index(virtual_address)];
|
||||
Some((pte.paddr() & ((1 << 48) - 1)) + (virtual_address & ((1 << 12) - 1)))
|
||||
}
|
||||
|
||||
pub(crate) fn init() {
|
||||
#[cfg(target_arch = "x86_64")]
|
||||
let (page_directory_base, _) = x86_64::registers::control::Cr3::read();
|
||||
let page_directory_base = page_directory_base.start_address().as_u64() as usize;
|
||||
|
||||
let p4 = table_of(page_directory_base).unwrap();
|
||||
// Cancel mapping in lowest addresses.
|
||||
p4[0].0 = 0;
|
||||
let mut map_pte = ALL_MAPPED_PTE.lock();
|
||||
for i in 0..512 {
|
||||
if p4[i].flags().contains(PageTableFlags::PRESENT) {
|
||||
map_pte.insert(i, p4[i]);
|
||||
}
|
||||
}
|
||||
let last_entry = page_table.page_walk(vaddr, false)?;
|
||||
Some(last_entry.paddr())
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
use crate::arch::mm::PageTableFlags;
|
||||
use crate::config::PAGE_SIZE;
|
||||
use crate::vm::page_table::PageTableFlags;
|
||||
use bitflags::bitflags;
|
||||
use core::ops::Range;
|
||||
use spin::Mutex;
|
||||
|
|
|
|||
Loading…
Reference in New Issue