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Disable BAR decoding when sizing PCI BARs

This commit is contained in:
Ruihan Li 2026-01-23 14:52:46 +08:00 committed by Tate, Hongliang Tian
parent eefdaf4de9
commit a599a2c563
1 changed files with 7 additions and 3 deletions
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10
kernel/comps/pci/src/common_device.rs
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@ -103,10 +103,14 @@ impl PciCommonDevice {
capabilities, capabilities,
}; };
device.write_command( // While setting up the BARs, we need to ensure that
device.read_command() | Command::MEMORY_SPACE | Command::BUS_MASTER | Command::IO_SPACE, // "Decode (I/O or memory) of the appropriate address space is disabled via the Command
); // Register before sizing a Base Address register."
let command_val = device.read_command() | Command::BUS_MASTER;
device.write_command(command_val - (Command::MEMORY_SPACE | Command::IO_SPACE));
device.bar_manager = BarManager::new(device.header_type.device_type(), location); device.bar_manager = BarManager::new(device.header_type.device_type(), location);
device.write_command(command_val | (Command::MEMORY_SPACE | Command::IO_SPACE));
device.capabilities = Capability::device_capabilities(&mut device); device.capabilities = Capability::device_capabilities(&mut device);
Some(device) Some(device)