mirror of https://github.com/armbian/build.git
916 lines
20 KiB
Diff
916 lines
20 KiB
Diff
diff -Nuar /dev/null b/configs/station-m2-rk3566_defconfig
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--- /dev/null
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+++ b/configs/station-m2-rk3566_defconfig
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@@ -0,0 +1,138 @@
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+CONFIG_ARM=y
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+CONFIG_SKIP_LOWLEVEL_INIT=y
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+CONFIG_COUNTER_FREQUENCY=24000000
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_TEXT_BASE=0x00a00000
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+CONFIG_SPL_LIBCOMMON_SUPPORT=y
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+CONFIG_SPL_LIBGENERIC_SUPPORT=y
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+CONFIG_NR_DRAM_BANKS=2
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+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
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+CONFIG_SF_DEFAULT_SPEED=24000000
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+CONFIG_SF_DEFAULT_MODE=0x2000
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+CONFIG_DEFAULT_DEVICE_TREE="rk3566-roc-pc"
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+CONFIG_ROCKCHIP_RK3568=y
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+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
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+CONFIG_ROCKCHIP_SPI_IMAGE=y
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+CONFIG_SPL_SERIAL=y
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+CONFIG_SPL_STACK_R_ADDR=0x600000
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+CONFIG_SPL_STACK=0x400000
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+CONFIG_DEBUG_UART_BASE=0xFE660000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_SPL_SPI_FLASH_SUPPORT=y
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+CONFIG_SPL_SPI=y
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+CONFIG_SYS_LOAD_ADDR=0xc00800
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+CONFIG_PCI=y
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+CONFIG_DEBUG_UART=y
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+CONFIG_FIT=y
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+CONFIG_FIT_VERBOSE=y
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+CONFIG_SPL_FIT_SIGNATURE=y
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+CONFIG_SPL_LOAD_FIT=y
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+CONFIG_LEGACY_IMAGE_FORMAT=y
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+CONFIG_SPI_BOOT=y
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+CONFIG_BOOTDELAY=0
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+CONFIG_AUTOBOOT_KEYED=y
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+CONFIG_AUTOBOOT_PROMPT="Hit CtrlC key in %d seconds to stop autoboot...\n"
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+CONFIG_AUTOBOOT_STOP_STR="\x03"
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+CONFIG_AUTOBOOT_KEYED_CTRLC=y
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+CONFIG_BOOTCOMMAND="bootflow scan; run distro_bootcmd; echo Boot failed. Reset in 3 seconds...; sleep 3; reset;"
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+CONFIG_USE_PREBOOT=y
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+CONFIG_PREBOOT="usb start; pci enum"
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-roc-pc.dtb"
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+# CONFIG_SYS_DEVICE_NULLDEV is not set
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
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+CONFIG_ID_EEPROM=y
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+CONFIG_SPL_MAX_SIZE=0x40000
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+CONFIG_SPL_PAD_TO=0x7f8000
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+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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+CONFIG_SPL_BSS_START_ADDR=0x4000000
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+CONFIG_SPL_BSS_MAX_SIZE=0x4000
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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+CONFIG_SPL_STACK_R=y
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+CONFIG_SPL_SPI_LOAD=y
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+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
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+CONFIG_SPL_ATF=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPIO_READ=y
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+CONFIG_CMD_PWM=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_MBR=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_PCI=y
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+CONFIG_CMD_POWEROFF=y
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+CONFIG_CMD_USB=y
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+CONFIG_CMD_USB_MASS_STORAGE=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_PMIC=y
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+CONFIG_CMD_REGULATOR=y
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+# CONFIG_SPL_DOS_PARTITION is not set
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+CONFIG_SPL_OF_CONTROL=y
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+CONFIG_OF_LIVE=y
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+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+CONFIG_SPL_DM_SEQ_ALIAS=y
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+CONFIG_SPL_REGMAP=y
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+CONFIG_SPL_SYSCON=y
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+CONFIG_SATA=y
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+CONFIG_SCSI_AHCI=y
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+CONFIG_AHCI_PCI=y
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+CONFIG_SATA_SIL=y
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+CONFIG_SPL_CLK=y
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+CONFIG_FASTBOOT_BUF_ADDR=0x13000000
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+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
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+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
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+CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_LED=y
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+CONFIG_LED_GPIO=y
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+CONFIG_MISC=y
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+CONFIG_SUPPORT_EMMC_RPMB=y
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+CONFIG_MMC_HS200_SUPPORT=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_MMC_SDHCI=y
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+CONFIG_MMC_SDHCI_SDMA=y
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+CONFIG_MMC_SDHCI_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_BUS=4
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+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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+CONFIG_SPI_FLASH_GIGADEVICE=y
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+CONFIG_SPI_FLASH_MACRONIX=y
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+CONFIG_SPI_FLASH_WINBOND=y
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+CONFIG_SPI_FLASH_XTX=y
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+CONFIG_ETH_DESIGNWARE=y
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+CONFIG_GMAC_ROCKCHIP=y
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+CONFIG_NVME_PCI=y
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+CONFIG_PCIE_DW_ROCKCHIP=y
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+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
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+CONFIG_SPL_PINCTRL=y
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+CONFIG_DM_PMIC=y
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+CONFIG_DM_PMIC_FAN53555=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_PWM_ROCKCHIP=y
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+CONFIG_SPL_RAM=y
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+CONFIG_SCSI=y
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+CONFIG_DM_SCSI=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_SYS_NS16550_MEM32=y
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+CONFIG_ROCKCHIP_SFC=y
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+CONFIG_ROCKCHIP_SPI=y
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+CONFIG_SYSRESET=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_EHCI_GENERIC=y
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+CONFIG_USB_OHCI_HCD=y
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+CONFIG_USB_OHCI_GENERIC=y
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+CONFIG_USB_DWC3=y
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+CONFIG_USB_DWC3_GENERIC=y
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+CONFIG_USB_KEYBOARD=y
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+CONFIG_USB_GADGET=y
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+CONFIG_USB_GADGET_PRODUCT_NUM=0x2200
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+CONFIG_ERRNO_STR=y
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diff -Nuar /dev/null b/arch/arm/dts/rk3566-roc-pc.dts
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--- /dev/null
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+++ b/arch/arm/dts/rk3566-roc-pc.dts
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@@ -0,0 +1,704 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2022 Arm
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+ */
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+
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+/dts-v1/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include "rk3566.dtsi"
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+
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+/ {
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+ model = "Firefly Station M2";
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+ compatible = "firefly,rk3566-roc-pc", "rockchip,rk3566";
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+
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+ aliases {
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+ ethernet0 = &gmac1;
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+ mmc0 = &sdhci;
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+ mmc1 = &sdmmc0;
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+ };
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+
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+ chosen: chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ gmac1_clkin: external-gmac1-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac1_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&user_led1 &user_led2>;
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+
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+ led-0 {
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+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "ir-power-click";
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+ };
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+
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+ led-1 {
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "ir-user-click";
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+ };
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+ };
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+
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+
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+ rk809-sound {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "Analog RK809";
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+ simple-audio-card,mclk-fs = <256>;
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s1_8ch>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&rk809>;
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+ };
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk809 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_enable>;
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+ post-power-on-delay-ms = <100>;
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+ power-off-delay-us = <5000000>;
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+ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ vcc12v_dcin: vcc12v-dcin-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc12v_dcin";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_enable_h>;
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+ regulator-name = "vcc3v3_pcie";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc12v_dcin>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc12v_dcin>;
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+ };
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+
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+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_host_en>;
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+ regulator-name = "vcc5v0_usb_host";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_otg_en>;
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+ regulator-name = "vcc5v0_usb_otg";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+};
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+
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+&combphy1 {
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+ status = "okay";
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+};
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+
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+&combphy2 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&gmac1 {
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+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
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+ clock_in_out = "input";
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+ phy-handle = <&rgmii_phy1>;
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+ phy-mode = "rgmii-id";
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+ phy-supply = <&vcc_3v3>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gmac1m1_miim
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+ &gmac1m1_tx_bus2
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+ &gmac1m1_rx_bus2
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+ &gmac1m1_rgmii_clk
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+ &gmac1m1_clkinout
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+ &gmac1m1_rgmii_bus>;
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ avdd-0v9-supply = <&vdda0v9_image>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ status = "okay";
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+};
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint {
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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+&hdmi_sound {
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ vdd_cpu: regulator@1c {
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+ compatible = "tcs,tcs4525";
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+ reg = <0x1c>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1150000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ rk809: pmic@20 {
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+ compatible = "rockchip,rk809";
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+ reg = <0x20>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
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+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
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+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
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+ #clock-cells = <1>;
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+ clock-names = "mclk";
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+ clocks = <&cru I2S1_MCLKOUT_TX>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
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+ rockchip,system-power-controller;
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+ #sound-dai-cells = <0>;
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc5-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+ wakeup-source;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
|
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+ regulator-always-on;
|
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+ regulator-boot-on;
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+ regulator-init-microvolt = <900000>;
|
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
|
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+ };
|
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+ };
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+
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+ vdd_gpu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu";
|
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+ regulator-always-on;
|
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+ regulator-init-microvolt = <900000>;
|
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+ regulator-initial-mode = <0x2>;
|
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+ regulator-min-microvolt = <500000>;
|
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+ regulator-max-microvolt = <1350000>;
|
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
|
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+ };
|
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+ };
|
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+
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+ vcc_ddr: DCDC_REG3 {
|
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+ regulator-name = "vcc_ddr";
|
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+ regulator-always-on;
|
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+ regulator-boot-on;
|
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+ regulator-initial-mode = <0x2>;
|
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+
|
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+ regulator-state-mem {
|
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+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_npu: DCDC_REG4 {
|
|
+ regulator-name = "vdd_npu";
|
|
+ regulator-init-microvolt = <900000>;
|
|
+ regulator-initial-mode = <0x2>;
|
|
+ regulator-min-microvolt = <500000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8: DCDC_REG5 {
|
|
+ regulator-name = "vcc_1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda0v9_image: LDO_REG1 {
|
|
+ regulator-name = "vdda0v9_image";
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda_0v9: LDO_REG2 {
|
|
+ regulator-name = "vdda_0v9";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdda0v9_pmu: LDO_REG3 {
|
|
+ regulator-name = "vdda0v9_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <900000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_acodec: LDO_REG4 {
|
|
+ regulator-name = "vccio_acodec";
|
|
+ regulator-always-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vccio_sd: LDO_REG5 {
|
|
+ regulator-name = "vccio_sd";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_pmu: LDO_REG6 {
|
|
+ regulator-name = "vcc3v3_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8: LDO_REG7 {
|
|
+ regulator-name = "vcca_1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_pmu: LDO_REG8 {
|
|
+ regulator-name = "vcca1v8_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_image: LDO_REG9 {
|
|
+ regulator-name = "vcca1v8_image";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3: SWITCH_REG1 {
|
|
+ regulator-name = "vcc_3v3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_sd: SWITCH_REG2 {
|
|
+ regulator-name = "vcc3v3_sd";
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ codec {
|
|
+ mic-in-differential;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2s0_8ch {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&mdio1 {
|
|
+ rgmii_phy1: ethernet-phy@0 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <0x0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <ð_phy_rst>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <100000>;
|
|
+ reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie2x1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_reset_h>;
|
|
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ ethernet {
|
|
+ eth_phy_rst: eth_phy_rst {
|
|
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ user_led1: user-led1 {
|
|
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ user_led2: user-led2 {
|
|
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie {
|
|
+ pcie_enable_h: pcie-enable-h {
|
|
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pcie_reset_h: pcie-reset-h {
|
|
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ pmic_int: pmic-int {
|
|
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio-pwrseq {
|
|
+ wifi_reg_on_h: wifi-reg-on-h {
|
|
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ wifi_enable: wifi-enable {
|
|
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ vcc5v0_usb_host_en: vcc5v0-usb20-en {
|
|
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
|
|
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ bt {
|
|
+ bt_host_wake_h: bt-host-wake-h {
|
|
+ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+ bt_reg_on_h: bt-reg-on-h {
|
|
+ rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ bt_wake_host_h: bt-wake-host-h {
|
|
+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ pmuio1-supply = <&vcc3v3_pmu>;
|
|
+ pmuio2-supply = <&vcc3v3_pmu>;
|
|
+ vccio1-supply = <&vccio_acodec>;
|
|
+ vccio2-supply = <&vcc_1v8>;
|
|
+ vccio3-supply = <&vccio_sd>;
|
|
+ vccio4-supply = <&vcc_1v8>;
|
|
+ vccio5-supply = <&vcc_3v3>;
|
|
+ vccio6-supply = <&vcc_1v8>;
|
|
+ vccio7-supply = <&vcc_3v3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ vref-supply = <&vcca_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ max-frequency = <200000000>;
|
|
+ mmc-hs200-1_8v;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
|
+ vmmc-supply = <&vcc_3v3>;
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc0 {
|
|
+ bus-width = <4>;
|
|
+ cap-mmc-highspeed;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc_3v3>;
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc1 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
+ keep-power-in-suspend;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
|
|
+ sd-uhs-sdr104;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ rockchip,hw-tshut-polarity = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
|
|
+ uart-has-rtscts;
|
|
+ status = "okay";
|
|
+
|
|
+ bluetooth {
|
|
+ compatible = "brcm,bcm43430a1-bt";
|
|
+ clocks = <&rk809 1>;
|
|
+ clock-names = "lpo";
|
|
+ device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
|
|
+ host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
|
|
+ reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>;
|
|
+ vbat-supply = <&vcc_3v3>;
|
|
+ vddio-supply = <&vcc_1v8>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_xhci {
|
|
+ extcon = <&usb2phy0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_xhci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_host {
|
|
+ phy-supply = <&vcc5v0_usb_host>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_otg {
|
|
+ phy-supply = <&vcc5v0_usb_otg>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy1_host {
|
|
+ phy-supply = <&vcc5v0_usb_host>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy1_otg {
|
|
+ phy-supply = <&vcc5v0_usb_host>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop {
|
|
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
|
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vp0 {
|
|
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
|
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
|
+ remote-endpoint = <&hdmi_in_vp0>;
|
|
+ };
|
|
+};
|
|
diff -Nuar /dev/null b/arch/arm/dts/rk3566-roc-pc-u-boot.dtsi
|
|
--- /dev/null
|
|
+++ b/arch/arm/dts/rk3566-roc-pc-u-boot.dtsi
|
|
@@ -0,0 +1,61 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+/*
|
|
+ * Copyright (c) 2023 Arm
|
|
+ */
|
|
+
|
|
+#include "rk356x-u-boot.dtsi"
|
|
+
|
|
+/ {
|
|
+ chosen {
|
|
+ stdout-path = &uart2;
|
|
+ };
|
|
+
|
|
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
|
|
+ compatible = "regulator-fixed";
|
|
+ enable-active-low;
|
|
+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_enable_h>;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-name = "vcc3v3_pcie";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ clock-frequency = <24000000>;
|
|
+ bootph-all;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vcc5v0_usb_host {
|
|
+ regulator-boot-on;
|
|
+};
|
|
+
|
|
+&usb_host0_xhci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&combphy2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ pcie {
|
|
+ pcie_enable_h: pcie-enable-h {
|
|
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ pcie_reset_h: pcie-reset-h {
|
|
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie2x1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_reset_h>;
|
|
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
|
+ status = "okay";
|
|
+};
|