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armbian-build/patch/kernel/archive/rockchip64-6.10/dt/rk3566-core3566.dts

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/dts-v1/;
/ {
#address-cells = <0x02>;
model = "luckfox core3566";
serial-number = "70724ac80bd71c85";
#size-cells = <0x02>;
interrupt-parent = <0x01>;
compatible = "luckfox,core3566\0rockchip,rk3566";
video-phy@fe850000 {
power-domains = <0x21 0x09>;
clock-names = "ref\0pclk_phy\0pclk_host";
resets = <0x1f 0x1bb>;
clocks = <0x31 0x17 0x1f 0x17a 0x1f 0xe8>;
#clock-cells = <0x00>;
#phy-cells = <0x00>;
compatible = "rockchip,rk3568-video-phy";
status = "disabled";
reg = <0x00 0xfe850000 0x00 0x10000 0x00 0xfe060000 0x00 0x10000>;
phandle = <0x2e>;
reset-names = "rst";
};
spi@fe620000 {
pinctrl-names = "default\0high_speed";
#address-cells = <0x01>;
pinctrl-0 = <0xca 0xcb 0xcc>;
clock-names = "spiclk\0apb_pclk";
interrupts = <0x00 0x68 0x04>;
clocks = <0x1f 0x154 0x1f 0x153>;
#size-cells = <0x00>;
dma-names = "tx\0rx";
compatible = "rockchip,rk3066-spi";
pinctrl-1 = <0xca 0xcb 0xcd>;
status = "disabled";
reg = <0x00 0xfe620000 0x00 0x1000>;
phandle = <0x18d>;
dmas = <0x40 0x16 0x40 0x17>;
};
wireless-bluetooth {
pinctrl-names = "default\0rts_gpio";
pinctrl-0 = <0x10a>;
clock-names = "ext_clock";
clocks = <0x106 0x01>;
BT,wake_gpio = <0x108 0x11 0x00>;
BT,reset_gpio = <0x108 0x0f 0x00>;
uart_rts_gpios = <0x108 0x0d 0x01>;
compatible = "bluetooth-platdata";
BT,wake_host_irq = <0x108 0x10 0x00>;
pinctrl-1 = <0x10b>;
status = "disabled";
phandle = <0x2a1>;
};
i2s3-mclkin {
clock-output-names = "i2s3_mclkin";
#clock-cells = <0x00>;
clock-frequency = <0xbb8000>;
compatible = "fixed-clock";
phandle = <0x12b>;
};
qos@fe158300 {
compatible = "syscon";
reg = <0x00 0xfe158300 0x00 0x20>;
phandle = <0x53>;
};
iommu@fdf80800 {
power-domains = <0x21 0x0d>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x5c 0x04>;
clocks = <0x1f 0x108 0x1f 0x109>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
status = "okay";
interrupt-names = "rkvdec_mmu";
reg = <0x00 0xfdf80800 0x00 0x40 0x00 0xfdf80840 0x00 0x40>;
phandle = <0x6f>;
};
scmi-shmem@10f000 {
compatible = "arm,scmi-shmem";
reg = <0x00 0x10f000 0x00 0x100>;
phandle = <0x1a>;
};
syscon@fdc20000 {
compatible = "rockchip,rk3568-pmugrf\0syscon\0simple-mfd";
reg = <0x00 0xfdc20000 0x00 0x10000>;
phandle = <0x33>;
reboot-mode {
mode-normal = <0x5242c300>;
mode-loader = <0x5242c301>;
mode-bootloader = <0x5242c301>;
mode-recovery = <0x5242c303>;
mode-watchdog = <0x5242c308>;
mode-ums = <0x5242c30c>;
mode-fastboot = <0x5242c309>;
offset = <0x200>;
compatible = "syscon-reboot-mode";
phandle = <0x13b>;
mode-charge = <0x5242c30b>;
mode-panic = <0x5242c307>;
};
io-domains {
vccio1-supply = <0x2a>;
vccio3-supply = <0x2b>;
vccio4-supply = <0x2c>;
vccio5-supply = <0x2d>;
pmuio2-supply = <0x29>;
vccio6-supply = <0x2c>;
vccio7-supply = <0x2d>;
compatible = "rockchip,rk3568-pmu-io-voltage-domain";
status = "okay";
phandle = <0x13a>;
};
};
i2c@fe5c0000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0xc0>;
clock-names = "i2c\0pclk";
interrupts = <0x00 0x31 0x04>;
clocks = <0x1f 0x14c 0x1f 0x14b>;
#size-cells = <0x00>;
compatible = "rockchip,rk3399-i2c";
status = "okay";
reg = <0x00 0xfe5c0000 0x00 0x1000>;
phandle = <0x186>;
imx219-2@10 {
clock-names = "ext_cam_imx219_clk_two";
pwdn-gpios = <0xc2 0x0f 0x01>;
clocks = <0xc1>;
rockchip,camera-module-name = "Waveshare";
rockchip,camera-module-index = <0x01>;
compatible = "sony,imx219";
rockchip,camera-module-facing = "front";
status = "okay";
reg = <0x10>;
rockchip,camera-module-lens-name = "Picamera";
phandle = <0x187>;
port {
endpoint {
data-lanes = <0x01 0x02>;
remote-endpoint = <0xc3>;
phandle = <0xf5>;
};
};
};
};
iep@fdef0000 {
power-domains = <0x21 0x0a>;
iommus = <0x6c>;
clock-names = "aclk\0hclk\0sclk";
resets = <0x1f 0x127 0x1f 0x128 0x1f 0x129>;
interrupts = <0x00 0x38 0x04>;
clocks = <0x1f 0xf6 0x1f 0xf7 0x1f 0xf8>;
rockchip,srv = <0x68>;
rockchip,taskqueue-node = <0x05>;
compatible = "rockchip,iep-v2";
rockchip,resetgroup-node = <0x05>;
status = "okay";
reg = <0x00 0xfdef0000 0x00 0x500>;
phandle = <0x158>;
reset-names = "rst_a\0rst_h\0rst_s";
};
gpu@fde60000 {
power-domains = <0x21 0x07>;
mali-supply = <0x61>;
clock-names = "gpu\0bus";
interrupts = <0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x27 0x04>;
clocks = <0x02 0x01 0x1f 0x1b>;
compatible = "rockchip,rk3568-mali\0arm,mali-bifrost";
status = "okay";
interrupt-names = "job\0mmu\0gpu";
reg = <0x00 0xfde60000 0x00 0x4000>;
phandle = <0x1d>;
operating-points-v2 = <0x65>;
#cooling-cells = <0x02>;
};
spdif@fe460000 {
pinctrl-names = "default";
pinctrl-0 = <0xb9>;
clock-names = "mclk\0hclk";
interrupts = <0x00 0x66 0x04>;
clocks = <0x1f 0x5f 0x1f 0x5c>;
dma-names = "tx";
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-spdif";
status = "disabled";
reg = <0x00 0xfe460000 0x00 0x1000>;
phandle = <0x17c>;
dmas = <0xa6 0x01>;
};
qos@fe1a8100 {
compatible = "syscon";
reg = <0x00 0xfe1a8100 0x00 0x20>;
phandle = <0x4d>;
};
syscon@fdc60000 {
compatible = "rockchip,rk3568-grf\0syscon\0simple-mfd";
reg = <0x00 0xfdc60000 0x00 0x10000>;
phandle = <0x32>;
lvds {
phy-names = "phy";
compatible = "rockchip,rk3568-lvds";
status = "disabled";
phys = <0x2e>;
phandle = <0x13d>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
endpoint@1 {
remote-endpoint = <0x18>;
status = "disabled";
reg = <0x01>;
phandle = <0x8b>;
};
endpoint@2 {
remote-endpoint = <0x2f>;
status = "disabled";
reg = <0x02>;
phandle = <0x8c>;
};
};
};
};
rgb {
pinctrl-names = "default";
pinctrl-0 = <0x30>;
compatible = "rockchip,rk3568-rgb";
status = "disabled";
phandle = <0x13e>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
endpoint@2 {
remote-endpoint = <0x19>;
status = "disabled";
reg = <0x02>;
phandle = <0x8d>;
};
};
};
};
io-domains {
compatible = "rockchip,rk3568-io-voltage-domain";
status = "disabled";
phandle = <0x13c>;
};
};
pinctrl {
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "rockchip,rk3568-pinctrl";
rockchip,pmu = <0x33>;
ranges;
rockchip,grf = <0x32>;
phandle = <0xf9>;
eth0 {
eth0-pins {
rockchip,pins = <0x02 0x11 0x02 0xfa>;
phandle = <0x1ca>;
};
};
i2c3 {
i2c3m1-xfer {
rockchip,pins = <0x03 0x0d 0x04 0xff 0x03 0x0e 0x04 0xff>;
phandle = <0xc0>;
};
i2c3m0-xfer {
rockchip,pins = <0x01 0x01 0x01 0xff 0x01 0x00 0x01 0xff>;
phandle = <0x1e3>;
};
};
pwm9 {
pwm9m1-pins {
rockchip,pins = <0x01 0x1e 0x04 0xfa>;
phandle = <0x23a>;
};
pwm9m0-pins {
rockchip,pins = <0x03 0x0a 0x05 0xfa>;
phandle = <0xe5>;
};
};
pwm14 {
pwm14m1-pins {
rockchip,pins = <0x04 0x12 0x01 0xfa>;
phandle = <0x23f>;
};
pwm14m0-pins {
rockchip,pins = <0x03 0x14 0x01 0xfa>;
phandle = <0xea>;
};
};
npu {
npu-pins {
rockchip,pins = <0x00 0x11 0x02 0xfa>;
phandle = <0x21b>;
};
};
wireless-bluetooth {
uart1-gpios {
rockchip,pins = <0x02 0x0d 0x00 0xfa>;
phandle = <0x10b>;
};
};
pcie30x1 {
pcie30x1m1-pins {
rockchip,pins = <0x02 0x1a 0x04 0xfa 0x03 0x01 0x04 0xfa 0x02 0x1b 0x04 0xfa>;
phandle = <0x221>;
};
pcie30x1m0-pins {
rockchip,pins = <0x00 0x04 0x03 0xfa 0x00 0x13 0x03 0xfa 0x00 0x12 0x03 0xfa>;
phandle = <0x220>;
};
pcie30x1-buttonrstn {
rockchip,pins = <0x00 0x0b 0x03 0xfa>;
phandle = <0x223>;
};
pcie30x1m2-pins {
rockchip,pins = <0x01 0x05 0x04 0xfa 0x01 0x02 0x04 0xfa 0x01 0x03 0x04 0xfa>;
phandle = <0x222>;
};
};
gpio@fdd60000 {
gpio-controller;
interrupts = <0x00 0x21 0x04>;
clocks = <0x31 0x2e 0x31 0x0c>;
compatible = "rockchip,gpio-bank";
#interrupt-cells = <0x02>;
reg = <0x00 0xfdd60000 0x00 0x100>;
phandle = <0x36>;
#gpio-cells = <0x02>;
gpio-ranges = <0xf9 0x00 0x00 0x20>;
interrupt-controller;
};
uart8 {
uart8m0-rtsn {
rockchip,pins = <0x02 0x09 0x03 0xfa>;
phandle = <0x278>;
};
uart8m0-ctsn {
rockchip,pins = <0x02 0x0a 0x03 0xfa>;
phandle = <0x277>;
};
uart8m1-xfer {
rockchip,pins = <0x03 0x00 0x04 0xfc 0x02 0x1f 0x04 0xfc>;
phandle = <0x279>;
};
uart8m0-xfer {
rockchip,pins = <0x02 0x16 0x02 0xfc 0x02 0x15 0x03 0xfc>;
phandle = <0xde>;
};
};
gmac-txc-level2 {
gmac0-rgmii-clk-level2 {
rockchip,pins = <0x02 0x05 0x02 0xfa 0x02 0x08 0x02 0xfd>;
phandle = <0x298>;
};
gmac1m1-rgmii-clk-level2 {
rockchip,pins = <0x04 0x03 0x03 0xfa 0x04 0x00 0x03 0xfd>;
phandle = <0x29a>;
};
gmac1m0-rgmii-clk-level2 {
rockchip,pins = <0x03 0x07 0x03 0xfa 0x03 0x06 0x03 0xfd>;
phandle = <0x299>;
};
};
spi2 {
spi2m0-cs1 {
rockchip,pins = <0x02 0x15 0x04 0xfa>;
phandle = <0xcf>;
};
spi2m1-cs1 {
rockchip,pins = <0x02 0x1c 0x03 0xfa>;
phandle = <0x25b>;
};
spi2m1-pins {
rockchip,pins = <0x03 0x00 0x03 0xfa 0x02 0x1f 0x03 0xfa 0x02 0x1e 0x03 0xfa>;
phandle = <0x259>;
};
spi2m0-cs0 {
rockchip,pins = <0x02 0x14 0x04 0xfa>;
phandle = <0xce>;
};
spi2m0-pins {
rockchip,pins = <0x02 0x11 0x04 0xfa 0x02 0x12 0x04 0xfa 0x02 0x13 0x04 0xfa>;
phandle = <0xd0>;
};
spi2m1-cs0 {
rockchip,pins = <0x02 0x1d 0x03 0xfa>;
phandle = <0x25a>;
};
};
pcfg-pull-up-drv-level-2 {
drive-strength = <0x02>;
phandle = <0xfb>;
bias-pull-up;
};
i2s1 {
i2s1m0-sdo1 {
rockchip,pins = <0x01 0x08 0x01 0xfa>;
phandle = <0x1eb>;
};
i2s1m0-lrcktx {
rockchip,pins = <0x01 0x05 0x01 0xfa>;
phandle = <0xa8>;
};
i2s1m1-sdi1 {
rockchip,pins = <0x03 0x1b 0x04 0xfa>;
phandle = <0x1f4>;
};
i2s1m1-lrcktx {
rockchip,pins = <0x03 0x18 0x04 0xfa>;
phandle = <0x1ef>;
};
i2s1m0-lrckrx {
rockchip,pins = <0x01 0x06 0x01 0xfa>;
phandle = <0x1e6>;
};
i2s1m0-sdi3 {
rockchip,pins = <0x01 0x08 0x02 0xfa>;
phandle = <0x1ea>;
};
i2s1m2-lrcktx {
rockchip,pins = <0x02 0x1a 0x05 0xfa>;
phandle = <0x1fc>;
};
i2s1m1-lrckrx {
rockchip,pins = <0x04 0x07 0x05 0xfa>;
phandle = <0x1ee>;
};
i2s1m0-mclk {
rockchip,pins = <0x01 0x02 0x01 0xfa>;
phandle = <0x3e>;
};
i2s1m0-sclktx {
rockchip,pins = <0x01 0x03 0x01 0xfa>;
phandle = <0xa7>;
};
i2s1m2-sdo2 {
rockchip,pins = <0x03 0x11 0x05 0xfa>;
phandle = <0x206>;
};
i2s1m2-lrckrx {
rockchip,pins = <0x03 0x15 0x05 0xfa>;
phandle = <0x1fb>;
};
i2s1m0-sdi1 {
rockchip,pins = <0x01 0x0a 0x02 0xfa>;
phandle = <0x1e8>;
};
i2s1m1-sclktx {
rockchip,pins = <0x03 0x17 0x04 0xfa>;
phandle = <0x1f2>;
};
i2s1m0-sclkrx {
rockchip,pins = <0x01 0x04 0x01 0xfa>;
phandle = <0x1e7>;
};
i2s1m2-sclktx {
rockchip,pins = <0x02 0x19 0x05 0xfa>;
phandle = <0x1ff>;
};
i2s1m2-sdo0 {
rockchip,pins = <0x02 0x1f 0x05 0xfa>;
phandle = <0x204>;
};
i2s1m1-sclkrx {
rockchip,pins = <0x04 0x06 0x05 0xfa>;
phandle = <0x1f1>;
};
i2s1m2-sclkrx {
rockchip,pins = <0x03 0x13 0x05 0xfa>;
phandle = <0x1fe>;
};
i2s1m1-sdo2 {
rockchip,pins = <0x04 0x09 0x04 0xfa>;
phandle = <0x1f9>;
};
i2s1m2-sdi2 {
rockchip,pins = <0x02 0x1d 0x05 0xfa>;
phandle = <0x202>;
};
i2s1m1-sdo0 {
rockchip,pins = <0x03 0x19 0x04 0xfa>;
phandle = <0x1f7>;
};
i2s1m2-sdi0 {
rockchip,pins = <0x02 0x1b 0x05 0xfa>;
phandle = <0x200>;
};
i2s1m0-sdo2 {
rockchip,pins = <0x01 0x09 0x01 0xfa>;
phandle = <0x1ec>;
};
i2s1m1-sdi2 {
rockchip,pins = <0x03 0x1c 0x04 0xfa>;
phandle = <0x1f5>;
};
i2s1m0-sdo0 {
rockchip,pins = <0x01 0x07 0x01 0xfa>;
phandle = <0xaa>;
};
i2s1m1-sdi0 {
rockchip,pins = <0x03 0x1a 0x04 0xfa>;
phandle = <0x1f3>;
};
i2s1m2-sdo3 {
rockchip,pins = <0x03 0x12 0x05 0xfa>;
phandle = <0x207>;
};
i2s1m0-sdi2 {
rockchip,pins = <0x01 0x09 0x02 0xfa>;
phandle = <0x1e9>;
};
i2s1m2-sdo1 {
rockchip,pins = <0x03 0x00 0x05 0xfa>;
phandle = <0x205>;
};
i2s1m0-sdi0 {
rockchip,pins = <0x01 0x0b 0x01 0xfa>;
phandle = <0xa9>;
};
i2s1m1-sdo3 {
rockchip,pins = <0x04 0x0d 0x04 0xfa>;
phandle = <0x1fa>;
};
i2s1m2-sdi3 {
rockchip,pins = <0x02 0x1e 0x05 0xfa>;
phandle = <0x203>;
};
i2s1m2-mclk {
rockchip,pins = <0x02 0x18 0x05 0xfa>;
phandle = <0x1fd>;
};
i2s1m1-sdo1 {
rockchip,pins = <0x04 0x08 0x05 0xfa>;
phandle = <0x1f8>;
};
i2s1m2-sdi1 {
rockchip,pins = <0x02 0x1c 0x05 0xfa>;
phandle = <0x201>;
};
i2s1m0-sdo3 {
rockchip,pins = <0x01 0x0a 0x01 0xfa>;
phandle = <0x1ed>;
};
i2s1m1-sdi3 {
rockchip,pins = <0x03 0x1d 0x04 0xfa>;
phandle = <0x1f6>;
};
i2s1m1-mclk {
rockchip,pins = <0x03 0x16 0x04 0xfa>;
phandle = <0x1f0>;
};
};
pdm {
pdmm0-sdi3 {
rockchip,pins = <0x01 0x08 0x03 0xfa>;
phandle = <0xb8>;
};
pdmm2-clk1 {
rockchip,pins = <0x03 0x14 0x05 0xfa>;
phandle = <0x22e>;
};
pdmm0-sdi1 {
rockchip,pins = <0x01 0x0a 0x03 0xfa>;
phandle = <0xb6>;
};
pdmm1-clk {
rockchip,pins = <0x03 0x1e 0x05 0xfa>;
phandle = <0x228>;
};
pdmm1-clk1 {
rockchip,pins = <0x04 0x00 0x04 0xfa>;
phandle = <0x229>;
};
pdmm2-sdi2 {
rockchip,pins = <0x03 0x0f 0x05 0xfa>;
phandle = <0x231>;
};
pdmm0-clk1 {
rockchip,pins = <0x01 0x04 0x03 0xfa>;
phandle = <0xb4>;
};
pdmm2-sdi0 {
rockchip,pins = <0x03 0x0b 0x05 0xfa>;
phandle = <0x22f>;
};
pdmm1-sdi2 {
rockchip,pins = <0x04 0x02 0x05 0xfa>;
phandle = <0x22c>;
};
pdmm1-sdi0 {
rockchip,pins = <0x03 0x1f 0x05 0xfa>;
phandle = <0x22a>;
};
pdmm0-sdi2 {
rockchip,pins = <0x01 0x09 0x03 0xfa>;
phandle = <0xb7>;
};
pdmm0-sdi0 {
rockchip,pins = <0x01 0x0b 0x02 0xfa>;
phandle = <0xb5>;
};
pdmm2-sdi3 {
rockchip,pins = <0x03 0x10 0x05 0xfa>;
phandle = <0x232>;
};
pdmm2-sdi1 {
rockchip,pins = <0x03 0x0c 0x05 0xfa>;
phandle = <0x230>;
};
pdmm1-sdi3 {
rockchip,pins = <0x04 0x03 0x05 0xfa>;
phandle = <0x22d>;
};
pdmm0-clk {
rockchip,pins = <0x01 0x06 0x03 0xfa>;
phandle = <0xb3>;
};
pdmm1-sdi1 {
rockchip,pins = <0x04 0x01 0x04 0xfa>;
phandle = <0x22b>;
};
};
gpio@fe770000 {
gpio-controller;
interrupts = <0x00 0x25 0x04>;
clocks = <0x1f 0x169 0x1f 0x16a>;
compatible = "rockchip,gpio-bank";
#interrupt-cells = <0x02>;
reg = <0x00 0xfe770000 0x00 0x100>;
phandle = <0x3f>;
#gpio-cells = <0x02>;
gpio-ranges = <0xf9 0x00 0x80 0x20>;
interrupt-controller;
};
i2c1 {
i2c1-xfer {
rockchip,pins = <0x00 0x0b 0x01 0xfc 0x00 0x0c 0x01 0xfc>;
phandle = <0xbc>;
};
};
pwm7 {
pwm7-pins {
rockchip,pins = <0x00 0x16 0x01 0xfa>;
phandle = <0xe3>;
};
};
gmac0 {
gmac0-clkinout {
rockchip,pins = <0x02 0x12 0x02 0xfa>;
phandle = <0x1d1>;
};
gmac0-miim {
rockchip,pins = <0x02 0x13 0x02 0xfa 0x02 0x14 0x02 0xfa>;
phandle = <0x1d0>;
};
gmac0-tx-bus2 {
rockchip,pins = <0x02 0x0b 0x01 0xfd 0x02 0x0c 0x01 0xfd 0x02 0x0d 0x01 0xfa>;
phandle = <0x1d4>;
};
gmac0-rgmii-bus {
rockchip,pins = <0x02 0x03 0x02 0xfa 0x02 0x04 0x02 0xfa 0x02 0x06 0x02 0xfd 0x02 0x07 0x02 0xfd>;
phandle = <0x1d6>;
};
gmac0-rx-er {
rockchip,pins = <0x02 0x15 0x02 0xfa>;
phandle = <0x1d2>;
};
gmac0-rx-bus2 {
rockchip,pins = <0x02 0x0e 0x01 0xfa 0x02 0x0f 0x02 0xfa 0x02 0x10 0x02 0xfa>;
phandle = <0x1d3>;
};
gmac0-rgmii-clk {
rockchip,pins = <0x02 0x05 0x02 0xfa 0x02 0x08 0x02 0xfe>;
phandle = <0x1d5>;
};
};
pwm12 {
pwm12m1-pins {
rockchip,pins = <0x04 0x15 0x01 0xfa>;
phandle = <0x23d>;
};
pwm12m0-pins {
rockchip,pins = <0x03 0x0f 0x02 0xfa>;
phandle = <0xe8>;
};
};
uart6 {
uart6m0-ctsn {
rockchip,pins = <0x02 0x10 0x03 0xfa>;
phandle = <0x270>;
};
uart6m1-xfer {
rockchip,pins = <0x01 0x1e 0x03 0xfc 0x01 0x1d 0x03 0xfc>;
phandle = <0x272>;
};
uart6m0-xfer {
rockchip,pins = <0x02 0x03 0x03 0xfc 0x02 0x04 0x03 0xfc>;
phandle = <0xdc>;
};
uart6m0-rtsn {
rockchip,pins = <0x02 0x0f 0x03 0xfa>;
phandle = <0x271>;
};
};
gpu {
gpu-pins {
rockchip,pins = <0x00 0x10 0x02 0xfa 0x00 0x06 0x04 0xfa>;
phandle = <0x1e0>;
};
};
spi0 {
spi0m0-cs0 {
rockchip,pins = <0x00 0x16 0x02 0xfa>;
phandle = <0xc6>;
};
spi0m1-cs0 {
rockchip,pins = <0x02 0x1a 0x03 0xfa>;
phandle = <0x256>;
};
spi0m1-pins {
rockchip,pins = <0x02 0x1b 0x03 0xfa 0x02 0x18 0x03 0xfa 0x02 0x19 0x03 0xfa>;
phandle = <0x255>;
};
spi0m0-cs1 {
rockchip,pins = <0x00 0x14 0x02 0xfa>;
phandle = <0xc7>;
};
spi0m0-pins {
rockchip,pins = <0x00 0x0d 0x02 0xfa 0x00 0x15 0x02 0xfa 0x00 0x0e 0x02 0xfa>;
phandle = <0xc8>;
};
};
fspi {
fspi-pins {
rockchip,pins = <0x01 0x18 0x01 0xfa 0x01 0x1b 0x01 0xfa 0x01 0x19 0x01 0xfa 0x01 0x1a 0x01 0xfa 0x01 0x17 0x02 0xfa 0x01 0x1c 0x01 0xfa>;
phandle = <0x1ce>;
};
fspi-cs1 {
rockchip,pins = <0x01 0x16 0x02 0xfc>;
phandle = <0x1cf>;
};
};
clk32k {
clk32k-out0 {
rockchip,pins = <0x00 0x08 0x02 0xfa>;
phandle = <0x1e>;
};
clk32k-in {
rockchip,pins = <0x00 0x08 0x01 0xfa>;
phandle = <0x1bf>;
};
clk32k-out1 {
rockchip,pins = <0x02 0x16 0x01 0xfa>;
phandle = <0x1c0>;
};
};
ebc {
ebc-pins {
rockchip,pins = <0x04 0x10 0x02 0xfa 0x04 0x0b 0x02 0xfa 0x04 0x0c 0x02 0xfa 0x04 0x06 0x02 0xfa 0x04 0x11 0x02 0xfa 0x03 0x16 0x02 0xfa 0x03 0x17 0x02 0xfa 0x03 0x18 0x02 0xfa 0x03 0x19 0x02 0xfa 0x03 0x1a 0x02 0xfa 0x03 0x1b 0x02 0xfa 0x03 0x1c 0x02 0xfa 0x03 0x1d 0x02 0xfa 0x03 0x1e 0x02 0xfa 0x03 0x1f 0x02 0xfa 0x04 0x00 0x02 0xfa 0x04 0x01 0x02 0xfa 0x04 0x02 0x02 0xfa 0x04 0x03 0x02 0xfa 0x04 0x04 0x02 0xfa 0x04 0x05 0x02 0xfa 0x04 0x0e 0x02 0xfa 0x04 0x0f 0x02 0xfa>;
phandle = <0x69>;
};
ebc-extern {
rockchip,pins = <0x04 0x07 0x02 0xfa 0x04 0x08 0x02 0xfa 0x04 0x09 0x02 0xfa 0x04 0x0d 0x02 0xfa 0x04 0x0a 0x02 0xfa>;
phandle = <0x1c2>;
};
};
spi2-hs {
spi2m0-cs1 {
rockchip,pins = <0x02 0x15 0x04 0x102>;
phandle = <0x289>;
};
spi2m1-cs1 {
rockchip,pins = <0x02 0x1c 0x03 0x102>;
phandle = <0x28c>;
};
spi2m1-pins {
rockchip,pins = <0x03 0x00 0x03 0x102 0x02 0x1f 0x03 0x102 0x02 0x1e 0x03 0x102>;
phandle = <0x28a>;
};
spi2m0-cs0 {
rockchip,pins = <0x02 0x14 0x04 0x102>;
phandle = <0x288>;
};
spi2m0-pins {
rockchip,pins = <0x02 0x11 0x04 0x102 0x02 0x12 0x04 0x102 0x02 0x13 0x04 0x102>;
phandle = <0xd1>;
};
spi2m1-cs0 {
rockchip,pins = <0x02 0x1d 0x03 0x102>;
phandle = <0x28b>;
};
};
pwm5 {
pwm5-pins {
rockchip,pins = <0x00 0x14 0x01 0xfa>;
phandle = <0xe1>;
};
};
pcfg-pull-none-drv-level-3 {
drive-strength = <0x03>;
bias-disable;
phandle = <0x103>;
};
isp {
isp-pins {
rockchip,pins = <0x04 0x0c 0x04 0xfa 0x04 0x06 0x01 0xfa 0x04 0x09 0x01 0xfa>;
phandle = <0x218>;
};
};
pwm10 {
pwm10m1-pins {
rockchip,pins = <0x02 0x01 0x02 0xfa>;
phandle = <0x23b>;
};
pwm10m0-pins {
rockchip,pins = <0x03 0x0d 0x05 0xfa>;
phandle = <0xe6>;
};
};
pcfg-pull-down {
bias-pull-down;
phandle = <0x101>;
};
uart4 {
uart4m0-ctsn {
rockchip,pins = <0x01 0x07 0x02 0xfa>;
phandle = <0x26a>;
};
uart4m1-xfer {
rockchip,pins = <0x03 0x09 0x04 0xfc 0x03 0x0a 0x04 0xfc>;
phandle = <0x26c>;
};
uart4m0-xfer {
rockchip,pins = <0x01 0x04 0x02 0xfc 0x01 0x06 0x02 0xfc>;
phandle = <0xda>;
};
uart4m0-rtsn {
rockchip,pins = <0x01 0x05 0x02 0xfa>;
phandle = <0x26b>;
};
};
mcu {
mcu-pins {
rockchip,pins = <0x00 0x0c 0x04 0xfa 0x00 0x11 0x04 0xfa 0x00 0x0b 0x04 0xfa 0x00 0x12 0x04 0xfa 0x00 0x13 0x04 0xfa>;
phandle = <0x21a>;
};
};
pwm3 {
pwm3-pins {
rockchip,pins = <0x00 0x12 0x01 0xfa>;
phandle = <0x45>;
};
};
pcfg-pull-none-drv-level-1 {
drive-strength = <0x01>;
bias-disable;
phandle = <0xfe>;
};
sata2 {
sata2-pins {
rockchip,pins = <0x04 0x14 0x03 0xfa>;
phandle = <0x245>;
};
};
gpio@fe740000 {
gpio-controller;
interrupts = <0x00 0x22 0x04>;
clocks = <0x1f 0x163 0x1f 0x164>;
compatible = "rockchip,gpio-bank";
#interrupt-cells = <0x02>;
reg = <0x00 0xfe740000 0x00 0x100>;
phandle = <0x9c>;
#gpio-cells = <0x02>;
gpio-ranges = <0xf9 0x00 0x20 0x20>;
interrupt-controller;
};
cam {
cam-clkout0 {
rockchip,pins = <0x04 0x07 0x01 0xfa>;
phandle = <0x1b3>;
};
cam-clkout1 {
rockchip,pins = <0x04 0x08 0x01 0xfa>;
phandle = <0x1b4>;
};
};
uart2 {
uart2m1-xfer {
rockchip,pins = <0x01 0x1e 0x02 0xfc 0x01 0x1d 0x02 0xfc>;
phandle = <0x266>;
};
uart2m0-xfer {
rockchip,pins = <0x00 0x18 0x01 0xfc 0x00 0x19 0x01 0xfc>;
phandle = <0xd8>;
};
};
lcdc {
lcdc-ctl {
rockchip,pins = <0x03 0x00 0x01 0xfa 0x02 0x18 0x01 0xfa 0x02 0x19 0x01 0xfa 0x02 0x1a 0x01 0xfa 0x02 0x1b 0x01 0xfa 0x02 0x1c 0x01 0xfa 0x02 0x1d 0x01 0xfa 0x02 0x1e 0x01 0xfa 0x02 0x1f 0x01 0xfa 0x03 0x01 0x01 0xfa 0x03 0x02 0x01 0xfa 0x03 0x03 0x01 0xfa 0x03 0x04 0x01 0xfa 0x03 0x05 0x01 0xfa 0x03 0x06 0x01 0xfa 0x03 0x07 0x01 0xfa 0x03 0x08 0x01 0xfa 0x03 0x09 0x01 0xfa 0x03 0x0a 0x01 0xfa 0x03 0x0b 0x01 0xfa 0x03 0x0c 0x01 0xfa 0x03 0x0d 0x01 0xfa 0x03 0x0e 0x01 0xfa 0x03 0x0f 0x01 0xfa 0x03 0x10 0x01 0xfa 0x03 0x13 0x01 0xfa 0x03 0x11 0x01 0xfa 0x03 0x12 0x01 0xfa>;
phandle = <0x30>;
};
};
cpu {
cpu-pins {
rockchip,pins = <0x00 0x0f 0x02 0xfa>;
phandle = <0x1c1>;
};
};
gpio-func {
tsadc-gpio-func {
rockchip,pins = <0x00 0x01 0x00 0xfa>;
phandle = <0xec>;
};
};
sdmmc1 {
sdmmc1-cmd {
rockchip,pins = <0x02 0x07 0x01 0xfb>;
phandle = <0xa4>;
};
sdmmc1-clk {
rockchip,pins = <0x02 0x08 0x01 0xfb>;
phandle = <0xa5>;
};
sdmmc1-bus4 {
rockchip,pins = <0x02 0x03 0x01 0xfb 0x02 0x04 0x01 0xfb 0x02 0x05 0x01 0xfb 0x02 0x06 0x01 0xfb>;
phandle = <0xa3>;
};
sdmmc1-det {
rockchip,pins = <0x02 0x0a 0x01 0xfc>;
phandle = <0x247>;
};
sdmmc1-pwren {
rockchip,pins = <0x02 0x09 0x01 0xfa>;
phandle = <0x248>;
};
};
pwm1 {
pwm1m1-pins {
rockchip,pins = <0x00 0x0d 0x04 0xfa>;
phandle = <0x237>;
};
pwm1m0-pins {
rockchip,pins = <0x00 0x10 0x01 0xfa>;
phandle = <0x43>;
};
};
sata0 {
sata0-pins {
rockchip,pins = <0x04 0x16 0x03 0xfa>;
phandle = <0x243>;
};
};
refclk {
refclk-pins {
rockchip,pins = <0x00 0x00 0x01 0xfa>;
phandle = <0x241>;
};
};
can2 {
can2m1-pins {
rockchip,pins = <0x02 0x09 0x04 0xfa 0x02 0x0a 0x04 0xfa>;
phandle = <0x1ba>;
};
can2m0-pins {
rockchip,pins = <0x04 0x0c 0x03 0xfa 0x04 0x0d 0x03 0xfa>;
phandle = <0x1b9>;
};
};
sata {
sata-pins {
rockchip,pins = <0x00 0x04 0x02 0xfa 0x00 0x06 0x01 0xfa 0x00 0x05 0x02 0xfa>;
phandle = <0x242>;
};
};
audiopwm {
audiopwm-routn {
rockchip,pins = <0x01 0x07 0x04 0xfa>;
phandle = <0x1ae>;
};
audiopwm-lout {
rockchip,pins = <0x01 0x00 0x04 0xfa>;
phandle = <0x1aa>;
};
audiopwm-routp {
rockchip,pins = <0x01 0x06 0x04 0xfa>;
phandle = <0x1af>;
};
audiopwm-loutn {
rockchip,pins = <0x01 0x01 0x06 0xfa>;
phandle = <0x1ab>;
};
audiopwm-loutp {
rockchip,pins = <0x01 0x00 0x06 0xfa>;
phandle = <0x1ac>;
};
audiopwm-rout {
rockchip,pins = <0x01 0x01 0x04 0xfa>;
phandle = <0x1ad>;
};
};
edpdp {
edpdpm1-pins {
rockchip,pins = <0x00 0x12 0x02 0xfa>;
phandle = <0x1c4>;
};
edpdpm0-pins {
rockchip,pins = <0x04 0x14 0x01 0xfa>;
phandle = <0x1c3>;
};
};
tsadc {
tsadc-shutorg {
rockchip,pins = <0x00 0x01 0x02 0xfa>;
phandle = <0xed>;
};
tsadcm1-shut {
rockchip,pins = <0x00 0x02 0x02 0xfa>;
phandle = <0x260>;
};
tsadcm0-shut {
rockchip,pins = <0x00 0x01 0x01 0xfa>;
phandle = <0x25f>;
};
};
uart0 {
uart0-rtsn {
rockchip,pins = <0x00 0x14 0x03 0xfa>;
phandle = <0x262>;
};
uart0-ctsn {
rockchip,pins = <0x00 0x17 0x03 0xfa>;
phandle = <0x261>;
};
uart0-xfer {
rockchip,pins = <0x00 0x10 0x03 0xfc 0x00 0x11 0x03 0xfc>;
phandle = <0x41>;
};
};
eth1 {
eth1m1-pins {
rockchip,pins = <0x04 0x0b 0x03 0xfa>;
phandle = <0x1cc>;
};
eth1m0-pins {
rockchip,pins = <0x03 0x08 0x03 0xfa>;
phandle = <0x1cb>;
};
};
i2c4 {
i2c4m1-xfer {
rockchip,pins = <0x02 0x0a 0x02 0xff 0x02 0x09 0x02 0xff>;
phandle = <0x1e4>;
};
i2c4m0-xfer {
rockchip,pins = <0x04 0x0b 0x01 0xff 0x04 0x0a 0x01 0xff>;
phandle = <0xc4>;
};
};
emmc {
emmc-clk {
rockchip,pins = <0x01 0x15 0x01 0xfb>;
phandle = <0x1c7>;
};
emmc-datastrobe {
rockchip,pins = <0x01 0x16 0x01 0xfa>;
phandle = <0x1c9>;
};
emmc-bus8 {
rockchip,pins = <0x01 0x0c 0x01 0xfb 0x01 0x0d 0x01 0xfb 0x01 0x0e 0x01 0xfb 0x01 0x0f 0x01 0xfb 0x01 0x10 0x01 0xfb 0x01 0x11 0x01 0xfb 0x01 0x12 0x01 0xfb 0x01 0x13 0x01 0xfb>;
phandle = <0x1c6>;
};
emmc-cmd {
rockchip,pins = <0x01 0x14 0x01 0xfb>;
phandle = <0x1c8>;
};
emmc-rstnout {
rockchip,pins = <0x01 0x17 0x01 0xfa>;
phandle = <0x1c5>;
};
};
pwm15 {
pwm15m0-pins {
rockchip,pins = <0x03 0x15 0x01 0xfa>;
phandle = <0xeb>;
};
pwm15m1-pins {
rockchip,pins = <0x04 0x13 0x01 0xfa>;
phandle = <0x240>;
};
};
spdif {
spdifm1-tx {
rockchip,pins = <0x03 0x15 0x02 0xfa>;
phandle = <0x253>;
};
spdifm0-tx {
rockchip,pins = <0x01 0x04 0x04 0xfa>;
phandle = <0xb9>;
};
spdifm2-tx {
rockchip,pins = <0x04 0x14 0x02 0xfa>;
phandle = <0x254>;
};
};
pcie30x2 {
pcie30x2m2-pins {
rockchip,pins = <0x04 0x12 0x04 0xfa 0x04 0x14 0x04 0xfa 0x04 0x13 0x04 0xfa>;
phandle = <0x226>;
};
pcie30x2m1-pins {
rockchip,pins = <0x02 0x1c 0x04 0xfa 0x02 0x1e 0x04 0xfa 0x02 0x1d 0x04 0xfa>;
phandle = <0x225>;
};
pcie30x2-buttonrstn {
rockchip,pins = <0x00 0x08 0x03 0xfa>;
phandle = <0x227>;
};
pcie30x2m0-pins {
rockchip,pins = <0x00 0x06 0x02 0xfa 0x00 0x16 0x03 0xfa 0x00 0x15 0x03 0xfa>;
phandle = <0x224>;
};
};
can0 {
can0m0-pins {
rockchip,pins = <0x00 0x0c 0x02 0xfa 0x00 0x0b 0x02 0xfa>;
phandle = <0x1b5>;
};
can0m1-pins {
rockchip,pins = <0x02 0x02 0x04 0xfa 0x02 0x01 0x04 0xfa>;
phandle = <0x1b6>;
};
};
uart9 {
uart9m0-rtsn {
rockchip,pins = <0x02 0x13 0x03 0xfa>;
phandle = <0x27b>;
};
uart9m2-xfer {
rockchip,pins = <0x04 0x05 0x04 0xfc 0x04 0x04 0x04 0xfc>;
phandle = <0x27d>;
};
uart9m0-ctsn {
rockchip,pins = <0x02 0x14 0x03 0xfa>;
phandle = <0x27a>;
};
uart9m1-xfer {
rockchip,pins = <0x04 0x16 0x04 0xfc 0x04 0x15 0x04 0xfc>;
phandle = <0x27c>;
};
uart9m0-xfer {
rockchip,pins = <0x02 0x07 0x03 0xfc 0x02 0x08 0x03 0xfc>;
phandle = <0xdf>;
};
};
pcfg-pull-up {
phandle = <0xfc>;
bias-pull-up;
};
spi3 {
spi3m1-cs0 {
rockchip,pins = <0x04 0x16 0x02 0xfa>;
phandle = <0x25d>;
};
spi3m0-cs1 {
rockchip,pins = <0x04 0x07 0x04 0xfa>;
phandle = <0xd3>;
};
spi3m1-cs1 {
rockchip,pins = <0x04 0x19 0x02 0xfa>;
phandle = <0x25e>;
};
spi3m1-pins {
rockchip,pins = <0x04 0x12 0x02 0xfa 0x04 0x15 0x02 0xfa 0x04 0x13 0x02 0xfa>;
phandle = <0x25c>;
};
spi3m0-pins {
rockchip,pins = <0x04 0x0b 0x04 0xfa 0x04 0x08 0x04 0xfa 0x04 0x0a 0x04 0xfa>;
phandle = <0xd4>;
};
spi3m0-cs0 {
rockchip,pins = <0x04 0x06 0x04 0xfa>;
phandle = <0xd2>;
};
};
spi1-hs {
spi1m0-cs0 {
rockchip,pins = <0x02 0x10 0x04 0x102>;
phandle = <0x284>;
};
spi1m1-pins {
rockchip,pins = <0x03 0x13 0x03 0x102 0x03 0x12 0x03 0x102 0x03 0x11 0x03 0x102>;
phandle = <0x286>;
};
spi1m1-cs0 {
rockchip,pins = <0x03 0x01 0x03 0x102>;
phandle = <0x287>;
};
spi1m0-pins {
rockchip,pins = <0x02 0x0d 0x03 0x102 0x02 0x0e 0x03 0x102 0x02 0x0f 0x04 0x102>;
phandle = <0xcd>;
};
spi1m0-cs1 {
rockchip,pins = <0x02 0x16 0x03 0x102>;
phandle = <0x285>;
};
};
bt656 {
bt656m1-pins {
rockchip,pins = <0x04 0x0c 0x05 0xfa 0x03 0x16 0x05 0xfa 0x03 0x17 0x05 0xfa 0x03 0x18 0x05 0xfa 0x03 0x19 0x05 0xfa 0x03 0x1a 0x05 0xfa 0x03 0x1b 0x05 0xfa 0x03 0x1c 0x05 0xfa 0x03 0x1d 0x05 0xfa>;
phandle = <0x1b1>;
};
bt656m0-pins {
rockchip,pins = <0x03 0x00 0x02 0xfa 0x02 0x18 0x02 0xfa 0x02 0x19 0x02 0xfa 0x02 0x1a 0x02 0xfa 0x02 0x1b 0x02 0xfa 0x02 0x1c 0x02 0xfa 0x02 0x1d 0x02 0xfa 0x02 0x1e 0x02 0xfa 0x02 0x1f 0x02 0xfa>;
phandle = <0x1b0>;
};
};
i2s2 {
i2s2m1-mclk {
rockchip,pins = <0x04 0x0e 0x05 0xfa>;
phandle = <0x20d>;
};
i2s2m0-mclk {
rockchip,pins = <0x02 0x11 0x01 0xfa>;
phandle = <0x209>;
};
i2s2m1-sdo {
rockchip,pins = <0x04 0x0b 0x05 0xfa>;
phandle = <0x211>;
};
i2s2m0-lrcktx {
rockchip,pins = <0x02 0x13 0x01 0xfa>;
phandle = <0xac>;
};
i2s2m0-sdi {
rockchip,pins = <0x02 0x15 0x01 0xfa>;
phandle = <0xad>;
};
i2s2m1-lrcktx {
rockchip,pins = <0x04 0x04 0x05 0xfa>;
phandle = <0x20c>;
};
i2s2m0-lrckrx {
rockchip,pins = <0x02 0x10 0x01 0xfa>;
phandle = <0x208>;
};
i2s2m1-lrckrx {
rockchip,pins = <0x04 0x05 0x05 0xfa>;
phandle = <0x20b>;
};
i2s2m0-sclktx {
rockchip,pins = <0x02 0x12 0x01 0xfa>;
phandle = <0xab>;
};
i2s2m1-sclktx {
rockchip,pins = <0x04 0x0f 0x04 0xfa>;
phandle = <0x20f>;
};
i2s2m0-sclkrx {
rockchip,pins = <0x02 0x0f 0x01 0xfa>;
phandle = <0x20a>;
};
i2s2m1-sclkrx {
rockchip,pins = <0x04 0x11 0x05 0xfa>;
phandle = <0x20e>;
};
i2s2m1-sdi {
rockchip,pins = <0x04 0x0a 0x05 0xfa>;
phandle = <0x210>;
};
i2s2m0-sdo {
rockchip,pins = <0x02 0x14 0x01 0xfa>;
phandle = <0xae>;
};
};
i2c2 {
i2c2m1-xfer {
rockchip,pins = <0x04 0x0d 0x01 0xff 0x04 0x0c 0x01 0xff>;
phandle = <0x1e2>;
};
i2c2m0-xfer {
rockchip,pins = <0x00 0x0d 0x01 0xff 0x00 0x0e 0x01 0xff>;
phandle = <0xbf>;
};
};
gmac-txd-level3 {
gmac1m1-rgmii-bus-level3 {
rockchip,pins = <0x04 0x01 0x03 0xfa 0x04 0x02 0x03 0xfa 0x03 0x1e 0x03 0x103 0x03 0x1f 0x03 0x103>;
phandle = <0x297>;
};
gmac1m1-tx-bus2-level3 {
rockchip,pins = <0x04 0x04 0x03 0x103 0x04 0x05 0x03 0x103 0x04 0x06 0x03 0xfa>;
phandle = <0x296>;
};
gmac1m0-rgmii-bus-level3 {
rockchip,pins = <0x03 0x04 0x03 0xfa 0x03 0x05 0x03 0xfa 0x03 0x02 0x03 0x103 0x03 0x03 0x03 0x103>;
phandle = <0x295>;
};
gmac1m0-tx-bus2-level3 {
rockchip,pins = <0x03 0x0d 0x03 0x103 0x03 0x0e 0x03 0x103 0x03 0x0f 0x03 0xfa>;
phandle = <0x294>;
};
gmac0-tx-bus2-level3 {
rockchip,pins = <0x02 0x0b 0x01 0x103 0x02 0x0c 0x01 0x103 0x02 0x0d 0x01 0xfa>;
phandle = <0x292>;
};
gmac0-rgmii-bus-level3 {
rockchip,pins = <0x02 0x03 0x02 0xfa 0x02 0x04 0x02 0xfa 0x02 0x06 0x02 0x103 0x02 0x07 0x02 0x103>;
phandle = <0x293>;
};
};
pwm8 {
pwm8m1-pins {
rockchip,pins = <0x01 0x1d 0x04 0xfa>;
phandle = <0x239>;
};
pwm8m0-pins {
rockchip,pins = <0x03 0x09 0x05 0xfa>;
phandle = <0xe4>;
};
};
pmic {
pmic-pins {
rockchip,pins = <0x00 0x02 0x01 0xfa>;
phandle = <0x233>;
};
soc_slppin_gpio {
rockchip,pins = <0x00 0x02 0x00 0x100>;
phandle = <0x3a>;
};
soc_slppin_slp {
rockchip,pins = <0x00 0x02 0x01 0xfc>;
phandle = <0x38>;
};
pmic_int {
rockchip,pins = <0x00 0x03 0x00 0xfc>;
phandle = <0x37>;
};
soc_slppin_rst {
rockchip,pins = <0x00 0x02 0x02 0xfa>;
phandle = <0x234>;
};
};
jtag {
jtag-pins {
rockchip,pins = <0x01 0x1f 0x02 0xfa 0x02 0x00 0x02 0xfa>;
phandle = <0x219>;
};
};
gmac1 {
gmac1m1-clkinout {
rockchip,pins = <0x04 0x11 0x03 0xfa>;
phandle = <0x1de>;
};
gmac1m1-rx-er {
rockchip,pins = <0x04 0x0a 0x03 0xfa>;
phandle = <0x1df>;
};
gmac1m1-rgmii-clk {
rockchip,pins = <0x04 0x03 0x03 0xfa 0x04 0x00 0x03 0xfe>;
phandle = <0x7f>;
};
gmac1m1-miim {
rockchip,pins = <0x04 0x0e 0x03 0xfa 0x04 0x0f 0x03 0xfa>;
phandle = <0x7c>;
};
gmac1m0-rx-bus2 {
rockchip,pins = <0x03 0x09 0x03 0xfa 0x03 0x0a 0x03 0xfa 0x03 0x0b 0x03 0xfa>;
phandle = <0x1da>;
};
gmac1m0-rgmii-bus {
rockchip,pins = <0x03 0x04 0x03 0xfa 0x03 0x05 0x03 0xfa 0x03 0x02 0x03 0xfd 0x03 0x03 0x03 0xfd>;
phandle = <0x1dd>;
};
gmac1m0-miim {
rockchip,pins = <0x03 0x14 0x03 0xfa 0x03 0x15 0x03 0xfa>;
phandle = <0x1d7>;
};
gmac1m1-tx-bus2 {
rockchip,pins = <0x04 0x04 0x03 0xfd 0x04 0x05 0x03 0xfd 0x04 0x06 0x03 0xfa>;
phandle = <0x7d>;
};
gmac1m1-rgmii-bus {
rockchip,pins = <0x04 0x01 0x03 0xfa 0x04 0x02 0x03 0xfa 0x03 0x1e 0x03 0xfd 0x03 0x1f 0x03 0xfd>;
phandle = <0x80>;
};
gmac1m0-rgmii-clk {
rockchip,pins = <0x03 0x07 0x03 0xfa 0x03 0x06 0x03 0xfe>;
phandle = <0x1dc>;
};
gmac1m0-clkinout {
rockchip,pins = <0x03 0x10 0x03 0xfa>;
phandle = <0x1d8>;
};
gmac1m0-rx-er {
rockchip,pins = <0x03 0x0c 0x03 0xfa>;
phandle = <0x1d9>;
};
gmac1m0-tx-bus2 {
rockchip,pins = <0x03 0x0d 0x03 0xfd 0x03 0x0e 0x03 0xfd 0x03 0x0f 0x03 0xfa>;
phandle = <0x1db>;
};
gmac1m1-rx-bus2 {
rockchip,pins = <0x04 0x07 0x03 0xfa 0x04 0x08 0x03 0xfa 0x04 0x09 0x03 0xfa>;
phandle = <0x7e>;
};
};
pcfg-pull-none {
bias-disable;
phandle = <0xfa>;
};
pwm13 {
pwm13m1-pins {
rockchip,pins = <0x04 0x16 0x01 0xfa>;
phandle = <0x23e>;
};
pwm13m0-pins {
rockchip,pins = <0x03 0x10 0x02 0xfa>;
phandle = <0xe9>;
};
};
acodec {
acodec-pins {
rockchip,pins = <0x01 0x09 0x05 0xfa 0x01 0x01 0x05 0xfa 0x01 0x00 0x05 0xfa 0x01 0x07 0x05 0xfa 0x01 0x08 0x05 0xfa 0x01 0x03 0x05 0xfa 0x01 0x05 0x05 0xfa>;
phandle = <0xba>;
};
};
gpio@fe750000 {
gpio-controller;
interrupts = <0x00 0x23 0x04>;
clocks = <0x1f 0x165 0x1f 0x166>;
compatible = "rockchip,gpio-bank";
#interrupt-cells = <0x02>;
reg = <0x00 0xfe750000 0x00 0x100>;
phandle = <0x108>;
#gpio-cells = <0x02>;
gpio-ranges = <0xf9 0x00 0x40 0x20>;
interrupt-controller;
};
uart7 {
uart7m2-xfer {
rockchip,pins = <0x04 0x03 0x04 0xfc 0x04 0x02 0x04 0xfc>;
phandle = <0x276>;
};
uart7m0-ctsn {
rockchip,pins = <0x02 0x12 0x03 0xfa>;
phandle = <0x273>;
};
uart7m1-xfer {
rockchip,pins = <0x03 0x15 0x04 0xfc 0x03 0x14 0x04 0xfc>;
phandle = <0x275>;
};
uart7m0-xfer {
rockchip,pins = <0x02 0x05 0x03 0xfc 0x02 0x06 0x03 0xfc>;
phandle = <0xdd>;
};
uart7m0-rtsn {
rockchip,pins = <0x02 0x11 0x03 0xfa>;
phandle = <0x274>;
};
};
spi1 {
spi1m0-cs0 {
rockchip,pins = <0x02 0x10 0x04 0xfa>;
phandle = <0xca>;
};
spi1m1-pins {
rockchip,pins = <0x03 0x13 0x03 0xfa 0x03 0x12 0x03 0xfa 0x03 0x11 0x03 0xfa>;
phandle = <0x257>;
};
spi1m1-cs0 {
rockchip,pins = <0x03 0x01 0x03 0xfa>;
phandle = <0x258>;
};
spi1m0-pins {
rockchip,pins = <0x02 0x0d 0x03 0xfa 0x02 0x0e 0x03 0xfa 0x02 0x0f 0x04 0xfa>;
phandle = <0xcc>;
};
spi1m0-cs1 {
rockchip,pins = <0x02 0x16 0x03 0xfa>;
phandle = <0xcb>;
};
};
pcfg-output-low-pull-down {
bias-pull-down;
phandle = <0x100>;
output-low;
};
sdio-pwrseq {
wifi-enable-h {
rockchip,pins = <0x02 0x09 0x00 0xfa>;
phandle = <0x107>;
};
};
pcfg-pull-up-drv-level-1 {
drive-strength = <0x01>;
phandle = <0x102>;
bias-pull-up;
};
pcfg-pull-none-smt {
bias-disable;
input-schmitt-enable;
phandle = <0xff>;
};
i2c0 {
i2c0-xfer {
rockchip,pins = <0x00 0x09 0x01 0xff 0x00 0x0a 0x01 0xff>;
phandle = <0x34>;
};
};
pwm6 {
pwm6-pins {
rockchip,pins = <0x00 0x15 0x01 0xfa>;
phandle = <0xe2>;
};
};
pwm11 {
pwm11m1-pins {
rockchip,pins = <0x04 0x10 0x03 0xfa>;
phandle = <0x23c>;
};
pwm11m0-pins {
rockchip,pins = <0x03 0x0e 0x05 0xfa>;
phandle = <0xe7>;
};
};
bt1120 {
bt1120-pins {
rockchip,pins = <0x03 0x06 0x02 0xfa 0x03 0x01 0x02 0xfa 0x03 0x02 0x02 0xfa 0x03 0x03 0x02 0xfa 0x03 0x04 0x02 0xfa 0x03 0x05 0x02 0xfa 0x03 0x07 0x02 0xfa 0x03 0x08 0x02 0xfa 0x03 0x09 0x02 0xfa 0x03 0x0a 0x02 0xfa 0x03 0x0b 0x02 0xfa 0x03 0x0c 0x02 0xfa 0x03 0x0d 0x02 0xfa 0x03 0x0e 0x02 0xfa 0x03 0x11 0x02 0xfa 0x03 0x12 0x02 0xfa 0x03 0x13 0x02 0xfa>;
phandle = <0x1b2>;
};
};
uart5 {
uart5m0-ctsn {
rockchip,pins = <0x01 0x1f 0x03 0xfa>;
phandle = <0x26d>;
};
uart5m1-xfer {
rockchip,pins = <0x03 0x13 0x04 0xfc 0x03 0x12 0x04 0xfc>;
phandle = <0x26f>;
};
uart5m0-xfer {
rockchip,pins = <0x02 0x01 0x03 0xfc 0x02 0x02 0x03 0xfc>;
phandle = <0xdb>;
};
uart5m0-rtsn {
rockchip,pins = <0x02 0x00 0x03 0xfa>;
phandle = <0x26e>;
};
};
flash {
flash-pins {
rockchip,pins = <0x01 0x18 0x02 0xfa 0x01 0x16 0x03 0xfa 0x01 0x1b 0x02 0xfa 0x01 0x1c 0x02 0xfa 0x01 0x0c 0x02 0xfa 0x01 0x0d 0x02 0xfa 0x01 0x0e 0x02 0xfa 0x01 0x0f 0x02 0xfa 0x01 0x10 0x02 0xfa 0x01 0x11 0x02 0xfa 0x01 0x12 0x02 0xfa 0x01 0x13 0x02 0xfa 0x01 0x15 0x02 0xfa 0x01 0x1a 0x02 0xfa 0x01 0x19 0x02 0xfa 0x00 0x07 0x01 0xfa 0x01 0x17 0x03 0xfa 0x01 0x14 0x02 0xfa>;
phandle = <0x1cd>;
};
};
vop {
vopm0-pins {
rockchip,pins = <0x00 0x13 0x02 0xfa>;
phandle = <0x27e>;
};
vopm1-pins {
rockchip,pins = <0x03 0x14 0x02 0xfa>;
phandle = <0x27f>;
};
};
pwm4 {
pwm4-pins {
rockchip,pins = <0x00 0x13 0x01 0xfa>;
phandle = <0xe0>;
};
};
pcfg-pull-none-drv-level-2 {
drive-strength = <0x02>;
bias-disable;
phandle = <0xfd>;
};
uart3 {
uart3m0-ctsn {
rockchip,pins = <0x01 0x03 0x02 0xfa>;
phandle = <0x267>;
};
uart3m1-xfer {
rockchip,pins = <0x03 0x10 0x04 0xfc 0x03 0x0f 0x04 0xfc>;
phandle = <0x269>;
};
uart3m0-xfer {
rockchip,pins = <0x01 0x00 0x02 0xfc 0x01 0x01 0x02 0xfc>;
phandle = <0xd9>;
};
uart3m0-rtsn {
rockchip,pins = <0x01 0x02 0x02 0xfa>;
phandle = <0x268>;
};
};
hdmitx {
hdmitx-scl {
rockchip,pins = <0x04 0x17 0x01 0xfa>;
phandle = <0x91>;
};
hdmitx-sda {
rockchip,pins = <0x04 0x18 0x01 0xfa>;
phandle = <0x92>;
};
hdmitxm0-cec {
rockchip,pins = <0x04 0x19 0x01 0xfa>;
phandle = <0x93>;
};
hdmitxm1-cec {
rockchip,pins = <0x00 0x17 0x01 0xfa>;
phandle = <0x1e1>;
};
};
sdmmc2 {
sdmmc2m1-clk {
rockchip,pins = <0x03 0x06 0x05 0xfb>;
phandle = <0x24f>;
};
sdmmc2m0-det {
rockchip,pins = <0x03 0x1c 0x03 0xfc>;
phandle = <0x24c>;
};
sdmmc2m0-pwren {
rockchip,pins = <0x03 0x1d 0x03 0xfa>;
phandle = <0x24d>;
};
sdmmc2m1-det {
rockchip,pins = <0x03 0x07 0x04 0xfc>;
phandle = <0x251>;
};
sdmmc2m0-cmd {
rockchip,pins = <0x03 0x1a 0x03 0xfb>;
phandle = <0x24b>;
};
sdmmc2m1-pwren {
rockchip,pins = <0x03 0x08 0x04 0xfa>;
phandle = <0x252>;
};
sdmmc2m1-bus4 {
rockchip,pins = <0x03 0x01 0x05 0xfb 0x03 0x02 0x05 0xfb 0x03 0x03 0x05 0xfb 0x03 0x04 0x05 0xfb>;
phandle = <0x24e>;
};
sdmmc2m0-clk {
rockchip,pins = <0x03 0x1b 0x03 0xfb>;
phandle = <0x24a>;
};
sdmmc2m1-cmd {
rockchip,pins = <0x03 0x05 0x05 0xfb>;
phandle = <0x250>;
};
sdmmc2m0-bus4 {
rockchip,pins = <0x03 0x16 0x03 0xfb 0x03 0x17 0x03 0xfb 0x03 0x18 0x03 0xfb 0x03 0x19 0x03 0xfb>;
phandle = <0x249>;
};
};
gpio@fe760000 {
gpio-controller;
interrupts = <0x00 0x24 0x04>;
clocks = <0x1f 0x167 0x1f 0x168>;
compatible = "rockchip,gpio-bank";
#interrupt-cells = <0x02>;
reg = <0x00 0xfe760000 0x00 0x100>;
phandle = <0xc2>;
#gpio-cells = <0x02>;
gpio-ranges = <0xf9 0x00 0x60 0x20>;
interrupt-controller;
};
spi3-hs {
spi3m1-cs0 {
rockchip,pins = <0x04 0x16 0x02 0x102>;
phandle = <0x290>;
};
spi3m0-cs1 {
rockchip,pins = <0x04 0x07 0x04 0x102>;
phandle = <0x28e>;
};
spi3m1-cs1 {
rockchip,pins = <0x04 0x19 0x02 0x102>;
phandle = <0x291>;
};
spi3m1-pins {
rockchip,pins = <0x04 0x12 0x02 0x102 0x04 0x15 0x02 0x102 0x04 0x13 0x02 0x102>;
phandle = <0x28f>;
};
spi3m0-pins {
rockchip,pins = <0x04 0x0b 0x04 0x102 0x04 0x08 0x04 0x102 0x04 0x0a 0x04 0x102>;
phandle = <0xd5>;
};
spi3m0-cs0 {
rockchip,pins = <0x04 0x06 0x04 0x102>;
phandle = <0x28d>;
};
};
pwm2 {
pwm2m1-pins {
rockchip,pins = <0x00 0x0e 0x04 0xfa>;
phandle = <0x238>;
};
pwm2m0-pins {
rockchip,pins = <0x00 0x11 0x01 0xfa>;
phandle = <0x44>;
};
};
sata1 {
sata1-pins {
rockchip,pins = <0x04 0x15 0x03 0xfa>;
phandle = <0x244>;
};
};
spi0-hs {
spi0m0-cs0 {
rockchip,pins = <0x00 0x16 0x02 0x102>;
phandle = <0x280>;
};
spi0m1-cs0 {
rockchip,pins = <0x02 0x1a 0x03 0x102>;
phandle = <0x283>;
};
spi0m1-pins {
rockchip,pins = <0x02 0x1b 0x03 0x102 0x02 0x18 0x03 0x102 0x02 0x19 0x03 0x102>;
phandle = <0x282>;
};
spi0m0-cs1 {
rockchip,pins = <0x00 0x14 0x02 0x102>;
phandle = <0x281>;
};
spi0m0-pins {
rockchip,pins = <0x00 0x0d 0x02 0x102 0x00 0x15 0x02 0x102 0x00 0x0e 0x02 0x102>;
phandle = <0xc9>;
};
};
pmu {
pmu-pins {
rockchip,pins = <0x00 0x05 0x04 0xfa 0x00 0x06 0x03 0xfa 0x00 0x14 0x04 0xfa 0x00 0x15 0x04 0xfa 0x00 0x16 0x04 0xfa 0x00 0x17 0x04 0xfa>;
phandle = <0x235>;
};
};
scr {
scr-pins {
rockchip,pins = <0x01 0x02 0x03 0xfa 0x01 0x07 0x03 0xfc 0x01 0x03 0x03 0xfc 0x01 0x05 0x03 0xfa>;
phandle = <0xbb>;
};
};
uart1 {
uart1m0-ctsn {
rockchip,pins = <0x02 0x0e 0x02 0xfa>;
phandle = <0xd7>;
};
uart1m1-xfer {
rockchip,pins = <0x03 0x1f 0x04 0xfc 0x03 0x1e 0x04 0xfc>;
phandle = <0x263>;
};
uart1m0-xfer {
rockchip,pins = <0x02 0x0b 0x02 0xfc 0x02 0x0c 0x02 0xfc>;
phandle = <0xd6>;
};
uart1m1-rtsn {
rockchip,pins = <0x04 0x0e 0x04 0xfa>;
phandle = <0x265>;
};
uart1m0-rtsn {
rockchip,pins = <0x02 0x0d 0x02 0xfa>;
phandle = <0x10a>;
};
uart1m1-ctsn {
rockchip,pins = <0x04 0x11 0x04 0xfa>;
phandle = <0x264>;
};
};
i2c5 {
i2c5m1-xfer {
rockchip,pins = <0x04 0x17 0x02 0xff 0x04 0x18 0x02 0xff>;
phandle = <0x1e5>;
};
i2c5m0-xfer {
rockchip,pins = <0x03 0x0b 0x04 0xff 0x03 0x0c 0x04 0xff>;
phandle = <0xc5>;
};
};
sdmmc0 {
sdmmc0-det {
rockchip,pins = <0x00 0x04 0x01 0xfc>;
phandle = <0xa1>;
};
sdmmc0-pwren {
rockchip,pins = <0x00 0x05 0x01 0xfa>;
phandle = <0x246>;
};
sdmmc0-bus4 {
rockchip,pins = <0x01 0x1d 0x01 0xfb 0x01 0x1e 0x01 0xfb 0x01 0x1f 0x01 0xfb 0x02 0x00 0x01 0xfb>;
phandle = <0x9e>;
};
sdmmc0-cmd {
rockchip,pins = <0x02 0x01 0x01 0xfb>;
phandle = <0xa0>;
};
sdmmc0-clk {
rockchip,pins = <0x02 0x02 0x01 0xfb>;
phandle = <0x9f>;
};
};
pwm0 {
pwm0m1-pins {
rockchip,pins = <0x00 0x17 0x02 0xfa>;
phandle = <0x236>;
};
pwm0m0-pins {
rockchip,pins = <0x00 0x0f 0x01 0xfa>;
phandle = <0x42>;
};
};
cif {
cif-dvp-clk {
rockchip,pins = <0x04 0x11 0x01 0xfa 0x04 0x0e 0x01 0xfa 0x04 0x0f 0x01 0xfa>;
phandle = <0x1bc>;
};
cif-clk {
rockchip,pins = <0x04 0x10 0x01 0xfa>;
phandle = <0x1bb>;
};
cif-dvp-bus8 {
rockchip,pins = <0x03 0x16 0x01 0xfa 0x03 0x17 0x01 0xfa 0x03 0x18 0x01 0xfa 0x03 0x19 0x01 0xfa 0x03 0x1a 0x01 0xfa 0x03 0x1b 0x01 0xfa 0x03 0x1c 0x01 0xfa 0x03 0x1d 0x01 0xfa>;
phandle = <0x1be>;
};
cif-dvp-bus16 {
rockchip,pins = <0x03 0x1e 0x01 0xfa 0x03 0x1f 0x01 0xfa 0x04 0x00 0x01 0xfa 0x04 0x01 0x01 0xfa 0x04 0x02 0x01 0xfa 0x04 0x03 0x01 0xfa 0x04 0x04 0x01 0xfa 0x04 0x05 0x01 0xfa>;
phandle = <0x1bd>;
};
};
can1 {
can1m1-pins {
rockchip,pins = <0x04 0x12 0x03 0xfa 0x04 0x13 0x03 0xfa>;
phandle = <0x1b8>;
};
can1m0-pins {
rockchip,pins = <0x01 0x00 0x03 0xfa 0x01 0x01 0x03 0xfa>;
phandle = <0x1b7>;
};
};
pcie20 {
pcie20-buttonrstn {
rockchip,pins = <0x00 0x0c 0x03 0xfa>;
phandle = <0x21f>;
};
pcie20m2-pins {
rockchip,pins = <0x01 0x08 0x04 0xfa 0x01 0x0a 0x04 0xfa 0x01 0x09 0x04 0xfa>;
phandle = <0x21e>;
};
pcie20m1-pins {
rockchip,pins = <0x02 0x18 0x04 0xfa 0x03 0x11 0x04 0xfa 0x02 0x19 0x04 0xfa>;
phandle = <0x21d>;
};
pcie20m0-pins {
rockchip,pins = <0x00 0x05 0x03 0xfa 0x00 0x0e 0x03 0xfa 0x00 0x0d 0x03 0xfa>;
phandle = <0x21c>;
};
};
wireless-wlan {
wifi-host-wake-irq {
rockchip,pins = <0x02 0x0a 0x00 0x101>;
phandle = <0x109>;
};
};
i2s3 {
i2s3m0-lrck {
rockchip,pins = <0x03 0x04 0x04 0xfa>;
phandle = <0xb0>;
};
i2s3m1-mclk {
rockchip,pins = <0x04 0x12 0x05 0xfa>;
phandle = <0x214>;
};
i2s3m0-sdo {
rockchip,pins = <0x03 0x05 0x04 0xfa>;
phandle = <0xb2>;
};
i2s3m0-mclk {
rockchip,pins = <0x03 0x02 0x04 0xfa>;
phandle = <0x212>;
};
i2s3m1-sdo {
rockchip,pins = <0x04 0x15 0x05 0xfa>;
phandle = <0x217>;
};
i2s3m0-sdi {
rockchip,pins = <0x03 0x06 0x04 0xfa>;
phandle = <0xb1>;
};
i2s3m1-sclk {
rockchip,pins = <0x04 0x13 0x05 0xfa>;
phandle = <0x215>;
};
i2s3m1-sdi {
rockchip,pins = <0x04 0x16 0x05 0xfa>;
phandle = <0x216>;
};
i2s3m1-lrck {
rockchip,pins = <0x04 0x14 0x05 0xfa>;
phandle = <0x213>;
};
i2s3m0-sclk {
rockchip,pins = <0x03 0x03 0x04 0xfa>;
phandle = <0xaf>;
};
};
};
external-camera-imx219-clock {
clock-output-names = "ext_cam_imx219_clk";
#clock-cells = <0x00>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
phandle = <0xbd>;
};
timer@fe5f0000 {
clock-names = "pclk\0timer";
interrupts = <0x00 0x6d 0x04>;
clocks = <0x1f 0x16c 0x1f 0x16d>;
compatible = "rockchip,rk3568-timer\0rockchip,rk3288-timer";
reg = <0x00 0xfe5f0000 0x00 0x1000>;
phandle = <0x18a>;
};
qos@fe158280 {
compatible = "syscon";
reg = <0x00 0xfe158280 0x00 0x20>;
phandle = <0x52>;
};
serial@fe6a0000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xdc>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x7a 0x04>;
clocks = <0x1f 0x133 0x1f 0x130>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe6a0000 0x00 0x100>;
phandle = <0x195>;
dmas = <0x40 0x0c 0x40 0x0d>;
reg-shift = <0x02>;
};
qos@fe138100 {
compatible = "syscon";
reg = <0x00 0xfe138100 0x00 0x20>;
phandle = <0x57>;
};
interrupt-controller@fd400000 {
#address-cells = <0x02>;
interrupts = <0x01 0x09 0x04>;
#size-cells = <0x02>;
compatible = "arm,gic-v3";
ranges;
#interrupt-cells = <0x03>;
reg = <0x00 0xfd400000 0x00 0x10000 0x00 0xfd460000 0x00 0xc0000>;
phandle = <0x01>;
interrupt-controller;
interrupt-controller@fd440000 {
msi-controller;
compatible = "arm,gic-v3-its";
reg = <0x00 0xfd440000 0x00 0x20000>;
phandle = <0x9b>;
#msi-cells = <0x01>;
};
};
i2s@fe430000 {
pinctrl-names = "default";
rockchip,cru = <0x1f>;
pinctrl-0 = <0xaf 0xb0 0xb1 0xb2>;
clock-names = "mclk_tx\0mclk_rx\0hclk";
resets = <0x1f 0x55 0x1f 0x56>;
interrupts = <0x00 0x37 0x04>;
clocks = <0x1f 0x53 0x1f 0x57 0x1f 0x3c>;
dma-names = "tx\0rx";
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-i2s-tdm";
status = "disabled";
rockchip,grf = <0x32>;
reg = <0x00 0xfe430000 0x00 0x1000>;
phandle = <0x179>;
dmas = <0xa6 0x06 0xa6 0x07>;
reset-names = "tx-m\0rx-m";
rockchip,clk-trcm = <0x01>;
};
iommu@fdef0800 {
power-domains = <0x21 0x0a>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x38 0x04>;
clocks = <0x1f 0xf6 0x1f 0xf7>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
status = "okay";
interrupt-names = "iep_mmu";
reg = <0x00 0xfdef0800 0x00 0x100>;
phandle = <0x6c>;
};
rkscr@fe560000 {
pinctrl-names = "default";
pinctrl-0 = <0xbb>;
clock-names = "g_pclk_sim_card";
interrupts = <0x00 0x61 0x04>;
clocks = <0x1f 0x114>;
compatible = "rockchip-scr";
status = "disabled";
reg = <0x00 0xfe560000 0x00 0x10000>;
phandle = <0x17f>;
};
qos@fe1a8080 {
compatible = "syscon";
reg = <0x00 0xfe1a8080 0x00 0x20>;
phandle = <0x4c>;
};
phy@fe830000 {
rockchip,pipe-grf = <0xef>;
clock-names = "refclk\0apbclk\0pipe_clk";
assigned-clocks = <0x31 0x22>;
assigned-clock-rates = <0x5f5e100>;
resets = <0x1f 0x1c6 0x1f 0x1c7>;
clocks = <0x31 0x22 0x1f 0x17d 0x1f 0x7f>;
#phy-cells = <0x01>;
compatible = "rockchip,rk3568-naneng-combphy";
status = "okay";
rockchip,pipe-phy-grf = <0xf0>;
reg = <0x00 0xfe830000 0x00 0x100>;
phandle = <0x20>;
reset-names = "combphy-apb\0combphy";
};
watchdog@fe600000 {
clock-names = "tclk\0pclk";
interrupts = <0x00 0x95 0x04>;
clocks = <0x1f 0x116 0x1f 0x115>;
compatible = "snps,dw-wdt";
status = "okay";
reg = <0x00 0xfe600000 0x00 0x100>;
phandle = <0x18b>;
};
rkvenc@fdf40000 {
power-domains = <0x21 0x0e>;
iommus = <0x6d>;
clock-names = "aclk_vcodec\0hclk_vcodec\0clk_core";
assigned-clocks = <0x1f 0x103 0x1f 0x105>;
rockchip,normal-rates = <0x11b3dc40 0x00 0x11b3dc40>;
assigned-clock-rates = <0x11b3dc40 0x11b3dc40>;
resets = <0x1f 0x133 0x1f 0x134 0x1f 0x135>;
interrupts = <0x00 0x8c 0x04>;
clocks = <0x1f 0x103 0x1f 0x104 0x1f 0x105>;
node-name = "rkvenc";
rockchip,srv = <0x68>;
rockchip,taskqueue-node = <0x03>;
compatible = "rockchip,rkv-encoder-v1";
rockchip,resetgroup-node = <0x03>;
status = "okay";
interrupt-names = "irq_enc";
reg = <0x00 0xfdf40000 0x00 0x400>;
phandle = <0x15a>;
reset-names = "video_a\0video_h\0video_core";
operating-points-v2 = <0x6e>;
};
rk_rga@fdeb0000 {
power-domains = <0x21 0x0a>;
clock-names = "aclk_rga\0hclk_rga\0clk_rga";
interrupts = <0x00 0x5a 0x04>;
clocks = <0x1f 0xf3 0x1f 0xf4 0x1f 0xf5>;
compatible = "rockchip,rga2";
status = "okay";
reg = <0x00 0xfdeb0000 0x00 0x1000>;
phandle = <0x154>;
};
qos@fe128000 {
compatible = "syscon";
reg = <0x00 0xfe128000 0x00 0x20>;
phandle = <0x47>;
};
dmc {
downdifferential = <0x14>;
auto-min-freq = <0x4f1a0>;
clock-names = "dmc_clk";
interrupts = <0x00 0x0a 0x04>;
clocks = <0x02 0x03>;
upthreshold = <0x28>;
center-supply = <0x64>;
devfreq-events = <0x97>;
compatible = "rockchip,rk3568-dmc";
status = "okay";
interrupt-names = "complete";
phandle = <0x13>;
vop-bw-dmc-freq = <0x00 0x1f9 0x4f1a0 0x1fa 0x1869f 0x80e80>;
operating-points-v2 = <0x98>;
system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08>;
#cooling-cells = <0x02>;
auto-freq-en = <0x01>;
};
tsadc@fe710000 {
pinctrl-names = "gpio\0otpout";
pinctrl-0 = <0xec>;
clock-names = "tsadc\0apb_pclk";
rockchip,hw-tshut-polarity = <0x00>;
assigned-clocks = <0x1f 0x110 0x1f 0x111>;
assigned-clock-rates = <0x1036640 0xaae60>;
resets = <0x1f 0x182 0x1f 0x181 0x1f 0x1d7>;
interrupts = <0x00 0x73 0x04>;
rockchip,hw-tshut-mode = <0x00>;
clocks = <0x1f 0x111 0x1f 0x10f>;
#thermal-sensor-cells = <0x01>;
compatible = "rockchip,rk3568-tsadc";
pinctrl-1 = <0xed>;
status = "okay";
rockchip,grf = <0x32>;
reg = <0x00 0xfe710000 0x00 0x100>;
phandle = <0x1b>;
reset-names = "tsadc\0tsadc-apb\0tsadc-phy";
rockchip,hw-tshut-temp = <0x1d4c0>;
};
opp-table2 {
rockchip,pvtm-ch = <0x00 0x05>;
nvmem-cells = <0x66 0x07 0x08>;
compatible = "operating-points-v2";
nvmem-cell-names = "leakage\0pvtm\0mbist-vmin";
rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x16378 0x01 0x16379 0x186a0 0x02>;
phandle = <0x65>;
mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>;
opp-300000000 {
opp-microvolt = <0xcf850>;
opp-microvolt-L2 = <0xc96a8>;
opp-hz = <0x00 0x11e1a300>;
opp-microvolt-L0 = <0xcf850>;
opp-microvolt-L1 = <0xc96a8>;
};
opp-700000000 {
opp-microvolt = <0xe7ef0>;
opp-microvolt-L2 = <0xcf850>;
opp-hz = <0x00 0x29b92700>;
opp-microvolt-L0 = <0xe7ef0>;
opp-microvolt-L1 = <0xdbba0>;
};
opp-200000000 {
opp-microvolt = <0xcf850>;
opp-microvolt-L2 = <0xc96a8>;
opp-hz = <0x00 0xbebc200>;
opp-microvolt-L0 = <0xcf850>;
opp-microvolt-L1 = <0xc96a8>;
};
opp-400000000 {
opp-microvolt = <0xcf850>;
opp-microvolt-L2 = <0xc96a8>;
opp-hz = <0x00 0x17d78400>;
opp-microvolt-L0 = <0xcf850>;
opp-microvolt-L1 = <0xc96a8>;
};
opp-600000000 {
opp-microvolt = <0xd59f8>;
opp-microvolt-L2 = <0xc96a8>;
opp-hz = <0x00 0x23c34600>;
opp-microvolt-L0 = <0xd59f8>;
opp-microvolt-L1 = <0xc96a8>;
};
opp-800000000 {
opp-microvolt = <0x10c8e0>;
opp-microvolt-L2 = <0x100590>;
opp-hz = <0x00 0x2faf0800>;
opp-microvolt-L0 = <0x10c8e0>;
opp-microvolt-L1 = <0x100590>;
};
};
external-gmac1-clock {
clock-output-names = "gmac1_clkin";
#clock-cells = <0x00>;
clock-frequency = <0x7735940>;
compatible = "fixed-clock";
phandle = <0x126>;
};
qos@fe138080 {
compatible = "syscon";
reg = <0x00 0xfe138080 0x00 0x20>;
phandle = <0x56>;
};
serial@fe670000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xd9>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x77 0x04>;
clocks = <0x1f 0x127 0x1f 0x124>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe670000 0x00 0x100>;
phandle = <0x192>;
dmas = <0x40 0x06 0x40 0x07>;
reg-shift = <0x02>;
};
rkcif_dvp_sditf {
compatible = "rockchip,rkcif-sditf";
status = "disabled";
rockchip,cif = <0x73>;
phandle = <0x15d>;
};
vdpu@fdea0400 {
power-domains = <0x21 0x0b>;
iommus = <0x67>;
clock-names = "aclk_vcodec\0hclk_vcodec";
resets = <0x1f 0x11a 0x1f 0x11b>;
interrupts = <0x00 0x8b 0x04>;
clocks = <0x1f 0xee 0x1f 0xef>;
rockchip,srv = <0x68>;
rockchip,taskqueue-node = <0x00>;
compatible = "rockchip,vpu-decoder-v2";
rockchip,resetgroup-node = <0x00>;
status = "okay";
interrupt-names = "irq_dec";
reg = <0x00 0xfdea0400 0x00 0x400>;
phandle = <0x153>;
reset-names = "video_a\0video_h";
};
sdhci@fe310000 {
rockchip,txclk-tapnum = <0x08>;
clock-names = "core\0bus\0axi\0block\0timer";
assigned-clocks = <0x1f 0x7b 0x1f 0x7d>;
bus-width = <0x08>;
non-removable;
assigned-clock-rates = <0xbebc200 0x16e3600>;
interrupts = <0x00 0x13 0x04>;
clocks = <0x1f 0x7c 0x1f 0x7a 0x1f 0x79 0x1f 0x7b 0x1f 0x7d>;
compatible = "rockchip,dwcmshc-sdhci\0snps,dwcmshc-sdhci";
status = "okay";
reg = <0x00 0xfe310000 0x00 0x10000>;
phandle = <0x173>;
max-frequency = <0xbebc200>;
supports-emmc;
};
xpcs-gmac1-clock {
clock-output-names = "clk_gmac1_xpcs_mii";
#clock-cells = <0x00>;
clock-frequency = <0x7735940>;
compatible = "fixed-clock";
phandle = <0x127>;
};
mcp251x-clk {
#clock-cells = <0x00>;
clock-frequency = <0xf42400>;
compatible = "fixed-clock";
phandle = <0x2a4>;
};
syscon@fdca0000 {
compatible = "rockchip,rk3568-usb2phy-grf\0syscon";
reg = <0x00 0xfdca0000 0x00 0x8000>;
phandle = <0xf7>;
};
hdmi-sound {
simple-audio-card,name = "rockchip,hdmi";
simple-audio-card,format = "i2s";
compatible = "simple-audio-card";
status = "okay";
phandle = <0x2a6>;
simple-audio-card,mclk-fs = <0x80>;
simple-audio-card,cpu {
sound-dai = <0x10c>;
};
simple-audio-card,codec {
sound-dai = <0x10d>;
};
};
can@fe590000 {
clock-names = "baudclk\0apb_pclk";
resets = <0x1f 0x159 0x1f 0x158>;
interrupts = <0x00 0x03 0x04>;
clocks = <0x1f 0x145 0x1f 0x144>;
compatible = "rockchip,canfd-1.0";
status = "disabled";
tx-fifo-depth = <0x01>;
rx-fifo-depth = <0x06>;
reg = <0x00 0xfe590000 0x00 0x1000>;
phandle = <0x182>;
reset-names = "can\0can-apb";
};
mailbox@fe780000 {
clock-names = "pclk_mailbox";
interrupts = <0x00 0xb7 0x04 0x00 0xb8 0x04 0x00 0xb9 0x04 0x00 0xba 0x04>;
clocks = <0x1f 0x11b>;
#mbox-cells = <0x01>;
compatible = "rockchip,rk3568-mailbox\0rockchip,rk3368-mailbox";
status = "disabled";
reg = <0x00 0xfe780000 0x00 0x1000>;
phandle = <0x1a6>;
};
usb2-phy@fe8a0000 {
rockchip,usbgrf = <0xf7>;
clock-output-names = "usb480m_phy";
clock-names = "phyclk";
assigned-clocks = <0x1f 0x0b>;
assigned-clock-parents = <0x24>;
interrupts = <0x00 0x87 0x04>;
clocks = <0x31 0x13>;
#clock-cells = <0x00>;
compatible = "rockchip,rk3568-usb2phy";
status = "okay";
reg = <0x00 0xfe8a0000 0x00 0x10000>;
phandle = <0x24>;
host-port {
#phy-cells = <0x00>;
status = "disabled";
phandle = <0x25>;
};
otg-port {
#phy-cells = <0x00>;
status = "okay";
phandle = <0x23>;
};
};
edp-phy@fdcb0000 {
clock-names = "refclk\0pclk";
resets = <0x1f 0x1d6>;
clocks = <0x31 0x29 0x1f 0x192>;
#phy-cells = <0x00>;
compatible = "rockchip,rk3568-edp-phy";
status = "disabled";
reg = <0x00 0xfdcb0000 0x00 0x8000>;
phandle = <0x95>;
reset-names = "apb";
};
xin32k {
pinctrl-names = "default";
clock-output-names = "xin32k";
pinctrl-0 = <0x1e>;
#clock-cells = <0x00>;
clock-frequency = <0x8000>;
compatible = "fixed-clock";
phandle = <0x12e>;
};
sata@fc400000 {
power-domains = <0x21 0x0f>;
phy-names = "sata-phy";
clock-names = "sata\0pmalive\0rxoob";
interrupts = <0x00 0x5f 0x04>;
clocks = <0x1f 0x9b 0x1f 0x9c 0x1f 0x9d>;
compatible = "snps,dwc-ahci";
status = "disabled";
interrupt-names = "hostc";
phys = <0x20 0x01>;
reg = <0x00 0xfc400000 0x00 0x1000>;
phandle = <0x12f>;
ports-implemented = <0x01>;
};
video-phy@fe860000 {
power-domains = <0x21 0x09>;
clock-names = "ref\0pclk_phy\0pclk_host";
resets = <0x1f 0x1bc>;
clocks = <0x31 0x19 0x1f 0x17b 0x1f 0xe9>;
#clock-cells = <0x00>;
#phy-cells = <0x00>;
compatible = "rockchip,rk3568-video-phy";
status = "disabled";
reg = <0x00 0xfe860000 0x00 0x10000 0x00 0xfe070000 0x00 0x10000>;
phandle = <0x8f>;
reset-names = "rst";
};
ethernet@fe010000 {
pinctrl-names = "default";
phy-mode = "rgmii";
snps,mixed-burst;
snps,mtl-rx-config = <0x7a>;
snps,reset-active-low;
pinctrl-0 = <0x7c 0x7d 0x7e 0x7f 0x80>;
clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_refout\0aclk_mac\0pclk_mac\0clk_mac_speed\0ptp_ref\0pclk_xpcs";
assigned-clocks = <0x1f 0x189 0x1f 0x186>;
assigned-clock-parents = <0x1f 0x187 0x1f 0xc5>;
snps,mtl-tx-config = <0x7b>;
local-mac-address = [e6 c6 dc 45 51 9e];
assigned-clock-rates = <0x00 0x7735940>;
resets = <0x1f 0xec>;
interrupts = <0x00 0x20 0x04 0x00 0x1d 0x04>;
clocks = <0x1f 0x186 0x1f 0x189 0x1f 0x189 0x1f 0xc7 0x1f 0xc3 0x1f 0xc4 0x1f 0x189 0x1f 0xc8 0x1f 0xac>;
clock_in_out = "output";
snps,tso;
compatible = "rockchip,rk3568-gmac\0snps,dwmac-4.20a";
status = "okay";
rockchip,grf = <0x32>;
interrupt-names = "macirq\0eth_wake_irq";
snps,reset-gpio = <0x36 0x16 0x01>;
reg = <0x00 0xfe010000 0x00 0x10000>;
rx_delay = <0x24>;
phandle = <0x161>;
phy-handle = <0x81>;
reset-names = "stmmaceth";
tx_delay = <0x40>;
snps,axi-config = <0x79>;
snps,reset-delays-us = <0x00 0x4e20 0x186a0>;
mdio {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "snps,dwmac-mdio";
phandle = <0x162>;
phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x00>;
phandle = <0x81>;
};
};
tx-queues-config {
phandle = <0x7b>;
snps,tx-queues-to-use = <0x01>;
queue0 {
};
};
stmmac-axi-config {
snps,wr_osr_lmt = <0x04>;
phandle = <0x79>;
snps,blen = <0x00 0x00 0x00 0x00 0x10 0x08 0x04>;
snps,rd_osr_lmt = <0x08>;
};
rx-queues-config {
snps,rx-queues-to-use = <0x01>;
phandle = <0x7a>;
queue0 {
};
};
};
rkisp-vir1 {
#address-cells = <0x01>;
rockchip,hw = <0x76>;
#size-cells = <0x00>;
compatible = "rockchip,rkisp-vir";
status = "disabled";
phandle = <0x160>;
port {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
endpoint@0 {
remote-endpoint = <0x78>;
reg = <0x00>;
phandle = <0xf6>;
};
};
};
display-subsystem {
memory-region-names = "drm-logo\0drm-cubic-lut";
ports = <0x12>;
memory-region = <0x10 0x11>;
compatible = "rockchip,display-subsystem";
status = "okay";
devfreq = <0x13>;
phandle = <0x113>;
route {
route-hdmi {
logo,kernel = "logo_kernel.bmp";
cubic_lut,offset = <0x00>;
video,vrefresh = <0x3c>;
overscan,right_margin = <0x64>;
logo,offset = <0x186000>;
overscan,bottom_margin = <0x64>;
logo,width = <0x28e>;
logo,uboot = "logo.bmp";
video,crtc_hsync_end = <0x804>;
overscan,top_margin = <0x64>;
charge_logo,mode = "center";
video,hdisplay = <0x780>;
connect = <0x17>;
video,aspect_ratio = <0x02>;
overscan,left_margin = <0x64>;
logo,mode = "center";
status = "okay";
logo,bpp = <0x18>;
phandle = <0x117>;
video,vdisplay = <0x438>;
video,flags = <0x05>;
logo,height = <0x10e>;
video,crtc_vsync_end = <0x441>;
video,clock = <0x24414>;
logo,ymirror = <0x00>;
};
route-lvds {
logo,kernel = "logo_kernel.bmp";
logo,uboot = "logo.bmp";
charge_logo,mode = "center";
connect = <0x18>;
logo,mode = "center";
status = "disabled";
phandle = <0x118>;
};
route-dsi1 {
logo,kernel = "logo_kernel.bmp";
logo,uboot = "logo.bmp";
charge_logo,mode = "center";
connect = <0x15>;
logo,mode = "center";
status = "disabled";
phandle = <0x115>;
};
route-edp {
logo,kernel = "logo_kernel.bmp";
logo,uboot = "logo.bmp";
charge_logo,mode = "center";
connect = <0x16>;
logo,mode = "center";
status = "disabled";
phandle = <0x116>;
};
route-rgb {
logo,kernel = "logo_kernel.bmp";
logo,uboot = "logo.bmp";
charge_logo,mode = "center";
connect = <0x19>;
logo,mode = "center";
status = "disabled";
phandle = <0x119>;
};
route-dsi0 {
logo,kernel = "logo_kernel.bmp";
logo,uboot = "logo.bmp";
charge_logo,mode = "center";
connect = <0x14>;
logo,mode = "center";
status = "disabled";
phandle = <0x114>;
};
};
};
edp@fe0c0000 {
power-domains = <0x21 0x09>;
phy-names = "dp";
clock-names = "dp\0pclk\0spdif\0hclk";
resets = <0x1f 0x113 0x1f 0x112>;
interrupts = <0x00 0x12 0x04>;
clocks = <0x31 0x29 0x1f 0xea 0x1f 0xeb 0x1f 0xda>;
compatible = "rockchip,rk3568-edp";
status = "disabled";
phys = <0x95>;
reg = <0x00 0xfe0c0000 0x00 0x10000>;
phandle = <0x16c>;
reset-names = "dp\0apb";
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
phandle = <0x16d>;
endpoint@1 {
remote-endpoint = <0x96>;
status = "disabled";
reg = <0x01>;
phandle = <0x89>;
};
endpoint@0 {
remote-endpoint = <0x16>;
status = "disabled";
reg = <0x00>;
phandle = <0x85>;
};
};
};
};
spi@fe630000 {
pinctrl-names = "default\0high_speed";
#address-cells = <0x01>;
pinctrl-0 = <0xce 0xcf 0xd0>;
clock-names = "spiclk\0apb_pclk";
interrupts = <0x00 0x69 0x04>;
clocks = <0x1f 0x156 0x1f 0x155>;
#size-cells = <0x00>;
dma-names = "tx\0rx";
compatible = "rockchip,rk3066-spi";
pinctrl-1 = <0xce 0xcf 0xd1>;
status = "disabled";
reg = <0x00 0xfe630000 0x00 0x1000>;
phandle = <0x18e>;
dmas = <0x40 0x18 0x40 0x19>;
};
i2c@fe5d0000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0xc4>;
clock-names = "i2c\0pclk";
interrupts = <0x00 0x32 0x04>;
clocks = <0x1f 0x14e 0x1f 0x14d>;
#size-cells = <0x00>;
compatible = "rockchip,rk3399-i2c";
status = "disabled";
reg = <0x00 0xfe5d0000 0x00 0x1000>;
phandle = <0x188>;
};
clock-controller@fdd00000 {
#reset-cells = <0x01>;
assigned-clocks = <0x31 0x32>;
assigned-clock-parents = <0x31 0x05>;
#clock-cells = <0x01>;
rockchip,pmugrf = <0x33>;
compatible = "rockchip,rk3568-pmucru";
rockchip,grf = <0x32>;
reg = <0x00 0xfdd00000 0x00 0x1000>;
phandle = <0x31>;
};
arm-pmu {
interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
interrupts = <0x00 0xe4 0x04 0x00 0xe5 0x04 0x00 0xe6 0x04 0x00 0xe7 0x04>;
compatible = "arm,cortex-a55-pmu\0arm,armv8-pmuv3";
};
rkisp@fdff0000 {
power-domains = <0x21 0x08>;
iommus = <0x75>;
rockchip,iq-feature = <0x3fb 0xf7fe67ff>;
clock-names = "aclk_isp\0hclk_isp\0clk_isp";
resets = <0x1f 0xfd 0x1f 0xfc>;
interrupts = <0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x3c 0x04>;
clocks = <0x1f 0xd2 0x1f 0xd3 0x1f 0xd4>;
compatible = "rockchip,rk3568-rkisp";
status = "okay";
rockchip,grf = <0x32>;
interrupt-names = "mipi_irq\0mi_irq\0isp_irq";
reg = <0x00 0xfdff0000 0x00 0x10000>;
phandle = <0x76>;
reset-names = "isp\0isp-h";
};
rkcif_mipi_lvds_sditf {
compatible = "rockchip,rkcif-sditf";
status = "disabled";
rockchip,cif = <0x74>;
phandle = <0x15e>;
};
thermal-zones {
phandle = <0x121>;
soc-thermal {
polling-delay = <0x3e8>;
polling-delay-passive = <0x14>;
thermal-sensors = <0x1b 0x00>;
sustainable-power = <0x5c3>;
phandle = <0x122>;
trips {
trip-point-0 {
temperature = <0x11170>;
hysteresis = <0x7d0>;
type = "passive";
phandle = <0x123>;
};
trip-point-1 {
temperature = <0x14c08>;
hysteresis = <0x7d0>;
type = "passive";
phandle = <0x1c>;
};
soc-crit {
temperature = <0x1c138>;
hysteresis = <0x7d0>;
type = "critical";
phandle = <0x124>;
};
};
cooling-maps {
map0 {
trip = <0x1c>;
cooling-device = <0x09 0xffffffff 0xffffffff>;
contribution = <0x400>;
};
map1 {
trip = <0x1c>;
cooling-device = <0x1d 0xffffffff 0xffffffff>;
contribution = <0x400>;
};
};
};
gpu-thermal {
polling-delay = <0x3e8>;
polling-delay-passive = <0x14>;
thermal-sensors = <0x1b 0x01>;
phandle = <0x125>;
};
};
cspmu@fd90c000 {
compatible = "rockchip,cspmu";
reg = <0x00 0xfd90c000 0x00 0x1000 0x00 0xfd90d000 0x00 0x1000 0x00 0xfd90e000 0x00 0x1000 0x00 0xfd90f000 0x00 0x1000>;
phandle = <0x29e>;
};
syscon@fdc70000 {
compatible = "rockchip,pipe-phy-grf\0syscon";
reg = <0x00 0xfdc70000 0x00 0x1000>;
phandle = <0x13f>;
};
qos@fe158200 {
compatible = "syscon";
reg = <0x00 0xfe158200 0x00 0x20>;
phandle = <0x51>;
};
i2s@fe400000 {
rockchip,cru = <0x1f>;
clock-names = "mclk_tx\0mclk_rx\0hclk";
resets = <0x1f 0x50 0x1f 0x51>;
interrupts = <0x00 0x34 0x04>;
clocks = <0x1f 0x3f 0x1f 0x43 0x1f 0x39>;
dma-names = "tx";
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-i2s-tdm";
rockchip,playback-only;
status = "okay";
rockchip,grf = <0x32>;
reg = <0x00 0xfe400000 0x00 0x1000>;
phandle = <0x10c>;
dmas = <0xa6 0x00>;
reset-names = "tx-m\0rx-m";
};
dmac@fe530000 {
clock-names = "apb_pclk";
interrupts = <0x00 0x0e 0x04 0x00 0x0d 0x04>;
clocks = <0x1f 0x10d>;
arm,pl330-periph-burst;
compatible = "arm,pl330\0arm,primecell";
reg = <0x00 0xfe530000 0x00 0x4000>;
phandle = <0x40>;
#dma-cells = <0x01>;
};
jpegd@fded0000 {
power-domains = <0x21 0x0a>;
iommus = <0x6a>;
clock-names = "aclk_vcodec\0hclk_vcodec";
resets = <0x1f 0x12c 0x1f 0x12d>;
interrupts = <0x00 0x3e 0x04>;
clocks = <0x1f 0xfb 0x1f 0xfc>;
rockchip,srv = <0x68>;
rockchip,taskqueue-node = <0x01>;
rockchip,disable-auto-freq;
compatible = "rockchip,rkv-jpeg-decoder-v1";
rockchip,resetgroup-node = <0x01>;
status = "okay";
reg = <0x00 0xfded0000 0x00 0x400>;
phandle = <0x156>;
reset-names = "video_a\0video_h";
};
csi2-dphy1 {
rockchip,hw = <0xf2>;
compatible = "rockchip,rk3568-csi2-dphy";
status = "okay";
phandle = <0x1a8>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
endpoint@1 {
data-lanes = <0x01 0x02>;
remote-endpoint = <0xf3>;
reg = <0x01>;
phandle = <0xbe>;
};
};
port@1 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x01>;
endpoint@1 {
remote-endpoint = <0xf4>;
reg = <0x01>;
phandle = <0x77>;
};
};
};
};
qos@fe1a8000 {
compatible = "syscon";
reg = <0x00 0xfe1a8000 0x00 0x20>;
phandle = <0x4b>;
};
serial@fe6b0000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xdd>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x7b 0x04>;
clocks = <0x1f 0x137 0x1f 0x134>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe6b0000 0x00 0x100>;
phandle = <0x196>;
dmas = <0x40 0x0e 0x40 0x0f>;
reg-shift = <0x02>;
};
qos@fe148100 {
compatible = "syscon";
reg = <0x00 0xfe148100 0x00 0x20>;
phandle = <0x4a>;
};
npu@fde40000 {
power-domains = <0x21 0x06>;
iommus = <0x5f>;
clock-names = "scmi_clk\0clk\0aclk\0hclk";
assigned-clocks = <0x1f 0x23>;
rknpu-supply = <0x61>;
assigned-clock-rates = <0x23c34600>;
resets = <0x1f 0x2b 0x1f 0x2c>;
memory-region = <0x60>;
interrupts = <0x00 0x97 0x04>;
clocks = <0x02 0x02 0x1f 0x23 0x1f 0x28 0x1f 0x29>;
compatible = "rockchip,rk3568-rknpu\0rockchip,rknpu";
status = "disabled";
reg = <0x00 0xfde40000 0x00 0x10000>;
phandle = <0x151>;
reset-names = "srst_a\0srst_h";
operating-points-v2 = <0x5e>;
};
leds {
compatible = "gpio-leds";
phandle = <0x2a2>;
work {
linux,default-trigger = "timer";
default-state = "on";
phandle = <0x2a3>;
gpios = <0x36 0x15 0x00>;
};
};
psci {
method = "smc";
compatible = "arm,psci-1.0";
};
phy@fe840000 {
rockchip,pipe-grf = <0xef>;
clock-names = "refclk\0apbclk\0pipe_clk";
assigned-clocks = <0x31 0x25>;
assigned-clock-rates = <0x5f5e100>;
resets = <0x1f 0x1c8 0x1f 0x1c9>;
clocks = <0x31 0x25 0x1f 0x17e 0x1f 0x7f>;
#phy-cells = <0x01>;
compatible = "rockchip,rk3568-naneng-combphy";
status = "okay";
rockchip,pipe-phy-grf = <0xf1>;
reg = <0x00 0xfe840000 0x00 0x100>;
phandle = <0x22>;
reset-names = "combphy-apb\0combphy";
};
usb@fd800000 {
phy-names = "usb2-phy";
clock-names = "usbhost\0arbiter\0pclk\0utmi";
interrupts = <0x00 0x82 0x04>;
clocks = <0x1f 0xbd 0x1f 0xbe 0x1f 0xbc 0x26>;
compatible = "generic-ehci";
status = "disabled";
phys = <0x27>;
reg = <0x00 0xfd800000 0x00 0x40000>;
phandle = <0x135>;
};
xin24m {
clock-output-names = "xin24m";
#clock-cells = <0x00>;
clock-frequency = <0x16e3600>;
compatible = "fixed-clock";
phandle = <0x12d>;
};
iommu@fdf40f00 {
power-domains = <0x21 0x0e>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x8d 0x04 0x00 0x8e 0x04>;
clocks = <0x1f 0x103 0x1f 0x104>;
rockchip,enable-cmd-retry;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
rockchip,disable-mmu-reset;
status = "okay";
interrupt-names = "rkvenc_mmu0\0rkvenc_mmu1";
reg = <0x00 0xfdf40f00 0x00 0x40 0x00 0xfdf40f40 0x00 0x40>;
phandle = <0x6d>;
};
qos@fe158180 {
compatible = "syscon";
reg = <0x00 0xfe158180 0x00 0x20>;
phandle = <0x50>;
};
qos@fe180000 {
compatible = "syscon";
reg = <0x00 0xfe180000 0x00 0x20>;
phandle = <0x46>;
};
usb@fd840000 {
phy-names = "usb2-phy";
clock-names = "usbhost\0arbiter\0pclk\0utmi";
interrupts = <0x00 0x83 0x04>;
clocks = <0x1f 0xbd 0x1f 0xbe 0x1f 0xbc 0x26>;
compatible = "generic-ohci";
status = "disabled";
phys = <0x27>;
reg = <0x00 0xfd840000 0x00 0x40000>;
phandle = <0x136>;
};
hdmi@fe0a0000 {
power-domains = <0x21 0x09>;
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0x91 0x92 0x93>;
clock-names = "iahb\0isfr\0cec\0ref\0hclk";
interrupts = <0x00 0x2d 0x04>;
clocks = <0x1f 0xe6 0x1f 0xe7 0x1f 0x193 0x31 0x02 0x1f 0xde>;
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-dw-hdmi";
status = "okay";
rockchip,grf = <0x32>;
reg = <0x00 0xfe0a0000 0x00 0x20000>;
phandle = <0x10d>;
luckfox,hot-plug-detect-invert;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x16b>;
endpoint@1 {
remote-endpoint = <0x94>;
status = "disabled";
reg = <0x01>;
phandle = <0x8a>;
};
endpoint@0 {
remote-endpoint = <0x17>;
status = "okay";
reg = <0x00>;
phandle = <0x86>;
};
};
};
};
power-management@fdd90000 {
compatible = "rockchip,rk3568-pmu\0syscon\0simple-mfd";
reg = <0x00 0xfdd90000 0x00 0x1000>;
phandle = <0x150>;
power-controller {
#address-cells = <0x01>;
#size-cells = <0x00>;
#power-domain-cells = <0x01>;
compatible = "rockchip,rk3568-power-controller";
status = "okay";
phandle = <0x21>;
pd_pipe@15 {
clocks = <0x1f 0x7f>;
reg = <0x0f>;
pm_qos = <0x59 0x5a 0x5b 0x5c 0x5d>;
};
pd_vi@8 {
clocks = <0x1f 0xcc 0x1f 0xcd>;
reg = <0x08>;
pm_qos = <0x48 0x49 0x4a>;
};
pd_rkvenc@14 {
clocks = <0x1f 0x102>;
reg = <0x0e>;
pm_qos = <0x56 0x57 0x58>;
};
pd_rga@10 {
clocks = <0x1f 0xf1 0x1f 0xf2>;
reg = <0x0a>;
pm_qos = <0x4e 0x4f 0x50 0x51 0x52 0x53>;
};
pd_vpu@11 {
clocks = <0x1f 0xed>;
reg = <0x0b>;
pm_qos = <0x54>;
};
pd_gpu@7 {
clocks = <0x1f 0x19 0x1f 0x1a>;
reg = <0x07>;
pm_qos = <0x47>;
};
pd_rkvdec@13 {
clocks = <0x1f 0x107>;
reg = <0x0d>;
pm_qos = <0x55>;
};
pd_vo@9 {
clocks = <0x1f 0xda 0x1f 0xdb 0x1f 0xdc>;
reg = <0x09>;
pm_qos = <0x4b 0x4c 0x4d>;
};
pd_npu@6 {
clocks = <0x1f 0x27 0x1f 0x25 0x1f 0x26>;
reg = <0x06>;
pm_qos = <0x46>;
};
};
};
vad@fe450000 {
rockchip,det-channel = <0x00>;
rockchip,audio-src = <0x00>;
clock-names = "hclk";
reg-names = "vad";
interrupts = <0x00 0x89 0x04>;
clocks = <0x1f 0x5b>;
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-vad";
status = "disabled";
rockchip,mode = <0x00>;
reg = <0x00 0xfe450000 0x00 0x10000>;
phandle = <0x17b>;
};
qos@fe148080 {
compatible = "syscon";
reg = <0x00 0xfe148080 0x00 0x20>;
phandle = <0x49>;
};
vcc-camera-imx219-two {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
gpio = <0x36 0x10 0x00>;
regulator-always-on;
enable-active-high;
regulator-min-microvolt = <0x325aa0>;
regulator-name = "vcc_camera_imx219_two";
compatible = "regulator-fixed";
status = "disabled";
phandle = <0x2a8>;
};
serial@fe680000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xda>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x78 0x04>;
clocks = <0x1f 0x12b 0x1f 0x128>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe680000 0x00 0x100>;
phandle = <0x193>;
dmas = <0x40 0x08 0x40 0x09>;
reg-shift = <0x02>;
};
usb@fd880000 {
phy-names = "usb2-phy";
clock-names = "usbhost\0arbiter\0pclk\0utmi";
interrupts = <0x00 0x85 0x04>;
clocks = <0x1f 0xbf 0x1f 0xc0 0x1f 0xbc 0x26>;
compatible = "generic-ehci";
status = "disabled";
phys = <0x28>;
reg = <0x00 0xfd880000 0x00 0x40000>;
phandle = <0x137>;
};
vcc-camera-imx219 {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
gpio = <0x36 0x10 0x00>;
regulator-always-on;
enable-active-high;
regulator-min-microvolt = <0x325aa0>;
regulator-name = "vcc_camera_imx219";
compatible = "regulator-fixed";
status = "disabled";
phandle = <0x2a7>;
};
audpwm@fe470000 {
clock-names = "clk\0hclk";
clocks = <0x1f 0x63 0x1f 0x60>;
rockchip,sample-width-bits = <0x0b>;
dma-names = "tx";
rockchip,interpolat-points = <0x01>;
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-audio-pwm\0rockchip,audio-pwm-v1";
status = "disabled";
reg = <0x00 0xfe470000 0x00 0x1000>;
phandle = <0x17d>;
dmas = <0xa6 0x08>;
};
qos@fe190400 {
compatible = "syscon";
reg = <0x00 0xfe190400 0x00 0x20>;
phandle = <0x5d>;
};
saradc@fe720000 {
vref-supply = <0xee>;
clock-names = "saradc\0apb_pclk";
resets = <0x1f 0x180>;
interrupts = <0x00 0x5d 0x04>;
clocks = <0x1f 0x113 0x1f 0x112>;
#io-channel-cells = <0x01>;
compatible = "rockchip,rk3568-saradc\0rockchip,rk3399-saradc";
status = "okay";
reg = <0x00 0xfe720000 0x00 0x100>;
phandle = <0x1a5>;
reset-names = "saradc-apb";
};
dfi@fe230000 {
rockchip,pmugrf = <0x33>;
compatible = "rockchip,rk3568-dfi";
status = "okay";
reg = <0x00 0xfe230000 0x00 0x400>;
phandle = <0x97>;
};
external-camera-imx219-clock-two {
clock-output-names = "ext_cam_imx219_clk_two";
#clock-cells = <0x00>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
phandle = <0xc1>;
};
sc16is752-clk {
clock-output-names = "sc16is752_clk";
#clock-cells = <0x00>;
clock-frequency = <0xe10000>;
compatible = "fixed-clock";
phandle = <0x2a5>;
};
ddr3-params {
dram_dq_drv_odten = <0x22>;
reserved = <0x00>;
phy_dll_dis_freq = <0x00>;
pd_dis_freq = <0x42a>;
phy_clk_drv_odtoff = <0x21>;
phy_odt_puup_en = <0x01>;
dram_odt = <0x78>;
standby_idle = <0x00>;
dq_map_cs0_dq_l = <0x00>;
dram_dq_drv_odtoff = <0x22>;
phy_dq_sr_odten = <0x0f>;
speed_bin = <0x15>;
dq_map_cs1_dq_h = <0x00>;
freq_4 = <0x00>;
sr_dis_freq = <0x320>;
dram_dq_odt_en_freq = <0x14d>;
phy_clk_sr_odtoff = <0x00>;
freq_2 = <0x210>;
phy_clk_drv_odten = <0x21>;
phy_dq_drv_odtoff = <0x21>;
dq_map_cs0_dq_h = <0x00>;
phy_ca_sr_odten = <0x03>;
sr_idle = <0x5d>;
ssmod_div = <0x00>;
freq_0 = <0x420>;
phy_clk_sr_odten = <0x00>;
phy_odt = <0xa7>;
phy_dq_sr_odtoff = <0x0f>;
phy_dq_drv_odten = <0x21>;
phy_odt_en_freq = <0x14d>;
sr_mc_gate_idle = <0x00>;
pd_idle = <0x0d>;
dram_dll_dis_freq = <0x12c>;
ssmod_downspread = <0x00>;
phy_odt_pudn_en = <0x01>;
freq_5 = <0x00>;
ssmod_spread = <0x00>;
freq_3 = <0x30c>;
phandle = <0x10e>;
expanded_version = <0x00>;
phy_ca_drv_odtoff = <0x21>;
version = <0x100>;
dram_ext_temp = <0x00>;
phy_ca_sr_odtoff = <0x03>;
freq_1 = <0x144>;
phy_ca_drv_odten = <0x21>;
mode_2t = <0x00>;
srpd_lite_idle = <0x00>;
byte_map = <0xe4>;
dq_map_cs1_dq_l = <0x00>;
};
usb2-phy@fe8b0000 {
rockchip,usbgrf = <0xf8>;
clock-names = "phyclk";
interrupts = <0x00 0x88 0x04>;
clocks = <0x31 0x15>;
#clock-cells = <0x00>;
compatible = "rockchip,rk3568-usb2phy";
status = "okay";
reg = <0x00 0xfe8b0000 0x00 0x10000>;
phandle = <0x26>;
host-port {
#phy-cells = <0x00>;
status = "disabled";
phandle = <0x28>;
};
otg-port {
#phy-cells = <0x00>;
status = "disabled";
phandle = <0x27>;
};
};
lpddr4x-params {
dram_dq_drv_odten = <0x28>;
reserved = <0x00>;
phy_dll_dis_freq = <0x00>;
pd_dis_freq = <0x42a>;
phy_clk_drv_odtoff = <0x24>;
phy_odt_puup_en = <0x00>;
dram_odt = <0x50>;
standby_idle = <0x00>;
dq_map_cs0_dq_l = <0x00>;
dram_dq_drv_odtoff = <0x28>;
phy_dq_sr_odten = <0x00>;
lp4_ca_odt_en_freq = <0x320>;
speed_bin = <0x00>;
dq_map_cs1_dq_h = <0x00>;
freq_4 = <0x00>;
sr_dis_freq = <0x320>;
dram_dq_odt_en_freq = <0x320>;
phy_clk_sr_odtoff = <0x00>;
phy_lp4_cs_drv_odten = <0x00>;
freq_2 = <0x210>;
phy_clk_drv_odten = <0x24>;
phy_dq_drv_odtoff = <0x1d>;
dq_map_cs0_dq_h = <0x00>;
phy_lp4_drv_pulldown_en_odten = <0x00>;
lp4_drv_pu_cal_odten = <0x00>;
phy_ca_sr_odten = <0x00>;
sr_idle = <0x5d>;
phy_lp4_drv_pulldown_en_odtoff = <0x00>;
ssmod_div = <0x00>;
freq_0 = <0x420>;
phy_clk_sr_odten = <0x00>;
phy_odt = <0x3c>;
phy_dq_sr_odtoff = <0x00>;
lp4_dq_vref_odten = <0xe4>;
lp4_ca_odt = <0x78>;
phy_dq_drv_odten = <0x1d>;
phy_lp4_dq_vref_odten = <0xa6>;
phy_odt_en_freq = <0x320>;
sr_mc_gate_idle = <0x00>;
pd_idle = <0x0d>;
lp4_dq_vref_odtoff = <0x1a4>;
dram_dll_dis_freq = <0x00>;
ssmod_downspread = <0x00>;
phy_odt_pudn_en = <0x00>;
freq_5 = <0x00>;
ssmod_spread = <0x00>;
phy_lp4_dq_vref_odtoff = <0x1a4>;
phy_lp4_cs_drv_odtoff = <0x00>;
lp4_ca_vref_odtoff = <0x157>;
freq_3 = <0x30c>;
lp4_drv_pu_cal_odtoff = <0x00>;
phandle = <0x112>;
expanded_version = <0x00>;
phy_ca_drv_odtoff = <0x24>;
lp4_odte_ck_en = <0x00>;
lp4_odte_cs_en = <0x00>;
version = <0x100>;
dram_ext_temp = <0x00>;
phy_ca_sr_odtoff = <0x00>;
freq_1 = <0x144>;
lp4_ca_vref_odten = <0x157>;
phy_ca_drv_odten = <0x24>;
lp4_odtd_ca_en = <0x00>;
mode_2t = <0x00>;
srpd_lite_idle = <0x00>;
byte_map = <0xe4>;
dq_map_cs1_dq_l = <0x00>;
};
syscon@fdca8000 {
compatible = "rockchip,rk3568-usb2phy-grf\0syscon";
reg = <0x00 0xfdca8000 0x00 0x8000>;
phandle = <0xf8>;
};
npu-opp-table {
nvmem-cells = <0x62 0x07 0x08>;
rockchip,low-temp = <0x00>;
rockchip,low-temp-adjust-volt = <0x00 0x2bc 0xc350>;
compatible = "operating-points-v2";
nvmem-cell-names = "leakage\0pvtm\0mbist-vmin";
phandle = <0x5e>;
rockchip,temp-hysteresis = <0x1388>;
mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>;
opp-300000000 {
opp-microvolt = <0xc96a8 0xc96a8 0xf4240>;
opp-hz = <0x00 0x11b3dc40>;
};
opp-700000000 {
opp-microvolt = <0xcf850 0xcf850 0xf4240>;
opp-hz = <0x00 0x29b92700>;
};
opp-900000000 {
opp-microvolt = <0x186a0 0xe1d48 0xf4240>;
opp-hz = <0x00 0x35a4e900>;
};
opp-200000000 {
opp-microvolt = <0xc96a8 0xc96a8 0xf4240>;
opp-hz = <0x00 0xbebc200>;
};
opp-400000000 {
opp-microvolt = <0xc96a8 0xc96a8 0xf4240>;
opp-hz = <0x00 0x17d78400>;
};
opp-600000000 {
opp-microvolt = <0xc96a8 0xc96a8 0xf4240>;
opp-hz = <0x00 0x23c34600>;
};
opp-1000000000 {
opp-microvolt = <0xf4240 0xf4240 0xf4240>;
opp-hz = <0x00 0x3b9aca00>;
};
opp-800000000 {
opp-microvolt = <0xd59f8 0xd59f8 0xf4240>;
opp-hz = <0x00 0x2faf0800>;
};
};
dwmmc@fe2b0000 {
supports-sd;
fifo-depth = <0x100>;
pinctrl-names = "default";
ignore-pm-notify;
pinctrl-0 = <0x9e 0x9f 0xa0 0xa1>;
clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
cap-sd-highspeed;
vqmmc-supply = <0x2b>;
sd-uhs-sdr25;
bus-width = <0x04>;
resets = <0x1f 0xd4>;
card-detect-delay = <0x320>;
interrupts = <0x00 0x62 0x04>;
clocks = <0x1f 0xb0 0x1f 0xb1 0x1f 0x18a 0x1f 0x18b>;
vmmc-supply = <0x9d>;
compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc";
status = "okay";
disable-wp;
reg = <0x00 0xfe2b0000 0x00 0x4000>;
phandle = <0x170>;
max-frequency = <0x8f0d180>;
cap-mmc-highspeed;
reset-names = "reset";
sd-uhs-sdr50;
};
i2c@fe5a0000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0xbc>;
clock-names = "i2c\0pclk";
interrupts = <0x00 0x2f 0x04>;
clocks = <0x1f 0x148 0x1f 0x147>;
#size-cells = <0x00>;
compatible = "rockchip,rk3399-i2c";
status = "okay";
reg = <0x00 0xfe5a0000 0x00 0x1000>;
phandle = <0x183>;
imx219-1@10 {
clock-names = "ext_cam_imx219_clk";
pwdn-gpios = <0x36 0x12 0x01>;
clocks = <0xbd>;
rockchip,camera-module-name = "Waveshare";
rockchip,camera-module-index = <0x00>;
compatible = "sony,imx219";
rockchip,camera-module-facing = "front";
status = "disabled";
reg = <0x10>;
rockchip,camera-module-lens-name = "Picamera";
phandle = <0x184>;
port {
endpoint {
data-lanes = <0x01 0x02>;
remote-endpoint = <0xbe>;
phandle = <0xf3>;
};
};
};
};
codec-digital@fe478000 {
pinctrl-names = "default";
pinctrl-0 = <0xba>;
clock-names = "adc\0dac\0i2c\0pclk";
resets = <0x1f 0x5f>;
clocks = <0x1f 0x67 0x1f 0x66 0x1f 0x65 0x1f 0x64>;
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-codec-digital\0rockchip,codec-digital-v1";
status = "disabled";
rockchip,grf = <0x32>;
reg = <0x00 0xfe478000 0x00 0x1000>;
phandle = <0x17e>;
reset-names = "reset";
};
spi@fe640000 {
pinctrl-names = "default\0high_speed";
#address-cells = <0x01>;
pinctrl-0 = <0xd2 0xd3 0xd4>;
clock-names = "spiclk\0apb_pclk";
interrupts = <0x00 0x6a 0x04>;
clocks = <0x1f 0x158 0x1f 0x157>;
#size-cells = <0x00>;
dma-names = "tx\0rx";
compatible = "rockchip,rk3066-spi";
pinctrl-1 = <0xd2 0xd3 0xd5>;
status = "disabled";
reg = <0x00 0xfe640000 0x00 0x1000>;
phandle = <0x18f>;
dmas = <0x40 0x1a 0x40 0x1b>;
};
ddr4-params {
dram_dq_drv_odten = <0x22>;
reserved = <0x00>;
phy_dll_dis_freq = <0x00>;
pd_dis_freq = <0x42a>;
phy_clk_drv_odtoff = <0x25>;
phy_odt_puup_en = <0x01>;
dram_odt = <0x78>;
standby_idle = <0x00>;
dq_map_cs0_dq_l = <0x22777788>;
dram_dq_drv_odtoff = <0x22>;
phy_dq_sr_odten = <0x0e>;
speed_bin = <0x0c>;
dq_map_cs1_dq_h = <0xd7888877>;
freq_4 = <0x00>;
sr_dis_freq = <0x320>;
dram_dq_odt_en_freq = <0x1f4>;
phy_clk_sr_odtoff = <0x01>;
freq_2 = <0x210>;
phy_clk_drv_odten = <0x25>;
phy_dq_drv_odtoff = <0x25>;
dq_map_cs0_dq_h = <0xd7888877>;
phy_ca_sr_odten = <0x01>;
sr_idle = <0x5d>;
ssmod_div = <0x00>;
freq_0 = <0x420>;
phy_clk_sr_odten = <0x01>;
phy_odt = <0x8b>;
phy_dq_sr_odtoff = <0x0e>;
phy_dq_drv_odten = <0x25>;
phy_odt_en_freq = <0x1f4>;
sr_mc_gate_idle = <0x00>;
pd_idle = <0x0d>;
dram_dll_dis_freq = <0x271>;
ssmod_downspread = <0x00>;
phy_odt_pudn_en = <0x01>;
freq_5 = <0x00>;
ssmod_spread = <0x00>;
freq_3 = <0x30c>;
phandle = <0x10f>;
expanded_version = <0x00>;
phy_ca_drv_odtoff = <0x25>;
version = <0x100>;
dram_ext_temp = <0x00>;
phy_ca_sr_odtoff = <0x01>;
freq_1 = <0x144>;
phy_ca_drv_odten = <0x25>;
mode_2t = <0x00>;
srpd_lite_idle = <0x00>;
byte_map = <0xe4>;
dq_map_cs1_dq_l = <0x22777788>;
};
i2c@fe5e0000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0xc5>;
clock-names = "i2c\0pclk";
interrupts = <0x00 0x33 0x04>;
clocks = <0x1f 0x150 0x1f 0x14f>;
#size-cells = <0x00>;
compatible = "rockchip,rk3399-i2c";
status = "disabled";
reg = <0x00 0xfe5e0000 0x00 0x1000>;
phandle = <0x189>;
};
dsi@fe060000 {
power-domains = <0x21 0x09>;
#address-cells = <0x01>;
phy-names = "mipi_dphy";
clock-names = "pclk\0hclk\0hs_clk";
resets = <0x1f 0x110>;
interrupts = <0x00 0x44 0x04>;
clocks = <0x1f 0xe8 0x1f 0xda 0x2e>;
#size-cells = <0x00>;
compatible = "rockchip,rk3568-mipi-dsi";
status = "disabled";
rockchip,grf = <0x32>;
phys = <0x2e>;
reg = <0x00 0xfe060000 0x00 0x10000>;
phandle = <0x167>;
reset-names = "apb";
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
phandle = <0x168>;
endpoint@1 {
remote-endpoint = <0x8e>;
status = "disabled";
reg = <0x01>;
phandle = <0x87>;
};
endpoint@0 {
remote-endpoint = <0x14>;
status = "disabled";
reg = <0x00>;
phandle = <0x83>;
};
};
};
};
iommu@fdff1a00 {
power-domains = <0x21 0x08>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x3b 0x04>;
clocks = <0x1f 0xd2 0x1f 0xd3>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
rockchip,disable-mmu-reset;
status = "okay";
interrupt-names = "isp_mmu";
reg = <0x00 0xfdff1a00 0x00 0x100>;
phandle = <0x75>;
};
qos@fe190380 {
compatible = "syscon";
reg = <0x00 0xfe190380 0x00 0x20>;
phandle = <0x5c>;
};
vcc3v3-sys {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x325aa0>;
regulator-name = "vcc3v3_sys";
compatible = "regulator-fixed";
phandle = <0x3d>;
vin-supply = <0x35>;
};
mipi-csi2@fdfb0000 {
clock-names = "pclk_csi2host";
reg-names = "csihost_regs";
resets = <0x1f 0xff>;
interrupts = <0x00 0x08 0x04 0x00 0x09 0x04>;
clocks = <0x1f 0xd5>;
compatible = "rockchip,rk3568-mipi-csi2";
status = "disabled";
interrupt-names = "csi-intr1\0csi-intr2";
reg = <0x00 0xfdfb0000 0x00 0x10000>;
phandle = <0x15c>;
reset-names = "srst_csihost_p";
};
rkvdec@fdf80200 {
power-domains = <0x21 0x0d>;
iommus = <0x6f>;
rockchip,advanced-rates = <0x179a7b00 0x00 0x179a7b00 0x179a7b00 0x23c34600>;
clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core\0clk_hevc_cabac";
assigned-clocks = <0x1f 0x108 0x1f 0x10a 0x1f 0x10b 0x1f 0x10c>;
rockchip,normal-rates = <0x11b3dc40 0x00 0x11b3dc40 0x11b3dc40 0x23c34600>;
assigned-clock-rates = <0x11b3dc40 0x11b3dc40 0x11b3dc40 0x11b3dc40>;
resets = <0x1f 0x142 0x1f 0x143 0x1f 0x144 0x1f 0x145 0x1f 0x146>;
interrupts = <0x00 0x5b 0x04>;
clocks = <0x1f 0x108 0x1f 0x109 0x1f 0x10a 0x1f 0x10b 0x1f 0x10c>;
rockchip,rcb-min-width = <0x200>;
rockchip,srv = <0x68>;
rockchip,taskqueue-node = <0x04>;
compatible = "rockchip,rkv-decoder-rk3568\0rockchip,rkv-decoder-v2";
rockchip,resetgroup-node = <0x04>;
status = "okay";
interrupt-names = "irq_dec";
rockchip,rcb-iova = <0x10000000 0x10000>;
reg = <0x00 0xfdf80200 0x00 0x400>;
phandle = <0x15b>;
reset-names = "video_a\0video_h\0video_cabac\0video_core\0video_hevc_cabac";
rockchip,sram = <0x70>;
rockchip,default-max-load = <0x1fe000>;
};
mpp-srv {
rockchip,resetgroup-count = <0x06>;
rockchip,taskqueue-count = <0x06>;
compatible = "rockchip,mpp-service";
status = "okay";
phandle = <0x68>;
};
syscon@fdc80000 {
compatible = "rockchip,pipe-phy-grf\0syscon";
reg = <0x00 0xfdc80000 0x00 0x1000>;
phandle = <0xf0>;
};
timer {
arm,no-tick-in-suspend;
interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
compatible = "arm,armv8-timer";
};
rockchip-suspend {
rockchip,sleep-debug-en = <0x01>;
rockchip,sleep-mode-config = <0x5ec>;
compatible = "rockchip,pm-rk3568";
status = "okay";
rockchip,wakeup-config = <0x10>;
phandle = <0x11f>;
};
iommu@fded0480 {
power-domains = <0x21 0x0a>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x3d 0x04>;
clocks = <0x1f 0xfb 0x1f 0xfc>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
status = "okay";
interrupt-names = "jpegd_mmu";
reg = <0x00 0xfded0480 0x00 0x40>;
phandle = <0x6a>;
};
i2s@fe410000 {
pinctrl-names = "default";
rockchip,cru = <0x1f>;
pinctrl-0 = <0xa7 0xa8 0xa9 0xaa>;
clock-names = "mclk_tx\0mclk_rx\0hclk";
resets = <0x1f 0x52 0x1f 0x53>;
interrupts = <0x00 0x35 0x04>;
clocks = <0x1f 0x47 0x1f 0x4b 0x1f 0x3a>;
dma-names = "tx\0rx";
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-i2s-tdm";
status = "okay";
rockchip,grf = <0x32>;
reg = <0x00 0xfe410000 0x00 0x1000>;
phandle = <0x104>;
dmas = <0xa6 0x02 0xa6 0x03>;
reset-names = "tx-m\0rx-m";
rockchip,clk-trcm = <0x01>;
};
sdio-pwrseq {
pinctrl-names = "default";
pinctrl-0 = <0x107>;
clock-names = "ext_clock";
clocks = <0x106 0x01>;
reset-gpios = <0x108 0x09 0x01>;
compatible = "mmc-pwrseq-simple";
post-power-on-delay-ms = <0xc8>;
phandle = <0xa2>;
};
bus-npu-opp-table {
rockchip,pvtm-ch = <0x00 0x05>;
nvmem-cells = <0x07>;
opp-shared;
compatible = "operating-points-v2";
nvmem-cell-names = "pvtm";
rockchip,pvtm-voltage-sel = <0x00 0x14050 0x00 0x14051 0x16b48 0x01 0x16b49 0x186a0 0x02>;
phandle = <0x63>;
opp-1200000000 {
opp-microvolt = <0xf4240>;
opp-microvolt-L2 = <0x00>;
opp-hz = <0x00 0x47868c00>;
opp-microvolt-L0 = <0xf4240>;
opp-microvolt-L1 = <0xf4240>;
};
opp-900000000 {
opp-microvolt = <0x00>;
opp-hz = <0x00 0x35a4e900>;
};
opp-1000000000 {
opp-microvolt = <0xe7ef0>;
opp-microvolt-L2 = <0x00>;
opp-hz = <0x00 0x3b9aca00>;
opp-microvolt-L0 = <0xe7ef0>;
opp-microvolt-L1 = <0xe1d48>;
};
};
sram@fdcc0000 {
#address-cells = <0x01>;
#size-cells = <0x01>;
compatible = "mmio-sram";
ranges = <0x00 0x00 0xfdcc0000 0xb000>;
reg = <0x00 0xfdcc0000 0x00 0xb000>;
phandle = <0x140>;
rkvdec-sram@0 {
reg = <0x00 0xb000>;
phandle = <0x70>;
};
};
pwm@fe6e0030 {
pinctrl-names = "active";
pinctrl-0 = <0xe3>;
clock-names = "pwm\0pclk";
interrupts = <0x00 0x53 0x04 0x00 0x57 0x04>;
clocks = <0x1f 0x15a 0x1f 0x159>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6e0030 0x00 0x10>;
phandle = <0x19c>;
};
serial@fe6c0000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xde>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x7c 0x04>;
clocks = <0x1f 0x13b 0x1f 0x138>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe6c0000 0x00 0x100>;
phandle = <0x197>;
dmas = <0x40 0x10 0x40 0x11>;
reg-shift = <0x02>;
};
sata@fc800000 {
power-domains = <0x21 0x0f>;
phy-names = "sata-phy";
clock-names = "sata\0pmalive\0rxoob";
interrupts = <0x00 0x60 0x04>;
clocks = <0x1f 0xa0 0x1f 0xa1 0x1f 0xa2>;
compatible = "snps,dwc-ahci";
status = "disabled";
interrupt-names = "hostc";
phys = <0x22 0x01>;
reg = <0x00 0xfc800000 0x00 0x1000>;
phandle = <0x130>;
ports-implemented = <0x01>;
};
usb@fd8c0000 {
phy-names = "usb2-phy";
clock-names = "usbhost\0arbiter\0pclk\0utmi";
interrupts = <0x00 0x86 0x04>;
clocks = <0x1f 0xbf 0x1f 0xc0 0x1f 0xbc 0x26>;
compatible = "generic-ohci";
status = "disabled";
phys = <0x28>;
reg = <0x00 0xfd8c0000 0x00 0x40000>;
phandle = <0x138>;
};
qos@fe158100 {
compatible = "syscon";
reg = <0x00 0xfe158100 0x00 0x20>;
phandle = <0x4f>;
};
testcase-data-2 {
#address-cells = <0x01>;
#size-cells = <0x01>;
fairway-1 {
#address-cells = <0x01>;
#size-cells = <0x01>;
compatible = "ot,rides";
status = "okay";
orientation = <0x7f>;
phandle = <0x2c6>;
ride@200 {
#address-cells = <0x01>;
hvac-zone-names = "operator\0snack-bar";
gondola-capacity = <0x06>;
hvac-zones = <0x0c 0x05>;
#size-cells = <0x01>;
spin-controller = <0x2c5 0x03>;
compatible = "ot,ferris-wheel";
reg = <0x200 0x100>;
hvac-thermostat = <0x1b 0x20>;
hvac-provider = <0x2cb>;
phandle = <0x2cc>;
spin-rph = <0x1e>;
gondolas = <0x10>;
track@20 {
reg = <0x20 0x10>;
phandle = <0x2ce>;
};
track@10 {
reg = <0x10 0x10>;
phandle = <0x2cd>;
};
};
ride@100 {
#address-cells = <0x01>;
spin-controller-names = "track_1\0track_2";
hvac-zone-names = "operator";
hvac-zones = <0x0e>;
#size-cells = <0x01>;
spin-controller = <0x2c3 0x05 0x2c3 0x07>;
queues = <0x02>;
compatible = "ot,roller-coaster";
reg = <0x100 0x100>;
hvac-thermostat = <0x1d>;
hvac-provider = <0x2c2>;
track@40 {
reg = <0x40 0x10>;
incline-up = <0x2f 0x1f 0x0f>;
};
track@30 {
reg = <0x30 0x10>;
incline-up = <0x30 0x20 0x10>;
};
};
};
vending@50000 {
compatible = "ot,tickets";
status = "disabled";
reg = <0x50000 0x1000>;
phandle = <0x2c9>;
};
substation@100 {
compatible = "ot,big-volts-control";
status = "okay";
reg = <0x100 0x100>;
phandle = <0x2c4>;
motor-1 {
spin = "clockwise";
compatible = "ot,ferris-wheel-motor";
phandle = <0x2c5>;
};
motor-8 {
compatible = "ot,roller-coaster-motor";
phandle = <0x2c3>;
};
hvac-medium-1 {
compatible = "ot,hvac-medium";
heat-range = <0x32 0x4b>;
phandle = <0x2c2>;
cool-range = <0x3c 0x50>;
};
hvac-large-1 {
compatible = "ot,hvac-large";
heat-range = <0x28 0x4b>;
phandle = <0x2cb>;
cool-range = <0x41 0x50>;
};
};
lights@30000 {
compatible = "ot,work-lights";
status = "disabled";
reg = <0x30000 0x1000>;
phandle = <0x2c7>;
};
lights@40000 {
color = "purple\0white\0red\0green";
rate = <0x03 0x100>;
compatible = "ot,show-lights";
status = "okay";
reg = <0x40000 0x1000>;
phandle = <0x2c8>;
};
};
pvtm@fde00000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "rockchip,rk3568-core-pvtm";
reg = <0x00 0xfde00000 0x00 0x100>;
pvtm@0 {
clock-names = "clk\0pclk";
thermal-zone = "soc-thermal";
resets = <0x1f 0x1a 0x1f 0x19>;
clocks = <0x1f 0x13 0x1f 0x1c2>;
reg = <0x00>;
reset-names = "rts\0rst-p";
};
};
pwm@fe6e0020 {
pinctrl-names = "active";
pinctrl-0 = <0xe2>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x15a 0x1f 0x159>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6e0020 0x00 0x10>;
phandle = <0x19b>;
};
cpuinfo {
nvmem-cells = <0x0d 0x0e 0x0f>;
compatible = "rockchip,cpuinfo";
nvmem-cell-names = "id\0cpu-version\0cpu-code";
};
qos@fe150000 {
compatible = "syscon";
reg = <0x00 0xfe150000 0x00 0x20>;
phandle = <0x54>;
};
lpddr3-params {
dram_dq_drv_odten = <0x22>;
reserved = <0x00>;
phy_dll_dis_freq = <0x00>;
pd_dis_freq = <0x42a>;
phy_clk_drv_odtoff = <0x27>;
phy_odt_puup_en = <0x01>;
dram_odt = <0x78>;
standby_idle = <0x00>;
dq_map_cs0_dq_l = <0x00>;
dram_dq_drv_odtoff = <0x22>;
phy_dq_sr_odten = <0x0f>;
speed_bin = <0x00>;
dq_map_cs1_dq_h = <0x00>;
freq_4 = <0x00>;
sr_dis_freq = <0x320>;
dram_dq_odt_en_freq = <0x14d>;
phy_clk_sr_odtoff = <0x0f>;
freq_2 = <0x210>;
phy_clk_drv_odten = <0x27>;
phy_dq_drv_odtoff = <0x25>;
dq_map_cs0_dq_h = <0x00>;
phy_ca_sr_odten = <0x01>;
sr_idle = <0x5d>;
ssmod_div = <0x00>;
freq_0 = <0x420>;
phy_clk_sr_odten = <0x0f>;
phy_odt = <0x94>;
phy_dq_sr_odtoff = <0x0f>;
phy_dq_drv_odten = <0x25>;
phy_odt_en_freq = <0x14d>;
sr_mc_gate_idle = <0x00>;
pd_idle = <0x0d>;
dram_dll_dis_freq = <0x00>;
ssmod_downspread = <0x00>;
phy_odt_pudn_en = <0x01>;
freq_5 = <0x00>;
ssmod_spread = <0x00>;
freq_3 = <0x30c>;
phandle = <0x110>;
expanded_version = <0x00>;
phy_ca_drv_odtoff = <0x25>;
version = <0x100>;
dram_ext_temp = <0x00>;
phy_ca_sr_odtoff = <0x01>;
freq_1 = <0x144>;
phy_ca_drv_odten = <0x25>;
mode_2t = <0x00>;
srpd_lite_idle = <0x00>;
byte_map = <0x8d>;
dq_map_cs1_dq_l = <0x00>;
};
aliases {
i2c3 = "/i2c@fe5c0000";
spi2 = "/spi@fe630000";
gpio0 = "/pinctrl/gpio@fdd60000";
dsi1 = "/dsi@fe070000";
serial7 = "/serial@fe6b0000";
i2c1 = "/i2c@fe5a0000";
mmc3 = "/dwmmc@fe000000";
testcase-alias = "/testcase-data";
spi0 = "/spi@fe610000";
serial5 = "/serial@fe690000";
mmc1 = "/dwmmc@fe2b0000";
serial3 = "/serial@fe670000";
csi2dphy1 = "/csi2-dphy1";
serial1 = "/serial@fe650000";
gpio3 = "/pinctrl/gpio@fe760000";
i2c4 = "/i2c@fe5d0000";
ethernet1 = "/ethernet@fe010000";
spi3 = "/spi@fe640000";
gpio1 = "/pinctrl/gpio@fe740000";
serial8 = "/serial@fe6c0000";
i2c2 = "/i2c@fe5b0000";
spi1 = "/spi@fe620000";
dsi0 = "/dsi@fe060000";
serial6 = "/serial@fe6a0000";
i2c0 = "/i2c@fdd40000";
mmc2 = "/dwmmc@fe2c0000";
serial4 = "/serial@fe680000";
mmc0 = "/sdhci@fe310000";
csi2dphy2 = "/csi2-dphy2";
serial2 = "/serial@fe660000";
gpio4 = "/pinctrl/gpio@fe770000";
i2c5 = "/i2c@fe5e0000";
csi2dphy0 = "/csi2-dphy0";
serial0 = "/serial@fdd50000";
gpio2 = "/pinctrl/gpio@fe750000";
serial9 = "/serial@fe6d0000";
};
pwm@fe6e0010 {
pinctrl-names = "active";
pinctrl-0 = <0xe1>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x15a 0x1f 0x159>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6e0010 0x00 0x10>;
phandle = <0x19a>;
};
qos@fe148000 {
compatible = "syscon";
reg = <0x00 0xfe148000 0x00 0x20>;
phandle = <0x48>;
};
nandc@fe330000 {
clock-names = "clk_nandc\0hclk_nandc";
nandc_id = <0x00>;
interrupts = <0x00 0x46 0x04>;
clocks = <0x1f 0x75 0x1f 0x74>;
compatible = "rockchip,rk-nandc-v9";
status = "disabled";
reg = <0x00 0xfe330000 0x00 0x4000>;
phandle = <0x174>;
};
firmware {
optee {
method = "smc";
compatible = "linaro,optee-tz";
phandle = <0x11a>;
};
sdei {
method = "smc";
compatible = "arm,sdei-1.0";
phandle = <0x11c>;
};
scmi {
shmem = <0x1a>;
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "arm,scmi-smc";
phandle = <0x11b>;
arm,smc-id = <0x82000010>;
protocol@14 {
#clock-cells = <0x01>;
reg = <0x14>;
rockchip,clk-init = "Tfr";
phandle = <0x02>;
};
};
};
serial@fe650000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xd6 0xd7>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x75 0x04>;
clocks = <0x1f 0x11f 0x1f 0x11c>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "okay";
reg = <0x00 0xfe650000 0x00 0x100>;
phandle = <0x190>;
dmas = <0x40 0x02 0x40 0x03>;
reg-shift = <0x02>;
};
rk809-sound {
simple-audio-card,name = "rockchip,rk809-codec";
simple-audio-card,format = "i2s";
simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack";
simple-audio-card,routing = "MIC_IN\0Mic Jack\0Headphone Jack\0HPOL\0Headphone Jack\0HPOR";
compatible = "simple-audio-card";
status = "okay";
phandle = <0x29f>;
simple-audio-card,mclk-fs = <0x100>;
simple-audio-card,cpu {
sound-dai = <0x104>;
};
simple-audio-card,codec {
sound-dai = <0x105>;
};
};
qos@fe190000 {
compatible = "syscon";
reg = <0x00 0xfe190000 0x00 0x20>;
phandle = <0x59>;
};
debug@fd904000 {
compatible = "rockchip,debug";
reg = <0x00 0xfd904000 0x00 0x1000 0x00 0xfd905000 0x00 0x1000 0x00 0xfd906000 0x00 0x1000 0x00 0xfd907000 0x00 0x1000>;
phandle = <0x29d>;
};
ebc@fdec0000 {
power-domains = <0x21 0x0a>;
pinctrl-names = "default";
pinctrl-0 = <0x69>;
clock-names = "hclk\0dclk";
interrupts = <0x00 0x11 0x04>;
clocks = <0x1f 0xf9 0x1f 0xfa>;
compatible = "rockchip,rk3568-ebc-tcon";
status = "disabled";
rockchip,grf = <0x32>;
reg = <0x00 0xfdec0000 0x00 0x5000>;
phandle = <0x155>;
};
pwm@fe6e0000 {
pinctrl-names = "active";
pinctrl-0 = <0xe0>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x15a 0x1f 0x159>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6e0000 0x00 0x10>;
phandle = <0x199>;
};
iommu@fdfe0800 {
power-domains = <0x21 0x08>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x92 0x04>;
clocks = <0x1f 0xce 0x1f 0xcf>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
rockchip,disable-mmu-reset;
status = "okay";
interrupt-names = "cif_mmu";
reg = <0x00 0xfdfe0800 0x00 0x100>;
phandle = <0x71>;
};
mpll {
clock-output-names = "mpll";
#clock-cells = <0x00>;
clock-frequency = <0x2faf0800>;
compatible = "fixed-clock";
phandle = <0x12c>;
};
usbdrd {
#address-cells = <0x02>;
clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk";
clocks = <0x1f 0xa6 0x1f 0xa7 0x1f 0xa5 0x1f 0x7f>;
#size-cells = <0x02>;
compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3";
ranges;
status = "okay";
phandle = <0x131>;
dwc3@fcc00000 {
power-domains = <0x21 0x0f>;
snps,dis_enblslpm_quirk;
phy-names = "usb2-phy";
snps,dis-u2-freeclk-exists-quirk;
phy_type = "utmi_wide";
snps,dis_u2_susphy_quirk;
resets = <0x1f 0x94>;
interrupts = <0x00 0xa9 0x04>;
extcon = <0x24>;
snps,usb2-lpm-disable;
compatible = "snps,dwc3";
snps,dis-del-phy-power-chg-quirk;
status = "okay";
snps,xhci-trb-ent-quirk;
phys = <0x23>;
reg = <0x00 0xfcc00000 0x00 0x400000>;
phandle = <0x132>;
dr_mode = "otg";
maximum-speed = "high-speed";
reset-names = "usb3-otg";
snps,dis-tx-ipgap-linecheck-quirk;
};
};
pvtm@fde80000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "rockchip,rk3568-gpu-pvtm";
reg = <0x00 0xfde80000 0x00 0x100>;
pvtm@1 {
clock-names = "clk\0pclk";
thermal-zone = "gpu-thermal";
resets = <0x1f 0x24 0x1f 0x23>;
clocks = <0x1f 0x1e 0x1f 0x1d>;
reg = <0x01>;
reset-names = "rts\0rst-p";
};
};
lpddr4-params {
dram_dq_drv_odten = <0x28>;
reserved = <0x00>;
phy_dll_dis_freq = <0x00>;
pd_dis_freq = <0x42a>;
phy_clk_drv_odtoff = <0x26>;
phy_odt_puup_en = <0x00>;
dram_odt = <0x50>;
standby_idle = <0x00>;
dq_map_cs0_dq_l = <0x00>;
dram_dq_drv_odtoff = <0x28>;
phy_dq_sr_odten = <0x00>;
lp4_ca_odt_en_freq = <0x320>;
speed_bin = <0x00>;
dq_map_cs1_dq_h = <0x00>;
freq_4 = <0x00>;
sr_dis_freq = <0x320>;
dram_dq_odt_en_freq = <0x320>;
phy_clk_sr_odtoff = <0x0f>;
phy_lp4_cs_drv_odten = <0x00>;
freq_2 = <0x210>;
phy_clk_drv_odten = <0x26>;
phy_dq_drv_odtoff = <0x1e>;
dq_map_cs0_dq_h = <0x00>;
phy_lp4_drv_pulldown_en_odten = <0x00>;
lp4_drv_pu_cal_odten = <0x01>;
phy_ca_sr_odten = <0x0f>;
sr_idle = <0x5d>;
phy_lp4_drv_pulldown_en_odtoff = <0x00>;
ssmod_div = <0x00>;
freq_0 = <0x420>;
phy_clk_sr_odten = <0x0f>;
phy_odt = <0x3c>;
phy_dq_sr_odtoff = <0x00>;
lp4_dq_vref_odten = <0x12c>;
lp4_ca_odt = <0x78>;
phy_dq_drv_odten = <0x1e>;
phy_lp4_dq_vref_odten = <0xa6>;
phy_odt_en_freq = <0x320>;
sr_mc_gate_idle = <0x00>;
pd_idle = <0x0d>;
lp4_dq_vref_odtoff = <0x1a4>;
dram_dll_dis_freq = <0x00>;
ssmod_downspread = <0x00>;
phy_odt_pudn_en = <0x00>;
freq_5 = <0x00>;
ssmod_spread = <0x00>;
phy_lp4_dq_vref_odtoff = <0x1a4>;
phy_lp4_cs_drv_odtoff = <0x00>;
lp4_ca_vref_odtoff = <0x1a4>;
freq_3 = <0x30c>;
lp4_drv_pu_cal_odtoff = <0x01>;
phandle = <0x111>;
expanded_version = <0x00>;
phy_ca_drv_odtoff = <0x26>;
lp4_odte_ck_en = <0x01>;
lp4_odte_cs_en = <0x01>;
version = <0x100>;
dram_ext_temp = <0x00>;
phy_ca_sr_odtoff = <0x0f>;
freq_1 = <0x144>;
lp4_ca_vref_odten = <0x17c>;
phy_ca_drv_odten = <0x26>;
lp4_odtd_ca_en = <0x00>;
mode_2t = <0x00>;
srpd_lite_idle = <0x00>;
byte_map = <0xe4>;
dq_map_cs1_dq_l = <0x00>;
};
pwm@fe700030 {
pinctrl-names = "active";
pinctrl-0 = <0xeb>;
clock-names = "pwm\0pclk";
interrupts = <0x00 0x55 0x04 0x00 0x59 0x04>;
clocks = <0x1f 0x160 0x1f 0x15f>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe700030 0x00 0x10>;
phandle = <0x1a4>;
};
serial@fe690000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xdb>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x79 0x04>;
clocks = <0x1f 0x12f 0x1f 0x12c>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe690000 0x00 0x100>;
phandle = <0x194>;
dmas = <0x40 0x0a 0x40 0x0b>;
reg-shift = <0x02>;
};
can@fe570000 {
clock-names = "baudclk\0apb_pclk";
resets = <0x1f 0x155 0x1f 0x154>;
interrupts = <0x00 0x01 0x04>;
clocks = <0x1f 0x141 0x1f 0x140>;
compatible = "rockchip,canfd-1.0";
status = "disabled";
tx-fifo-depth = <0x01>;
rx-fifo-depth = <0x06>;
reg = <0x00 0xfe570000 0x00 0x1000>;
phandle = <0x180>;
reset-names = "can\0can-apb";
};
pcie@fe260000 {
power-domains = <0x21 0x0f>;
vpcie3v3-supply = <0x3d>;
#address-cells = <0x03>;
phy-names = "pcie-phy";
bus-range = <0x00 0x0f>;
clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux";
reg-names = "pcie-dbi\0pcie-apb";
num-ob-windows = <0x02>;
resets = <0x1f 0xa1>;
interrupts = <0x00 0x4b 0x04 0x00 0x4a 0x04 0x00 0x49 0x04 0x00 0x48 0x04 0x00 0x47 0x04>;
clocks = <0x1f 0x81 0x1f 0x82 0x1f 0x83 0x1f 0x84 0x1f 0x85>;
interrupt-map = <0x00 0x00 0x00 0x01 0x9a 0x00 0x00 0x00 0x00 0x02 0x9a 0x01 0x00 0x00 0x00 0x03 0x9a 0x02 0x00 0x00 0x00 0x04 0x9a 0x03>;
#size-cells = <0x02>;
max-link-speed = <0x02>;
device_type = "pci";
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
reset-gpios = <0x9c 0x0a 0x00>;
num-lanes = <0x01>;
compatible = "rockchip,rk3568-pcie\0snps,dw-pcie";
ranges = <0x800 0x00 0x00 0x03 0x00 0x00 0x800000 0x81000000 0x00 0x800000 0x03 0x800000 0x00 0x100000 0x83000000 0x00 0x900000 0x03 0x900000 0x00 0x3f700000>;
msi-map = <0x00 0x9b 0x00 0x1000>;
#interrupt-cells = <0x01>;
status = "okay";
interrupt-names = "sys\0pmc\0msg\0legacy\0err";
phys = <0x22 0x02>;
reg = <0x03 0xc0000000 0x00 0x400000 0x00 0xfe260000 0x00 0x10000>;
linux,pci-domain = <0x00>;
phandle = <0x16f>;
reset-names = "pipe";
num-ib-windows = <0x06>;
legacy-interrupt-controller {
#address-cells = <0x00>;
interrupts = <0x00 0x48 0x01>;
interrupt-parent = <0x01>;
#interrupt-cells = <0x01>;
phandle = <0x9a>;
interrupt-controller;
};
};
i2c@fdd40000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0x34>;
clock-names = "i2c\0pclk";
interrupts = <0x00 0x2e 0x04>;
clocks = <0x31 0x07 0x31 0x2d>;
#size-cells = <0x00>;
compatible = "rockchip,rk3399-i2c";
status = "okay";
reg = <0x00 0xfdd40000 0x00 0x1000>;
phandle = <0x141>;
pmic@20 {
pinctrl-names = "default\0pmic-sleep\0pmic-power-off\0pmic-reset";
pinctrl-2 = <0x3a 0x3b>;
rockchip,system-power-controller;
clock-output-names = "rk808-clkout1\0rk808-clkout2";
pinctrl-0 = <0x37>;
wakeup-source;
interrupts = <0x03 0x08>;
#clock-cells = <0x01>;
interrupt-parent = <0x36>;
vcc1-supply = <0x3d>;
pmic-reset-func = <0x01>;
pinctrl-3 = <0x3a 0x3c>;
vcc2-supply = <0x3d>;
compatible = "rockchip,rk809";
vcc3-supply = <0x3d>;
pinctrl-1 = <0x38 0x39>;
vcc4-supply = <0x3d>;
vcc5-supply = <0x3d>;
reg = <0x20>;
phandle = <0x106>;
vcc6-supply = <0x3d>;
vcc7-supply = <0x3d>;
vcc8-supply = <0x3d>;
vcc9-supply = <0x3d>;
pinctrl_rk8xx {
gpio-controller;
phandle = <0x142>;
#gpio-cells = <0x02>;
rk817_slppin_pwrdn {
function = "pin_fun2";
pins = "gpio_slp";
phandle = <0x3b>;
};
rk817_slppin_rst {
function = "pin_fun3";
pins = "gpio_slp";
phandle = <0x3c>;
};
rk817_slppin_null {
function = "pin_fun0";
pins = "gpio_slp";
phandle = <0x143>;
};
rk817_slppin_slp {
function = "pin_fun1";
pins = "gpio_slp";
phandle = <0x39>;
};
};
pwrkey {
status = "okay";
};
regulators {
DCDC_REG4 {
regulator-max-microvolt = <0x149970>;
regulator-boot-on;
regulator-init-microvolt = <0xdbba0>;
regulator-always-on;
regulator-min-microvolt = <0x7a120>;
regulator-name = "vdd_npu";
regulator-ramp-delay = <0x1771>;
regulator-initial-mode = <0x02>;
phandle = <0x145>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG4 {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x325aa0>;
regulator-name = "vccio_acodec";
phandle = <0x2a>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
DCDC_REG2 {
regulator-max-microvolt = <0x149970>;
regulator-boot-on;
regulator-init-microvolt = <0xdbba0>;
regulator-always-on;
regulator-min-microvolt = <0x7a120>;
regulator-name = "vdd_gpu";
regulator-ramp-delay = <0x1771>;
regulator-initial-mode = <0x02>;
phandle = <0x61>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG2 {
regulator-max-microvolt = <0xdbba0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0xdbba0>;
regulator-name = "vdda_0v9";
phandle = <0x147>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG9 {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x325aa0>;
regulator-name = "VCC_GPIO0_17";
phandle = <0x14a>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
SWITCH_REG1 {
regulator-boot-on;
regulator-always-on;
regulator-name = "vcc_3v3";
phandle = <0x2d>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG7 {
regulator-max-microvolt = <0x1b7740>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x1b7740>;
regulator-name = "vcca_1v8";
phandle = <0xee>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
DCDC_REG5 {
regulator-max-microvolt = <0x1b7740>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x1b7740>;
regulator-name = "vcc_1v8";
phandle = <0x2c>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG5 {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x1b7740>;
regulator-name = "vccio_sd";
phandle = <0x2b>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
DCDC_REG3 {
regulator-boot-on;
regulator-always-on;
regulator-name = "vcc_ddr";
regulator-initial-mode = <0x02>;
phandle = <0x144>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
LDO_REG3 {
regulator-max-microvolt = <0xdbba0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0xdbba0>;
regulator-name = "vdda0v9_pmu";
phandle = <0x148>;
regulator-state-mem {
regulator-suspend-microvolt = <0xdbba0>;
regulator-on-in-suspend;
};
};
DCDC_REG1 {
regulator-max-microvolt = <0x149970>;
regulator-boot-on;
regulator-init-microvolt = <0xdbba0>;
regulator-always-on;
regulator-min-microvolt = <0x7a120>;
regulator-name = "vdd_logic";
regulator-ramp-delay = <0x1771>;
regulator-initial-mode = <0x02>;
phandle = <0x64>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG1 {
regulator-max-microvolt = <0xdbba0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0xdbba0>;
regulator-name = "vdda0v9_image";
phandle = <0x146>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
SWITCH_REG2 {
regulator-boot-on;
regulator-always-on;
regulator-name = "vcc3v3_sd";
phandle = <0x9d>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
LDO_REG8 {
regulator-max-microvolt = <0x1b7740>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x1b7740>;
regulator-name = "vcca1v8_pmu";
phandle = <0x149>;
regulator-state-mem {
regulator-suspend-microvolt = <0x1b7740>;
regulator-on-in-suspend;
};
};
LDO_REG6 {
regulator-max-microvolt = <0x325aa0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x325aa0>;
regulator-name = "vcc3v3_pmu";
phandle = <0x29>;
regulator-state-mem {
regulator-suspend-microvolt = <0x325aa0>;
regulator-on-in-suspend;
};
};
};
codec {
pinctrl-names = "default";
spk-volume = <0x03>;
pinctrl-0 = <0x3e>;
clock-names = "mclk";
assigned-clocks = <0x1f 0x48>;
assigned-clock-parents = <0x1f 0x196>;
clocks = <0x1f 0x48>;
#sound-dai-cells = <0x00>;
hp-volume = <0x14>;
avrman-spk-con-gpio = <0x36 0x06 0x01>;
compatible = "rockchip,rk809-codec\0rockchip,rk817-codec";
avrman-hp-det-gpio = <0x3f 0x16 0x01>;
status = "okay";
phandle = <0x105>;
};
};
tcs4525@1c {
regulator-max-microvolt = <0x1535b0>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0xadf34>;
regulator-name = "vdd_cpu";
regulator-ramp-delay = <0x8fc>;
fcs,suspend-voltage-selector = <0x01>;
compatible = "tcs,tcs452x";
reg = <0x1c>;
phandle = <0x05>;
vin-supply = <0x35>;
regulator-compatible = "fan53555-reg";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
pwm@fdd70030 {
pinctrl-names = "active";
pinctrl-0 = <0x45>;
clock-names = "pwm\0pclk";
interrupts = <0x00 0x52 0x04 0x00 0x56 0x04>;
clocks = <0x31 0x0d 0x31 0x30>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfdd70030 0x00 0x10>;
phandle = <0x14f>;
};
serial@fdd50000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0x41>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x74 0x04>;
clocks = <0x31 0x0b 0x31 0x2c>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfdd50000 0x00 0x100>;
phandle = <0x14b>;
dmas = <0x40 0x00 0x40 0x01>;
reg-shift = <0x02>;
};
otp@fe38c000 {
#address-cells = <0x01>;
clock-names = "usr\0sbpi\0apb\0phy";
resets = <0x1f 0x1cf>;
clocks = <0x1f 0x73 0x1f 0x72 0x1f 0x71 0x1f 0x181>;
#size-cells = <0x01>;
compatible = "rockchip,rk3568-otp";
reg = <0x00 0xfe38c000 0x00 0x4000>;
phandle = <0x177>;
reset-names = "otp_phy";
cpu-leakage@1a {
reg = <0x1a 0x01>;
phandle = <0x06>;
};
core-pvtm@2a {
reg = <0x2a 0x02>;
phandle = <0x07>;
};
id@a {
reg = <0x0a 0x10>;
phandle = <0x0d>;
};
mbist-vmin@9 {
bits = <0x00 0x04>;
reg = <0x09 0x01>;
phandle = <0x08>;
};
npu-leakage@1c {
reg = <0x1c 0x01>;
phandle = <0x62>;
};
cpu-code@2 {
reg = <0x02 0x02>;
phandle = <0x0f>;
};
cpu-version@8 {
bits = <0x03 0x03>;
reg = <0x08 0x01>;
phandle = <0x0e>;
};
gpu-leakage@1d {
reg = <0x1d 0x01>;
phandle = <0x66>;
};
log-leakage@1b {
reg = <0x1b 0x01>;
phandle = <0x99>;
};
};
pwm@fe700020 {
pinctrl-names = "active";
pinctrl-0 = <0xea>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x160 0x1f 0x15f>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe700020 0x00 0x10>;
phandle = <0x1a3>;
};
chosen {
u-boot,version = "2024.04-armbian-2024.04-S830c-P0000-H264e-V155b-Ba09f-R448a";
linux,initrd-end = <0x00 0xece9143a>;
bootargs = "root=UUID=db7180e1-951c-44a8-8e47-37b50d1bd411 rootwait rootfstype=ext4 splash=verbose console=ttyS2,1500000 console=tty1 consoleblank=0 loglevel=5 ubootpart=bb1d6ebb-5bca-45ae-aa10-cd228bed5111 usb-storage.quirks=0x2537:0x1066:u,0x2537:0x1068:u cgroup_enable=cpuset cgroup_memory=1 cgroup_enable=memory";
linux,initrd-start = <0x00 0xebf56000>;
phandle = <0x29b>;
};
iommu@fde4b000 {
power-domains = <0x21 0x06>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x97 0x04>;
clocks = <0x1f 0x28 0x1f 0x29>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
status = "disabled";
interrupt-names = "rknpu_mmu";
reg = <0x00 0xfde4b000 0x00 0x40>;
phandle = <0x5f>;
};
rkcif@fdfe0000 {
power-domains = <0x21 0x08>;
iommus = <0x71>;
clock-names = "aclk_cif\0hclk_cif\0dclk_cif\0iclk_cif_g";
reg-names = "cif_regs";
assigned-clocks = <0x1f 0xd0>;
assigned-clock-rates = <0x11e1a300>;
resets = <0x1f 0xf7 0x1f 0xf8 0x1f 0xf9 0x1f 0xfb 0x1f 0xfa>;
interrupts = <0x00 0x92 0x04>;
clocks = <0x1f 0xce 0x1f 0xcf 0x1f 0xd0 0x1f 0xd1>;
compatible = "rockchip,rk3568-cif";
status = "okay";
rockchip,grf = <0x32>;
interrupt-names = "cif-intr";
reg = <0x00 0xfdfe0000 0x00 0x8000>;
phandle = <0x72>;
reset-names = "rst_cif_a\0rst_cif_h\0rst_cif_d\0rst_cif_p\0rst_cif_i";
};
spi@fe610000 {
pinctrl-names = "default\0high_speed";
#address-cells = <0x01>;
pinctrl-0 = <0xc6 0xc7 0xc8>;
clock-names = "spiclk\0apb_pclk";
interrupts = <0x00 0x67 0x04>;
clocks = <0x1f 0x152 0x1f 0x151>;
#size-cells = <0x00>;
dma-names = "tx\0rx";
compatible = "rockchip,rk3066-spi";
pinctrl-1 = <0xc6 0xc7 0xc9>;
status = "disabled";
reg = <0x00 0xfe610000 0x00 0x1000>;
phandle = <0x18c>;
dmas = <0x40 0x14 0x40 0x15>;
};
pwm@fdd70020 {
pinctrl-names = "active";
pinctrl-0 = <0x44>;
clock-names = "pwm\0pclk";
clocks = <0x31 0x0d 0x31 0x30>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfdd70020 0x00 0x10>;
phandle = <0x14e>;
};
rkvenc-opp-table {
rockchip,pvtm-ch = <0x00 0x05>;
nvmem-cells = <0x07>;
compatible = "operating-points-v2";
nvmem-cell-names = "pvtm";
rockchip,pvtm-voltage-sel = <0x00 0x14050 0x00 0x14051 0x16b48 0x01 0x16b49 0x186a0 0x02>;
phandle = <0x6e>;
opp-400000000 {
opp-microvolt = <0xe7ef0>;
opp-microvolt-L2 = <0x00>;
opp-hz = <0x00 0x17d78400>;
opp-microvolt-L0 = <0xe7ef0>;
opp-microvolt-L1 = <0xe1d48>;
};
opp-297000000 {
opp-microvolt = <0x00>;
opp-hz = <0x00 0x11b3dc40>;
};
};
dwmmc@fe2c0000 {
fifo-depth = <0x100>;
pinctrl-names = "default";
supports-sdio;
pinctrl-0 = <0xa3 0xa4 0xa5>;
clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
cap-sd-highspeed;
bus-width = <0x04>;
non-removable;
resets = <0x1f 0xd6>;
cap-sdio-irq;
interrupts = <0x00 0x63 0x04>;
clocks = <0x1f 0xb2 0x1f 0xb3 0x1f 0x18c 0x1f 0x18d>;
keep-power-in-suspend;
compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc";
status = "okay";
disable-wp;
mmc-pwrseq = <0xa2>;
reg = <0x00 0xfe2c0000 0x00 0x4000>;
phandle = <0x171>;
sd-uhs-sdr104;
max-frequency = <0x8f0d180>;
reset-names = "reset";
};
pwm@fe700010 {
pinctrl-names = "active";
pinctrl-0 = <0xe9>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x160 0x1f 0x15f>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe700010 0x00 0x10>;
phandle = <0x1a2>;
};
i2c@fe5b0000 {
pinctrl-names = "default";
#address-cells = <0x01>;
pinctrl-0 = <0xbf>;
clock-names = "i2c\0pclk";
interrupts = <0x00 0x30 0x04>;
clocks = <0x1f 0x14a 0x1f 0x149>;
#size-cells = <0x00>;
compatible = "rockchip,rk3399-i2c";
status = "disabled";
reg = <0x00 0xfe5b0000 0x00 0x1000>;
phandle = <0x185>;
};
qos@fe190300 {
compatible = "syscon";
reg = <0x00 0xfe190300 0x00 0x20>;
phandle = <0x5b>;
};
pwm@fdd70010 {
pinctrl-names = "active";
pinctrl-0 = <0x43>;
clock-names = "pwm\0pclk";
clocks = <0x31 0x0d 0x31 0x30>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfdd70010 0x00 0x10>;
phandle = <0x14d>;
};
csi2-dphy2 {
rockchip,hw = <0xf2>;
compatible = "rockchip,rk3568-csi2-dphy";
status = "okay";
phandle = <0x1a9>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
endpoint@1 {
data-lanes = <0x01 0x02>;
remote-endpoint = <0xf5>;
reg = <0x01>;
phandle = <0xc3>;
};
};
port@1 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x01>;
endpoint@1 {
remote-endpoint = <0xf6>;
reg = <0x01>;
phandle = <0x78>;
};
};
};
};
pwm@fe700000 {
pinctrl-names = "active";
pinctrl-0 = <0xe8>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x160 0x1f 0x15f>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe700000 0x00 0x10>;
phandle = <0x1a1>;
};
syscon@fdc50000 {
compatible = "rockchip,rk3568-pipegrf\0syscon";
reg = <0x00 0xfdc50000 0x00 0x1000>;
phandle = <0xef>;
};
fiq-debugger {
pinctrl-names = "default";
rockchip,irq-mode-enable = <0x01>;
rockchip,baudrate = <0x16e360>;
pinctrl-0 = <0xd8>;
interrupts = <0x00 0xfc 0x08>;
rockchip,wake-irq = <0x00>;
compatible = "rockchip,fiq-debugger";
status = "okay";
phandle = <0x29c>;
rockchip,serial-id = <0x02>;
};
rkisp-vir0 {
#address-cells = <0x01>;
rockchip,hw = <0x76>;
#size-cells = <0x00>;
compatible = "rockchip,rkisp-vir";
status = "disabled";
phandle = <0x15f>;
port {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
endpoint@0 {
remote-endpoint = <0x77>;
reg = <0x00>;
phandle = <0xf4>;
};
};
};
dsi@fe070000 {
power-domains = <0x21 0x09>;
#address-cells = <0x01>;
phy-names = "mipi_dphy";
clock-names = "pclk\0hclk\0hs_clk";
resets = <0x1f 0x111>;
interrupts = <0x00 0x45 0x04>;
clocks = <0x1f 0xe9 0x1f 0xda 0x8f>;
#size-cells = <0x00>;
compatible = "rockchip,rk3568-mipi-dsi";
status = "disabled";
rockchip,grf = <0x32>;
phys = <0x8f>;
reg = <0x00 0xfe070000 0x00 0x10000>;
phandle = <0x169>;
reset-names = "apb";
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
phandle = <0x16a>;
endpoint@1 {
remote-endpoint = <0x90>;
status = "disabled";
reg = <0x01>;
phandle = <0x88>;
};
endpoint@0 {
remote-endpoint = <0x15>;
status = "disabled";
reg = <0x00>;
phandle = <0x84>;
};
};
};
};
clock-controller@fdd20000 {
#reset-cells = <0x01>;
assigned-clocks = <0x31 0x05 0x1f 0x106 0x1f 0x10b 0x31 0x01 0x31 0x2b 0x1f 0x03 0x1f 0x19b 0x1f 0x09 0x1f 0x19c 0x1f 0x19d 0x1f 0x1a1 0x1f 0x19e 0x1f 0x19f 0x1f 0x1a0 0x1f 0x04 0x1f 0x10d 0x1f 0x10e 0x1f 0x173 0x1f 0x174 0x1f 0x175 0x1f 0x176 0x1f 0xc9 0x1f 0xca 0x1f 0x06 0x1f 0x7e 0x1f 0x7f 0x1f 0x3d 0x1f 0x41 0x1f 0x45 0x1f 0x49 0x1f 0x4d 0x1f 0x4d 0x1f 0x55 0x1f 0x51 0x1f 0x5d 0x1f 0xdd>;
assigned-clock-parents = <0x31 0x08 0x1f 0x04 0x1f 0x04>;
assigned-clock-rates = <0x8000 0x11e1a300 0x11e1a300 0xbebc200 0x5f5e100 0x3b9aca00 0x1dcd6500 0x13d92d40 0xee6b280 0x7735940 0x5f5e100 0x3b9aca0 0x2faf080 0x17d7840 0x46cf7100 0x8f0d180 0x5f5e100 0x1dcd6500 0x17d78400 0x8f0d180 0x5f5e100 0x11e1a300 0x8f0d180 0x47868c00 0x17d78400 0x5f5e100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x46cf7100 0x1dcd6500>;
#clock-cells = <0x01>;
compatible = "rockchip,rk3568-cru";
rockchip,grf = <0x32>;
reg = <0x00 0xfdd20000 0x00 0x1000>;
phandle = <0x1f>;
};
pwm@fdd70000 {
pinctrl-names = "active";
pinctrl-0 = <0x42>;
clock-names = "pwm\0pclk";
clocks = <0x31 0x0d 0x31 0x30>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfdd70000 0x00 0x10>;
phandle = <0x14c>;
};
iommu@fdea0800 {
power-domains = <0x21 0x0b>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x8a 0x04>;
clocks = <0x1f 0xee 0x1f 0xef>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
status = "okay";
interrupt-names = "vdpu_mmu";
reg = <0x00 0xfdea0800 0x00 0x40>;
phandle = <0x67>;
};
syscon@fda00000 {
compatible = "rockchip,rk3568-xpcs\0syscon";
status = "disabled";
reg = <0x00 0xfda00000 0x00 0x200000>;
phandle = <0x139>;
};
syscon@fdc90000 {
compatible = "rockchip,pipe-phy-grf\0syscon";
reg = <0x00 0xfdc90000 0x00 0x1000>;
phandle = <0xf1>;
};
bus-npu {
clock-names = "bus";
rockchip,busfreq-policy = "clkfreq";
clocks = <0x02 0x02>;
compatible = "rockchip,rk3568-bus";
status = "disabled";
bus-supply = <0x64>;
phandle = <0x152>;
operating-points-v2 = <0x63>;
pvtm-supply = <0x05>;
};
i2s1-mclkin-tx {
clock-output-names = "i2s1_mclkin_tx";
#clock-cells = <0x00>;
clock-frequency = <0xbb8000>;
compatible = "fixed-clock";
phandle = <0x129>;
};
dwmmc@fe000000 {
fifo-depth = <0x100>;
clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
resets = <0x1f 0xeb>;
interrupts = <0x00 0x64 0x04>;
clocks = <0x1f 0xc1 0x1f 0xc2 0x1f 0x18e 0x1f 0x18f>;
compatible = "rockchip,rk3568-dw-mshc\0rockchip,rk3288-dw-mshc";
status = "disabled";
reg = <0x00 0xfe000000 0x00 0x4000>;
phandle = <0x16e>;
max-frequency = <0x8f0d180>;
reset-names = "reset";
};
i2s@fe420000 {
pinctrl-names = "default";
rockchip,cru = <0x1f>;
pinctrl-0 = <0xab 0xac 0xad 0xae>;
clock-names = "mclk_tx\0mclk_rx\0hclk";
interrupts = <0x00 0x36 0x04>;
clocks = <0x1f 0x4f 0x1f 0x4f 0x1f 0x3b>;
dma-names = "tx\0rx";
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-i2s-tdm";
status = "disabled";
rockchip,grf = <0x32>;
reg = <0x00 0xfe420000 0x00 0x1000>;
phandle = <0x178>;
dmas = <0xa6 0x04 0xa6 0x05>;
rockchip,clk-trcm = <0x01>;
};
dmac@fe550000 {
clock-names = "apb_pclk";
interrupts = <0x00 0x10 0x04 0x00 0x0f 0x04>;
clocks = <0x1f 0x10d>;
arm,pl330-periph-burst;
compatible = "arm,pl330\0arm,primecell";
reg = <0x00 0xfe550000 0x00 0x4000>;
phandle = <0xa6>;
#dma-cells = <0x01>;
};
qos@fe190280 {
compatible = "syscon";
reg = <0x00 0xfe190280 0x00 0x20>;
phandle = <0x5a>;
};
iommu@fdee0800 {
power-domains = <0x21 0x0a>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x3f 0x04>;
clocks = <0x1f 0xfd 0x1f 0xfe>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
status = "okay";
interrupt-names = "vepu_mmu";
reg = <0x00 0xfdee0800 0x00 0x40>;
phandle = <0x6b>;
};
cpus {
#address-cells = <0x02>;
#size-cells = <0x00>;
cpu@300 {
clocks = <0x02 0x00>;
cpu-idle-states = <0x04>;
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x300>;
enable-method = "psci";
phandle = <0x0c>;
operating-points-v2 = <0x03>;
};
idle-states {
entry-method = "psci";
cpu-sleep {
entry-latency-us = <0x64>;
local-timer-stop;
exit-latency-us = <0x78>;
arm,psci-suspend-param = <0x10000>;
compatible = "arm,idle-state";
phandle = <0x04>;
min-residency-us = <0x3e8>;
};
};
cpu@200 {
clocks = <0x02 0x00>;
cpu-idle-states = <0x04>;
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x200>;
enable-method = "psci";
phandle = <0x0b>;
operating-points-v2 = <0x03>;
};
cpu@0 {
cpu-supply = <0x05>;
clocks = <0x02 0x00>;
cpu-idle-states = <0x04>;
device_type = "cpu";
compatible = "arm,cortex-a55";
dynamic-power-coefficient = <0xbb>;
reg = <0x00 0x00>;
enable-method = "psci";
phandle = <0x09>;
operating-points-v2 = <0x03>;
#cooling-cells = <0x02>;
power-model {
thermal-zone = "soc-thermal";
ls = <0xffffdc14 0x18d8 0x00>;
compatible = "simple-power-model";
ts = <0x1476e 0x3263d 0xffffef34 0x47>;
static-coefficient = <0x186a0>;
leakage-range = <0x0a 0x28>;
};
};
cpu@100 {
clocks = <0x02 0x00>;
cpu-idle-states = <0x04>;
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x100>;
enable-method = "psci";
phandle = <0x0a>;
operating-points-v2 = <0x03>;
};
};
__symbols__ {
cam_clkout1 = "/pinctrl/cam/cam-clkout1";
unittest0 = "/testcase-data/overlay-node/test-bus/test-unittest0";
i2c3 = "/i2c@fe5c0000";
scmi_shmem = "/scmi-shmem@10f000";
i2s1m1_sdi1 = "/pinctrl/i2s1/i2s1m1-sdi1";
vp1_out_dsi0 = "/vop@fe040000/ports/port@1/endpoint@0";
pmic_pins = "/pinctrl/pmic/pmic-pins";
pdmm0_sdi3 = "/pinctrl/pdm/pdmm0-sdi3";
usb_host1_ohci = "/usb@fd8c0000";
pwm9 = "/pwm@fe6f0010";
qos_usb3_1 = "/qos@fe190400";
gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus";
pcie30x2m2_pins = "/pinctrl/pcie30x2/pcie30x2m2-pins";
i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk";
gmac1m1_rx_er = "/pinctrl/gmac1/gmac1m1-rx-er";
vccio_acodec = "/i2c@fdd40000/pmic@20/regulators/LDO_REG4";
pdmm2_clk1 = "/pinctrl/pdm/pdmm2-clk1";
pwm14 = "/pwm@fe700020";
lvds = "/syscon@fdc60000/lvds";
video_phy1 = "/video-phy@fe860000";
can2m1_pins = "/pinctrl/can2/can2m1-pins";
sdmmc2m1_cmd = "/pinctrl/sdmmc2/sdmmc2m1-cmd";
optee = "/firmware/optee";
gmac1m0_rgmii_clk_level2 = "/pinctrl/gmac-txc-level2/gmac1m0-rgmii-clk-level2";
i2s2m1_lrcktx = "/pinctrl/i2s2/i2s2m1-lrcktx";
bt656m1_pins = "/pinctrl/bt656/bt656m1-pins";
pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins";
vdpu = "/vdpu@fdea0400";
thermal_zones = "/thermal-zones";
uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn";
i2s2m0_lrckrx = "/pinctrl/i2s2/i2s2m0-lrckrx";
bus_npu = "/bus-npu";
provider4 = "/testcase-data/phandle-tests/provider4";
qos_gpu = "/qos@fe128000";
qos_iep = "/qos@fe158100";
pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3";
vp1 = "/vop@fe040000/ports/port@1";
uart1m1_xfer = "/pinctrl/uart1/uart1m1-xfer";
i2s1m2_sclkrx = "/pinctrl/i2s1/i2s1m2-sclkrx";
uart8 = "/serial@fe6c0000";
qos_vop_m1 = "/qos@fe1a8100";
edp_in_vp1 = "/edp@fe0c0000/ports/port@0/endpoint@1";
ride_200_right = "/testcase-data-2/fairway-1/ride@200/track@20";
i2s3m0_lrck = "/pinctrl/i2s3/i2s3m0-lrck";
pcfg_pull_none_smt = "/pinctrl/pcfg-pull-none-smt";
work_led = "/leds/work";
rkvenc_opp_table = "/rkvenc-opp-table";
spi0m0_cs0_hs = "/pinctrl/spi0-hs/spi0m0-cs0";
vp0_out_hdmi = "/vop@fe040000/ports/port@0/endpoint@3";
spi2m1_cs0 = "/pinctrl/spi2/spi2m1-cs0";
fspi_cs1 = "/pinctrl/fspi/fspi-cs1";
qos_ebc = "/qos@fe158000";
csi2_dphy1 = "/csi2-dphy1";
spi2 = "/spi@fe630000";
gpio0 = "/pinctrl/gpio@fdd60000";
saradc = "/saradc@fe720000";
i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3";
route_edp = "/display-subsystem/route/route-edp";
emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
i2s3m1_mclk = "/pinctrl/i2s3/i2s3m1-mclk";
dsi1 = "/dsi@fe070000";
usb2phy1 = "/usb2-phy@fe8b0000";
pmu_pins = "/pinctrl/pmu/pmu-pins";
gmac0_miim = "/pinctrl/gmac0/gmac0-miim";
spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0";
crypto = "/crypto@fe380000";
dfi = "/dfi@fe230000";
can0m0_pins = "/pinctrl/can0/can0m0-pins";
pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2";
pinctrl = "/pinctrl";
rgmii_phy0 = "/ethernet@fe010000/mdio/phy@0";
pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins";
spi3m0_pins_hs = "/pinctrl/spi3-hs/spi3m0-pins";
i2s2m1_lrckrx = "/pinctrl/i2s2/i2s2m1-lrckrx";
gmac1m0_rgmii_bus = "/pinctrl/gmac1/gmac1m0-rgmii-bus";
pdmm0_clk = "/pinctrl/pdm/pdmm0-clk";
qos_isp = "/qos@fe148000";
sdei = "/firmware/sdei";
pdm = "/pdm@fe440000";
sata2_pins = "/pinctrl/sata2/sata2-pins";
vdd_logic = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG1";
uart2m1_xfer = "/pinctrl/uart2/uart2m1-xfer";
jtag_pins = "/pinctrl/jtag/jtag-pins";
route_rgb = "/display-subsystem/route/route-rgb";
i2c1 = "/i2c@fe5a0000";
csi2_dphy_hw = "/csi2-dphy-hw@fe870000";
uart3m0_ctsn = "/pinctrl/uart3/uart3m0-ctsn";
vopm0_pins = "/pinctrl/vop/vopm0-pins";
sdmmc2m0_pwren = "/pinctrl/sdmmc2/sdmmc2m0-pwren";
rkvdec_mmu = "/iommu@fdf80800";
qos_rkvenc_rd_m0 = "/qos@fe138080";
pdmm0_sdi1 = "/pinctrl/pdm/pdmm0-sdi1";
cpu_code = "/otp@fe38c000/cpu-code@2";
pwm7 = "/pwm@fe6e0030";
spi0m1_cs0_hs = "/pinctrl/spi0-hs/spi0m1-cs0";
i2s2m0_sclktx = "/pinctrl/i2s2/i2s2m0-sclktx";
gpu_leakage = "/otp@fe38c000/gpu-leakage@1d";
sdmmc0_pwren = "/pinctrl/sdmmc0/sdmmc0-pwren";
sdmmc0_clk = "/pinctrl/sdmmc0/sdmmc0-clk";
pwm3_pins = "/pinctrl/pwm3/pwm3-pins";
rockchip_system_monitor = "/rockchip-system-monitor";
gmac1_clkin = "/external-gmac1-clock";
ext_cam_imx219_clk = "/external-camera-imx219-clock";
pwm12 = "/pwm@fe700000";
emmc_cmd = "/pinctrl/emmc/emmc-cmd";
i2s1_8ch = "/i2s@fe410000";
mipi_csi2 = "/mipi-csi2@fdfb0000";
pcie30x1m1_pins = "/pinctrl/pcie30x1/pcie30x1m1-pins";
pcfg_pull_none = "/pinctrl/pcfg-pull-none";
i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk";
vdd_npu = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG4";
can1m0_pins = "/pinctrl/can1/can1m0-pins";
flash_pins = "/pinctrl/flash/flash-pins";
provider2 = "/testcase-data/phandle-tests/provider2";
clk32k_out0 = "/pinctrl/clk32k/clk32k-out0";
pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins";
i2s1m2_sdo2 = "/pinctrl/i2s1/i2s1m2-sdo2";
qos_rga_wr = "/qos@fe158300";
unittest101 = "/testcase-data/overlay-node/test-bus/test-unittest101";
pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1";
combphy2_psq = "/phy@fe840000";
gmac1m1_tx_bus2_level3 = "/pinctrl/gmac-txd-level3/gmac1m1-tx-bus2-level3";
hdmitxm1_cec = "/pinctrl/hdmitx/hdmitxm1-cec";
uart6 = "/serial@fe6a0000";
sdhci = "/sdhci@fe310000";
target = "/thermal-zones/soc-thermal/trips/trip-point-1";
gmac0_rgmii_bus_level3 = "/pinctrl/gmac-txd-level3/gmac0-rgmii-bus-level3";
uart3m1_xfer = "/pinctrl/uart3/uart3m1-xfer";
spi2m0_cs1_hs = "/pinctrl/spi2-hs/spi2m0-cs1";
uart4m0_ctsn = "/pinctrl/uart4/uart4m0-ctsn";
vcc_sys = "/vcc-sys";
audiopwm_routp = "/pinctrl/audiopwm/audiopwm-routp";
i2s2m0_sdo = "/pinctrl/i2s2/i2s2m0-sdo";
nandc0 = "/nandc@fe330000";
gpu = "/gpu@fde60000";
spi0 = "/spi@fe610000";
iep = "/iep@fdef0000";
i2s2m1_sclktx = "/pinctrl/i2s2/i2s2m1-sclktx";
i2s2m0_sclkrx = "/pinctrl/i2s2/i2s2m0-sclkrx";
drm_logo = "/reserved-memory/drm-logo@00000000";
i2s1m0_sdi1 = "/pinctrl/i2s1/i2s1m0-sdi1";
usb_host0_ohci = "/usb@fd840000";
unittest7 = "/testcase-data/overlay-node/test-bus/test-unittest7";
unittest_test_bus = "/testcase-data/overlay-node/test-bus";
cif_dvp_bus16 = "/pinctrl/cif/cif-dvp-bus16";
pcie30x2m1_pins = "/pinctrl/pcie30x2/pcie30x2m1-pins";
dmc = "/dmc";
ebc = "/ebc@fdec0000";
i2s2m0_mclk = "/pinctrl/i2s2/i2s2m0-mclk";
scmi = "/firmware/scmi";
rkisp_mmu = "/iommu@fdff1a00";
pdmm1_clk1 = "/pinctrl/pdm/pdmm1-clk1";
lvds_in_vp2 = "/syscon@fdc60000/lvds/ports/port@0/endpoint@2";
can2m0_pins = "/pinctrl/can2/can2m0-pins";
edp_in = "/edp@fe0c0000/ports/port@0";
sdmmc1_cmd = "/pinctrl/sdmmc1/sdmmc1-cmd";
bt656m0_pins = "/pinctrl/bt656/bt656m0-pins";
pwm0m0_pins = "/pinctrl/pwm0/pwm0m0-pins";
otp_cpu_version = "/otp@fe38c000/cpu-version@8";
audiopwm_lout = "/pinctrl/audiopwm/audiopwm-lout";
uart7m2_xfer = "/pinctrl/uart7/uart7m2-xfer";
pmugrf = "/syscon@fdc20000";
uart4m1_xfer = "/pinctrl/uart4/uart4m1-xfer";
i2s2_2ch = "/i2s@fe420000";
pwm5 = "/pwm@fe6e0010";
spi2m1_cs1_hs = "/pinctrl/spi2-hs/spi2m1-cs1";
uart1m0_xfer = "/pinctrl/uart1/uart1m0-xfer";
uart5m0_ctsn = "/pinctrl/uart5/uart5m0-ctsn";
gmac1m1_miim = "/pinctrl/gmac1/gmac1m1-miim";
rk817_slppin_pwrdn = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_pwrdn";
i2s2m1_sclkrx = "/pinctrl/i2s2/i2s2m1-sclkrx";
pwm10 = "/pwm@fe6f0020";
sdmmc2m1_clk = "/pinctrl/sdmmc2/sdmmc2m1-clk";
rktimer = "/timer@fe5f0000";
rkcif_dvp_sditf = "/rkcif_dvp_sditf";
i2s3m0_mclk = "/pinctrl/i2s3/i2s3m0-mclk";
provider0 = "/testcase-data/phandle-tests/provider0";
route_hdmi = "/display-subsystem/route/route-hdmi";
pipe_phy_grf2 = "/syscon@fdc90000";
i2s1m2_sdo0 = "/pinctrl/i2s1/i2s1m2-sdo0";
dsi0_in_vp1 = "/dsi@fe060000/ports/port@0/endpoint@1";
dmc_opp_table = "/dmc-opp-table";
uart4 = "/serial@fe680000";
pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins";
vp0_out_dsi1 = "/vop@fe040000/ports/port@0/endpoint@1";
spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0";
pdmm2_sdi2 = "/pinctrl/pdm/pdmm2-sdi2";
pcie30x1_buttonrstn = "/pinctrl/pcie30x1/pcie30x1-buttonrstn";
u2phy1_host = "/usb2-phy@fe8b0000/host-port";
qos_sata2 = "/qos@fe190300";
ddr3_params = "/ddr3-params";
rkisp_vir1 = "/rkisp-vir1";
spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1";
otp_id = "/otp@fe38c000/id@a";
spi2m1_pins_hs = "/pinctrl/spi2-hs/spi2m1-pins";
uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer";
sata1_pins = "/pinctrl/sata1/sata1-pins";
lpddr4x_params = "/lpddr4x-params";
uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer";
uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn";
npu_pins = "/pinctrl/npu/npu-pins";
vdd_gpu = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG2";
xin32k = "/xin32k";
unittest5 = "/testcase-data/overlay-node/test-bus/test-unittest5";
cpu0_opp_table = "/cpu0-opp-table";
eink = "/eink@fdf00000";
ride_200 = "/testcase-data-2/fairway-1/ride@200";
spi1m0_cs0_hs = "/pinctrl/spi1-hs/spi1m0-cs0";
vp1_out_hdmi = "/vop@fe040000/ports/port@1/endpoint@3";
i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer";
bus_npu_opp_table = "/bus-npu-opp-table";
pcie30x1m0_pins = "/pinctrl/pcie30x1/pcie30x1m0-pins";
qos_vicap0 = "/qos@fe148080";
qos_vpu = "/qos@fe150000";
audiopwm_loutn = "/pinctrl/audiopwm/audiopwm-loutn";
vdda0v9_image = "/i2c@fdd40000/pmic@20/regulators/LDO_REG1";
qos_pcie2x1 = "/qos@fe190000";
spi1m0_pins_hs = "/pinctrl/spi1-hs/spi1m0-pins";
power = "/power-management@fdd90000/power-controller";
vad = "/vad@fe450000";
gmac1m1_rgmii_bus_level3 = "/pinctrl/gmac-txd-level3/gmac1m1-rgmii-bus-level3";
dsi1_in_vp1 = "/dsi@fe070000/ports/port@0/endpoint@1";
ext_cam_imx219_clk_two = "/external-camera-imx219-clock-two";
pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins";
i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2";
eth0_pins = "/pinctrl/eth0/eth0-pins";
pwm3 = "/pwm@fdd70030";
ddr4_params = "/ddr4-params";
rkcif_mmu = "/iommu@fdfe0800";
gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2";
sata2 = "/sata@fc800000";
uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer";
i2s1m2_sdi2 = "/pinctrl/i2s1/i2s1m2-sdi2";
uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer";
pinctrl_rk8xx = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx";
uart3m0_xfer = "/pinctrl/uart3/uart3m0-xfer";
uart7m0_ctsn = "/pinctrl/uart7/uart7m0-ctsn";
usb2phy0_grf = "/syscon@fdca0000";
scmi_clk = "/firmware/scmi/protocol@14";
emmc_clk = "/pinctrl/emmc/emmc-clk";
imx219_1 = "/i2c@fe5a0000/imx219-1@10";
usbdrd30 = "/usbdrd";
cru = "/clock-controller@fdd20000";
spdifm1_tx = "/pinctrl/spdif/spdifm1-tx";
sdmmc2m0_det = "/pinctrl/sdmmc2/sdmmc2m0-det";
spi1m1_cs0_hs = "/pinctrl/spi1-hs/spi1m1-cs0";
rknpu_mmu = "/iommu@fde4b000";
rkcif_mipi_lvds_sditf = "/rkcif_mipi_lvds_sditf";
i2c3m1_xfer = "/pinctrl/i2c3/i2c3m1-xfer";
pipe_phy_grf0 = "/syscon@fdc70000";
pcie30x2m0_pins = "/pinctrl/pcie30x2/pcie30x2m0-pins";
cpu3 = "/cpus/cpu@300";
gmac1_stmmac_axi_setup = "/ethernet@fe010000/stmmac-axi-config";
spi3m1_cs0 = "/pinctrl/spi3/spi3m1-cs0";
reboot_mode = "/syscon@fdc20000/reboot-mode";
pdmm0_clk1 = "/pinctrl/pdm/pdmm0-clk1";
gmac1m0_tx_bus2_level3 = "/pinctrl/gmac-txd-level3/gmac1m0-tx-bus2-level3";
uart2 = "/serial@fe660000";
rk817_slppin_rst = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_rst";
pdmm2_sdi0 = "/pinctrl/pdm/pdmm2-sdi0";
mailbox = "/mailbox@fe780000";
dmac0 = "/dmac@fe530000";
soc_slppin_gpio = "/pinctrl/pmic/soc_slppin_gpio";
vp1_out_edp = "/vop@fe040000/ports/port@1/endpoint@2";
pdmm1_clk = "/pinctrl/pdm/pdmm1-clk";
sdio_pwrseq = "/sdio-pwrseq";
jpegd_mmu = "/iommu@fded0480";
uart7m1_xfer = "/pinctrl/uart7/uart7m1-xfer";
otp = "/otp@fe38c000";
uart4m0_xfer = "/pinctrl/uart4/uart4m0-xfer";
uart8m0_ctsn = "/pinctrl/uart8/uart8m0-ctsn";
gmac1m0_rx_bus2 = "/pinctrl/gmac1/gmac1m0-rx-bus2";
edp_phy = "/edp-phy@fdcb0000";
unittest3 = "/testcase-data/overlay-node/test-bus/test-unittest3";
combphy1_usq = "/phy@fe830000";
refclk_pins = "/pinctrl/refclk/refclk-pins";
qos_rkvenc_wr_m0 = "/qos@fe138180";
gmac1m0_miim = "/pinctrl/gmac1/gmac1m0-miim";
core_pvtm = "/otp@fe38c000/core-pvtm@2a";
pmu_io_domains = "/syscon@fdc20000/io-domains";
route_lvds = "/display-subsystem/route/route-lvds";
spi3m0_cs1_hs = "/pinctrl/spi3-hs/spi3m0-cs1";
test_intc2 = "/testcase-data/interrupts/intc2";
vcc3v3_sd = "/i2c@fdd40000/pmic@20/regulators/SWITCH_REG2";
gic = "/interrupt-controller@fd400000";
uart0_rtsn = "/pinctrl/uart0/uart0-rtsn";
pipegrf = "/syscon@fdc50000";
gmac0_rgmii_clk_level2 = "/pinctrl/gmac-txc-level2/gmac0-rgmii-clk-level2";
sdmmc1_clk = "/pinctrl/sdmmc1/sdmmc1-clk";
unittest_i2c_test_bus = "/testcase-data/overlay-node/test-bus/i2c-test-bus";
test_intmap0 = "/testcase-data/interrupts/intmap0";
i2c4m1_xfer = "/pinctrl/i2c4/i2c4m1-xfer";
hdmi_in_vp1 = "/hdmi@fe0a0000/ports/port/endpoint@1";
sdmmc2m1_pwren = "/pinctrl/sdmmc2/sdmmc2m1-pwren";
sdmmc1 = "/dwmmc@fe2c0000";
ebc_extern = "/pinctrl/ebc/ebc-extern";
i2s1m1_sdo0 = "/pinctrl/i2s1/i2s1m1-sdo0";
sdmmc1_pwren = "/pinctrl/sdmmc1/sdmmc1-pwren";
hvac_1 = "/testcase-data-2/substation@100/hvac-medium-1";
leds = "/leds";
pwm1 = "/pwm@fdd70010";
threshold = "/thermal-zones/soc-thermal/trips/trip-point-0";
i2s1m2_sdi0 = "/pinctrl/i2s1/i2s1m2-sdi0";
can2 = "/can@fe590000";
edp = "/edp@fe0c0000";
pdmm1_sdi2 = "/pinctrl/pdm/pdmm1-sdi2";
rk809_sound = "/rk809-sound";
u2phy0_host = "/usb2-phy@fe8a0000/host-port";
uart8m1_xfer = "/pinctrl/uart8/uart8m1-xfer";
spin_ctrl_1 = "/testcase-data-2/substation@100/motor-1";
sata_pins = "/pinctrl/sata/sata-pins";
lpddr3_params = "/lpddr3-params";
uart5m0_xfer = "/pinctrl/uart5/uart5m0-xfer";
uart9m0_ctsn = "/pinctrl/uart9/uart9m0-ctsn";
sata0_pins = "/pinctrl/sata0/sata0-pins";
usb_host1_ehci = "/usb@fd880000";
xin24m = "/xin24m";
vp1_out_lvds = "/vop@fe040000/ports/port@1/endpoint@4";
i2s2m1_sdo = "/pinctrl/i2s2/i2s2m1-sdo";
mcp251x_clk = "/mcp251x-clk";
pcfg_output_low_pull_down = "/pinctrl/pcfg-output-low-pull-down";
rk809_codec = "/i2c@fdd40000/pmic@20/codec";
csi2dphy1_out = "/csi2-dphy1/ports/port@1/endpoint@1";
route_dsi1 = "/display-subsystem/route/route-dsi1";
tsadc = "/tsadc@fe710000";
eth1m1_pins = "/pinctrl/eth1/eth1m1-pins";
mdio1 = "/ethernet@fe010000/mdio";
gpio3 = "/pinctrl/gpio@fe760000";
spi3m1_cs1_hs = "/pinctrl/spi3-hs/spi3m1-cs1";
gpu_opp_table = "/opp-table2";
cpu1 = "/cpus/cpu@100";
vdpu_mmu = "/iommu@fdea0800";
i2c5m1_xfer = "/pinctrl/i2c5/i2c5m1-xfer";
rgb = "/syscon@fdc60000/rgb";
i2c2m0_xfer = "/pinctrl/i2c2/i2c2m0-xfer";
uart0 = "/serial@fdd50000";
i2s3m0_sdo = "/pinctrl/i2s3/i2s3m0-sdo";
i2s2m0_sdi = "/pinctrl/i2s2/i2s2m0-sdi";
pwm8m1_pins = "/pinctrl/pwm8/pwm8m1-pins";
dsi1_in = "/dsi@fe070000/ports/port@0";
spi0m1_pins = "/pinctrl/spi0/spi0m1-pins";
bt1120_pins = "/pinctrl/bt1120/bt1120-pins";
rides_1 = "/testcase-data-2/fairway-1";
imx219_1_out = "/i2c@fe5a0000/imx219-1@10/port/endpoint";
spi0m1_pins_hs = "/pinctrl/spi0-hs/spi0m1-pins";
i2s1m0_sdo2 = "/pinctrl/i2s1/i2s1m0-sdo2";
u2phy0_otg = "/usb2-phy@fe8a0000/otg-port";
edpdpm1_pins = "/pinctrl/edpdp/edpdpm1-pins";
qos_hdcp = "/qos@fe1a8000";
unittest1 = "/testcase-data/overlay-node/test-bus/test-unittest1";
i2c4 = "/i2c@fe5d0000";
rk_rga = "/rk_rga@fdeb0000";
uart9m1_xfer = "/pinctrl/uart9/uart9m1-xfer";
i2s1m1_sdi2 = "/pinctrl/i2s1/i2s1m1-sdi2";
sdmmc1_bus4 = "/pinctrl/sdmmc1/sdmmc1-bus4";
i2s3_2ch = "/i2s@fe430000";
vp1_out_dsi1 = "/vop@fe040000/ports/port@1/endpoint@1";
lpddr4_params = "/lpddr4-params";
uart6m0_xfer = "/pinctrl/uart6/uart6m0-xfer";
vcc3v3_pmu = "/i2c@fdd40000/pmic@20/regulators/LDO_REG6";
uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn";
test_intc0 = "/testcase-data/interrupts/intc0";
vdd_cpu = "/i2c@fdd40000/tcs4525@1c";
qos_jpeg_dec = "/qos@fe158180";
pwm15 = "/pwm@fe700030";
vop_mmu = "/iommu@fe043e00";
gmac1m1_tx_bus2 = "/pinctrl/gmac1/gmac1m1-tx-bus2";
sdmmc0_det = "/pinctrl/sdmmc0/sdmmc0-det";
iep_mmu = "/iommu@fdef0800";
i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer";
csi2dphy1_ucam0 = "/csi2-dphy1/ports/port@0/endpoint@1";
gmac1m1_rgmii_bus = "/pinctrl/gmac1/gmac1m1-rgmii-bus";
spi2m0_cs0_hs = "/pinctrl/spi2-hs/spi2m0-cs0";
pwm7_pins = "/pinctrl/pwm7/pwm7-pins";
can0 = "/can@fe570000";
pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins";
pdmm1_sdi0 = "/pinctrl/pdm/pdmm1-sdi0";
vp2 = "/vop@fe040000/ports/port@2";
spi1m1_pins = "/pinctrl/spi1/spi1m1-pins";
rng = "/rng@fe388000";
uart9 = "/serial@fe6d0000";
spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0";
wifi_enable_h = "/pinctrl/sdio-pwrseq/wifi-enable-h";
rkcif = "/rkcif@fdfe0000";
gmac0_rgmii_clk = "/pinctrl/gmac0/gmac0-rgmii-clk";
rkvdec = "/rkvdec@fdf80200";
spi2m1_cs1 = "/pinctrl/spi2/spi2m1-cs1";
cpu_leakage = "/otp@fe38c000/cpu-leakage@1a";
uart7m0_xfer = "/pinctrl/uart7/uart7m0-xfer";
csi2_dphy2 = "/csi2-dphy2";
spi3 = "/spi@fe640000";
gmac1m1_rgmii_clk_level2 = "/pinctrl/gmac-txc-level2/gmac1m1-rgmii-clk-level2";
gpio1 = "/pinctrl/gpio@fe740000";
tsadcm1_shut = "/pinctrl/tsadc/tsadcm1-shut";
spi1m0_cs0 = "/pinctrl/spi1/spi1m0-cs0";
xpcs = "/syscon@fda00000";
testcase = "/testcase-data";
spi3m0_cs1 = "/pinctrl/spi3/spi3m0-cs1";
vdda0v9_pmu = "/i2c@fdd40000/pmic@20/regulators/LDO_REG3";
i2c4m0_xfer = "/pinctrl/i2c4/i2c4m0-xfer";
its = "/interrupt-controller@fd400000/interrupt-controller@fd440000";
wdt = "/watchdog@fe600000";
rknpu_reserved = "/reserved-memory/rknpu";
cspmu = "/cspmu@fd90c000";
usbhost_dwc3 = "/usbhost/dwc3@fd000000";
vdda_0v9 = "/i2c@fdd40000/pmic@20/regulators/LDO_REG2";
lights_1 = "/testcase-data-2/lights@30000";
qos_rga_rd = "/qos@fe158280";
spi2m1_cs0_hs = "/pinctrl/spi2-hs/spi2m1-cs0";
i2s1m0_sdo0 = "/pinctrl/i2s1/i2s1m0-sdo0";
hdmitx_scl = "/pinctrl/hdmitx/hdmitx-scl";
hdmitx_sda = "/pinctrl/hdmitx/hdmitx-sda";
spi2m1_pins = "/pinctrl/spi2/spi2m1-pins";
cam_clkout0 = "/pinctrl/cam/cam-clkout0";
i2c2 = "/i2c@fe5b0000";
soc_slppin_slp = "/pinctrl/pmic/soc_slppin_slp";
i2s1m1_sdi0 = "/pinctrl/i2s1/i2s1m1-sdi0";
sram = "/sram@fdcc0000";
gmac0_rx_er = "/pinctrl/gmac0/gmac0-rx-er";
qos_rkvenc_rd_m1 = "/qos@fe138100";
pdmm0_sdi2 = "/pinctrl/pdm/pdmm0-sdi2";
pwm8 = "/pwm@fe6f0000";
log_leakage = "/otp@fe38c000/log-leakage@1b";
gmac0_tx_bus2_level3 = "/pinctrl/gmac-txd-level3/gmac0-tx-bus2-level3";
emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
qos_usb3_0 = "/qos@fe190380";
uart8m0_xfer = "/pinctrl/uart8/uart8m0-xfer";
pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins";
usb_host0_ehci = "/usb@fd800000";
gmac1 = "/ethernet@fe010000";
usb2phy1_grf = "/syscon@fdca8000";
pcie20m2_pins = "/pinctrl/pcie20/pcie20m2-pins";
pwm13 = "/pwm@fe700010";
video_phy0 = "/video-phy@fe850000";
eth1m0_pins = "/pinctrl/eth1/eth1m0-pins";
gmac1m0_rgmii_clk = "/pinctrl/gmac1/gmac1m0-rgmii-clk";
VCC_GPIO0_17 = "/i2c@fdd40000/pmic@20/regulators/LDO_REG9";
cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8";
sdmmc2m1_det = "/pinctrl/sdmmc2/sdmmc2m1-det";
tsadc_shutorg = "/pinctrl/tsadc/tsadc-shutorg";
provider3 = "/testcase-data/phandle-tests/provider3";
clk32k_out1 = "/pinctrl/clk32k/clk32k-out1";
i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer";
audiopwm_loutp = "/pinctrl/audiopwm/audiopwm-loutp";
cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk";
i2s1m2_sdo3 = "/pinctrl/i2s1/i2s1m2-sdo3";
fspi_pins = "/pinctrl/fspi/fspi-pins";
vcc_camera_imx219 = "/vcc-camera-imx219";
rknpu = "/npu@fde40000";
pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2";
vp0 = "/vop@fe040000/ports/port@0";
i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
ebc_pins = "/pinctrl/ebc/ebc-pins";
audpwm = "/audpwm@fe470000";
uart7 = "/serial@fe6b0000";
qos_vop_m0 = "/qos@fe1a8080";
edp_in_vp0 = "/edp@fe0c0000/ports/port@0/endpoint@0";
pmucru = "/clock-controller@fdd00000";
spi3m1_pins = "/pinctrl/spi3/spi3m1-pins";
pwm8m0_pins = "/pinctrl/pwm8/pwm8m0-pins";
pmic_int = "/pinctrl/pmic/pmic_int";
spi0m0_pins = "/pinctrl/spi0/spi0m0-pins";
vcc_ddr = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG3";
edpdpm0_pins = "/pinctrl/edpdp/edpdpm0-pins";
sfc = "/sfc@fe300000";
csi2_dphy0 = "/csi2-dphy0";
spi1 = "/spi@fe620000";
spdif_8ch = "/spdif@fe460000";
wireless_bluetooth = "/wireless-bluetooth";
isp_pins = "/pinctrl/isp/isp-pins";
uart9m0_xfer = "/pinctrl/uart9/uart9m0-xfer";
i2s1m0_sdi2 = "/pinctrl/i2s1/i2s1m0-sdi2";
sdmmc0_bus4 = "/pinctrl/sdmmc0/sdmmc0-bus4";
pwm11m1_pins = "/pinctrl/pwm11/pwm11m1-pins";
unittest8 = "/testcase-data/overlay-node/test-bus/test-unittest8";
dsi0 = "/dsi@fe060000";
usb2phy0 = "/usb2-phy@fe8a0000";
uart1m0_rtsn = "/pinctrl/uart1/uart1m0-rtsn";
pcfg_pull_up_drv_level_1 = "/pinctrl/pcfg-pull-up-drv-level-1";
gmac1_xpcsclk = "/xpcs-gmac1-clock";
vp2_out_lvds = "/vop@fe040000/ports/port@2/endpoint@0";
reserved_memory = "/reserved-memory";
vop_out = "/vop@fe040000/ports";
i2s1_mclkin_tx = "/i2s1-mclkin-tx";
clk32k_in = "/pinctrl/clk32k/clk32k-in";
ride_200_left = "/testcase-data-2/fairway-1/ride@200/track@10";
mcu_pins = "/pinctrl/mcu/mcu-pins";
i2c0 = "/i2c@fdd40000";
pwm6_pins = "/pinctrl/pwm6/pwm6-pins";
soc_thermal = "/thermal-zones/soc-thermal";
spi3m1_pins_hs = "/pinctrl/spi3-hs/spi3m1-pins";
pwm9m0_pins = "/pinctrl/pwm9/pwm9m0-pins";
pcie30x2_buttonrstn = "/pinctrl/pcie30x2/pcie30x2-buttonrstn";
pdmm0_sdi0 = "/pinctrl/pdm/pdmm0-sdi0";
pwm6 = "/pwm@fe6e0020";
spi1m0_pins = "/pinctrl/spi1/spi1m0-pins";
spdifm0_tx = "/pinctrl/spdif/spdifm0-tx";
isp1_in = "/rkisp-vir1/port/endpoint@0";
vcca_1v8 = "/i2c@fdd40000/pmic@20/regulators/LDO_REG7";
pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins";
pwm11 = "/pwm@fe6f0030";
usbdrd_dwc3 = "/usbdrd/dwc3@fcc00000";
pcie20_buttonrstn = "/pinctrl/pcie20/pcie20-buttonrstn";
csi2dphy2_out = "/csi2-dphy2/ports/port@1/endpoint@1";
io_domains = "/syscon@fdc60000/io-domains";
tsadcm0_shut = "/pinctrl/tsadc/tsadcm0-shut";
provider1 = "/testcase-data/phandle-tests/provider1";
i2s1m2_sdo1 = "/pinctrl/i2s1/i2s1m2-sdo1";
spi2m0_pins_hs = "/pinctrl/spi2-hs/spi2m0-pins";
unittest100 = "/testcase-data/overlay-node/test-bus/test-unittest100";
rockchip_suspend = "/rockchip-suspend";
cpu_pins = "/pinctrl/cpu/cpu-pins";
i2s1_mclkin_rx = "/i2s1-mclkin-rx";
sc16is752_clk = "/sc16is752-clk";
i2s3m1_sdo = "/pinctrl/i2s3/i2s3m1-sdo";
uart5 = "/serial@fe690000";
gmac1m0_clkinout = "/pinctrl/gmac1/gmac1m0-clkinout";
fiq_debugger = "/fiq-debugger";
spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1";
pdmm2_sdi3 = "/pinctrl/pdm/pdmm2-sdi3";
rgb_in_vp2 = "/syscon@fdc60000/rgb/ports/port@0/endpoint@2";
i2s2m1_sdi = "/pinctrl/i2s2/i2s2m1-sdi";
vcc_camera_imx219_two = "/vcc-camera-imx219-two";
spi2m0_pins = "/pinctrl/spi2/spi2m0-pins";
vepu_mmu = "/iommu@fdee0800";
imx219_2_out = "/i2c@fe5c0000/imx219-2@10/port/endpoint";
gmac1_mtl_rx_setup = "/ethernet@fe010000/rx-queues-config";
u2phy1_otg = "/usb2-phy@fe8b0000/otg-port";
spi3m0_cs0_hs = "/pinctrl/spi3-hs/spi3m0-cs0";
i2s1m0_sdi0 = "/pinctrl/i2s1/i2s1m0-sdi0";
unittest6 = "/testcase-data/overlay-node/test-bus/test-unittest6";
spi0m0_cs1_hs = "/pinctrl/spi0-hs/spi0m0-cs1";
i2s2_mclkin = "/i2s2-mclkin";
mpll = "/mpll";
pwm13m1_pins = "/pinctrl/pwm13/pwm13m1-pins";
i2s3m0_sdi = "/pinctrl/i2s3/i2s3m0-sdi";
pwm10m0_pins = "/pinctrl/pwm10/pwm10m0-pins";
uart3m0_rtsn = "/pinctrl/uart3/uart3m0-rtsn";
vop = "/vop@fe040000";
lvds_in_vp1 = "/syscon@fdc60000/lvds/ports/port@0/endpoint@1";
pcie20m1_pins = "/pinctrl/pcie20/pcie20m1-pins";
vepu = "/vepu@fdee0000";
cif_clk = "/pinctrl/cif/cif-clk";
sdmmc2m1_bus4 = "/pinctrl/sdmmc2/sdmmc2m1-bus4";
rk817_slppin_null = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_null";
qos_vicap1 = "/qos@fe148100";
sdmmc1_det = "/pinctrl/sdmmc1/sdmmc1-det";
dig_acodec = "/codec-digital@fe478000";
gmac1m0_rx_er = "/pinctrl/gmac1/gmac1m0-rx-er";
i2s1m1_sdo3 = "/pinctrl/i2s1/i2s1m1-sdo3";
gmac0_rx_bus2 = "/pinctrl/gmac0/gmac0-rx-bus2";
uart0_ctsn = "/pinctrl/uart0/uart0-ctsn";
i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
pwm4 = "/pwm@fe6e0000";
vcc3v3_sys = "/vcc3v3-sys";
i2s1m2_sdi3 = "/pinctrl/i2s1/i2s1m2-sdi3";
spi3m0_pins = "/pinctrl/spi3/spi3m0-pins";
i2s3m1_sclk = "/pinctrl/i2s3/i2s3m1-sclk";
spi3m1_cs0_hs = "/pinctrl/spi3-hs/spi3m1-cs0";
i2s1m0_lrcktx = "/pinctrl/i2s1/i2s1m0-lrcktx";
csi2dphy2_ucam0 = "/csi2-dphy2/ports/port@0/endpoint@1";
rkisp = "/rkisp@fdff0000";
vcca1v8_pmu = "/i2c@fdd40000/pmic@20/regulators/LDO_REG8";
chosen = "/chosen";
soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
imx219_2 = "/i2c@fe5c0000/imx219-2@10";
mpp_srv = "/mpp-srv";
i2s3_mclkin = "/i2s3-mclkin";
sdmmc2m0_cmd = "/pinctrl/sdmmc2/sdmmc2m0-cmd";
debug = "/debug@fd904000";
pwm14m1_pins = "/pinctrl/pwm14/pwm14m1-pins";
pwm11m0_pins = "/pinctrl/pwm11/pwm11m0-pins";
tsadc_gpio_func = "/pinctrl/gpio-func/tsadc-gpio-func";
spi1m1_cs0 = "/pinctrl/spi1/spi1m1-cs0";
uart4m0_rtsn = "/pinctrl/uart4/uart4m0-rtsn";
vp0_out_edp = "/vop@fe040000/ports/port@0/endpoint@2";
pipe_phy_grf1 = "/syscon@fdc80000";
pcfg_pull_down = "/pinctrl/pcfg-pull-down";
pcie2x1_intc = "/pcie@fe260000/legacy-interrupt-controller";
dsi0_in = "/dsi@fe060000/ports/port@0";
spi3m1_cs1 = "/pinctrl/spi3/spi3m1-cs1";
dsi0_in_vp0 = "/dsi@fe060000/ports/port@0/endpoint@0";
uart3 = "/serial@fe670000";
pcfg_pull_up = "/pinctrl/pcfg-pull-up";
vp0_out_dsi0 = "/vop@fe040000/ports/port@0/endpoint@0";
acodec_pins = "/pinctrl/acodec/acodec-pins";
pdmm2_sdi1 = "/pinctrl/pdm/pdmm2-sdi1";
dmac1 = "/dmac@fe550000";
qos_sata1 = "/qos@fe190280";
rkisp_vir0 = "/rkisp-vir0";
spi2m0_cs0 = "/pinctrl/spi2/spi2m0-cs0";
gmac1m0_rgmii_bus_level3 = "/pinctrl/gmac-txd-level3/gmac1m0-rgmii-bus-level3";
npu_opp_table = "/npu-opp-table";
pwm5_pins = "/pinctrl/pwm5/pwm5-pins";
gmac1_mtl_tx_setup = "/ethernet@fe010000/tx-queues-config";
i2s1m2_mclk = "/pinctrl/i2s1/i2s1m2-mclk";
i2s1m1_lrcktx = "/pinctrl/i2s1/i2s1m1-lrcktx";
i2s1m0_lrckrx = "/pinctrl/i2s1/i2s1m0-lrckrx";
vccio_sd = "/i2c@fdd40000/pmic@20/regulators/LDO_REG5";
vcc_1v8 = "/i2c@fdd40000/pmic@20/regulators/DCDC_REG5";
pwm15m1_pins = "/pinctrl/pwm15/pwm15m1-pins";
pwm12m0_pins = "/pinctrl/pwm12/pwm12m0-pins";
test_intmap1 = "/testcase-data/interrupts/intmap1";
uart5m0_rtsn = "/pinctrl/uart5/uart5m0-rtsn";
sdmmc2 = "/dwmmc@fe000000";
dsi1_in_vp0 = "/dsi@fe070000/ports/port@0/endpoint@0";
wifi_host_wake_irq = "/pinctrl/wireless-wlan/wifi-host-wake-irq";
i2s1m1_sdo1 = "/pinctrl/i2s1/i2s1m1-sdo1";
uart1m1_ctsn = "/pinctrl/uart1/uart1m1-ctsn";
hvac_2 = "/testcase-data-2/substation@100/hvac-large-1";
pwm2 = "/pwm@fdd70020";
audiopwm_routn = "/pinctrl/audiopwm/audiopwm-routn";
sata1 = "/sata@fc400000";
i2s1m2_sdi1 = "/pinctrl/i2s1/i2s1m2-sdi1";
CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
spi1m1_pins_hs = "/pinctrl/spi1-hs/spi1m1-pins";
pdmm1_sdi3 = "/pinctrl/pdm/pdmm1-sdi3";
display_subsystem = "/display-subsystem";
spin_ctrl_2 = "/testcase-data-2/substation@100/motor-8";
i2s0_8ch = "/i2s@fe400000";
pmu = "/power-management@fdd90000";
i2s1m2_lrcktx = "/pinctrl/i2s1/i2s1m2-lrcktx";
i2s1m1_lrckrx = "/pinctrl/i2s1/i2s1m1-lrckrx";
pcie2x1 = "/pcie@fe260000";
emmc_datastrobe = "/pinctrl/emmc/emmc-datastrobe";
gpio4 = "/pinctrl/gpio@fe770000";
scr = "/rkscr@fe560000";
pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins";
cpu2 = "/cpus/cpu@200";
uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn";
hdmitxm0_cec = "/pinctrl/hdmitx/hdmitxm0-cec";
gpu_thermal = "/thermal-zones/gpu-thermal";
audiopwm_rout = "/pinctrl/audiopwm/audiopwm-rout";
spi0m0_pins_hs = "/pinctrl/spi0-hs/spi0m0-pins";
uart1 = "/serial@fe650000";
pcie20m0_pins = "/pinctrl/pcie20/pcie20m0-pins";
hdmi = "/hdmi@fe0a0000";
sdmmc2m0_bus4 = "/pinctrl/sdmmc2/sdmmc2m0-bus4";
i2s1m0_sclktx = "/pinctrl/i2s1/i2s1m0-sclktx";
gpu_pins = "/pinctrl/gpu/gpu-pins";
rk809 = "/i2c@fdd40000/pmic@20";
ramoops = "/reserved-memory/ramoops@110000";
i2s3m1_lrck = "/pinctrl/i2s3/i2s3m1-lrck";
hdmi_in = "/hdmi@fe0a0000/ports/port";
rkvdec_sram = "/sram@fdcc0000/rkvdec-sram@0";
i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3";
unittest2 = "/testcase-data/overlay-node/test-bus/test-unittest2";
soc_slppin_rst = "/pinctrl/pmic/soc_slppin_rst";
i2c5 = "/i2c@fe5e0000";
qos_rkvdec = "/qos@fe198000";
i2s1m1_sdi3 = "/pinctrl/i2s1/i2s1m1-sdi3";
gmac1m1_clkinout = "/pinctrl/gmac1/gmac1m1-clkinout";
gmac1m0_tx_bus2 = "/pinctrl/gmac1/gmac1m0-tx-bus2";
i2s3m0_sclk = "/pinctrl/i2s3/i2s3m0-sclk";
uart1_gpios = "/pinctrl/wireless-bluetooth/uart1-gpios";
qos_npu = "/qos@fe180000";
npu_leakage = "/otp@fe38c000/npu-leakage@1c";
grf = "/syscon@fdc60000";
retail_1 = "/testcase-data-2/vending@50000";
qos_jpeg_enc = "/qos@fe158200";
test_intc1 = "/testcase-data/interrupts/intc1";
i2s1m2_lrckrx = "/pinctrl/i2s1/i2s1m2-lrckrx";
gmac1m1_rx_bus2 = "/pinctrl/gmac1/gmac1m1-rx-bus2";
scr_pins = "/pinctrl/scr/scr-pins";
can0m1_pins = "/pinctrl/can0/can0m1-pins";
hdmi_in_vp0 = "/hdmi@fe0a0000/ports/port/endpoint@0";
sdmmc0_cmd = "/pinctrl/sdmmc0/sdmmc0-cmd";
pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins";
usbhost30 = "/usbhost";
drm_cubic_lut = "/reserved-memory/drm-cubic-lut@00000000";
uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn";
sdmmc0 = "/dwmmc@fe2b0000";
spi1m0_cs1_hs = "/pinctrl/spi1-hs/spi1m0-cs1";
mbist_vmin = "/otp@fe38c000/mbist-vmin@9";
i2s1m1_sclktx = "/pinctrl/i2s1/i2s1m1-sclktx";
vp2_out_rgb = "/vop@fe040000/ports/port@2/endpoint@1";
pwm0 = "/pwm@fdd70000";
i2s1m0_sclkrx = "/pinctrl/i2s1/i2s1m0-sclkrx";
vopm1_pins = "/pinctrl/vop/vopm1-pins";
can1 = "/can@fe580000";
hdmi_sound = "/hdmi-sound";
pdmm1_sdi1 = "/pinctrl/pdm/pdmm1-sdi1";
vcc_3v3 = "/i2c@fdd40000/pmic@20/regulators/SWITCH_REG1";
uart0_xfer = "/pinctrl/uart0/uart0-xfer";
rkvenc = "/rkvenc@fdf40000";
gmac0_clkinout = "/pinctrl/gmac0/gmac0-clkinout";
rkcif_dvp = "/rkcif_dvp";
wireless_wlan = "/wireless-wlan";
rkcif_mipi_lvds = "/rkcif_mipi_lvds";
sdmmc2m0_clk = "/pinctrl/sdmmc2/sdmmc2m0-clk";
pwm4_pins = "/pinctrl/pwm4/pwm4-pins";
route_dsi0 = "/display-subsystem/route/route-dsi0";
pcie30x1m2_pins = "/pinctrl/pcie30x1/pcie30x1m2-pins";
i2s1m1_mclk = "/pinctrl/i2s1/i2s1m1-mclk";
gpio2 = "/pinctrl/gpio@fe750000";
spi1m0_cs1 = "/pinctrl/spi1/spi1m0-cs1";
rkvenc_mmu = "/iommu@fdf40f00";
electric_1 = "/testcase-data-2/substation@100";
cpu0 = "/cpus/cpu@0";
lcdc_ctl = "/pinctrl/lcdc/lcdc-ctl";
can1m1_pins = "/pinctrl/can1/can1m1-pins";
spdifm2_tx = "/pinctrl/spdif/spdifm2-tx";
i2s3m1_sdi = "/pinctrl/i2s3/i2s3m1-sdi";
gmac1m1_rgmii_clk = "/pinctrl/gmac1/gmac1m1-rgmii-clk";
pwm15m0_pins = "/pinctrl/pwm15/pwm15m0-pins";
i2s2m0_lrcktx = "/pinctrl/i2s2/i2s2m0-lrcktx";
rk817_slppin_slp = "/i2c@fdd40000/pmic@20/pinctrl_rk8xx/rk817_slppin_slp";
uart8m0_rtsn = "/pinctrl/uart8/uart8m0-rtsn";
jpegd = "/jpegd@fded0000";
i2s1m2_sclktx = "/pinctrl/i2s1/i2s1m2-sclktx";
lights_2 = "/testcase-data-2/lights@40000";
i2s1m1_sclkrx = "/pinctrl/i2s1/i2s1m1-sclkrx";
isp0_in = "/rkisp-vir0/port/endpoint@0";
i2s1m0_sdo1 = "/pinctrl/i2s1/i2s1m0-sdo1";
uart1m0_ctsn = "/pinctrl/uart1/uart1m0-ctsn";
};
vepu@fdee0000 {
power-domains = <0x21 0x0a>;
iommus = <0x6b>;
clock-names = "aclk_vcodec\0hclk_vcodec";
resets = <0x1f 0x12e 0x1f 0x12f>;
interrupts = <0x00 0x40 0x04>;
clocks = <0x1f 0xfd 0x1f 0xfe>;
rockchip,srv = <0x68>;
rockchip,taskqueue-node = <0x02>;
rockchip,disable-auto-freq;
compatible = "rockchip,vpu-encoder-v2";
rockchip,resetgroup-node = <0x02>;
status = "okay";
reg = <0x00 0xfdee0000 0x00 0x400>;
phandle = <0x157>;
reset-names = "video_a\0video_h";
};
sfc@fe300000 {
clock-names = "clk_sfc\0hclk_sfc";
assigned-clocks = <0x1f 0x78>;
assigned-clock-rates = <0x5f5e100>;
interrupts = <0x00 0x65 0x04>;
clocks = <0x1f 0x78 0x1f 0x76>;
compatible = "rockchip,sfc";
status = "okay";
reg = <0x00 0xfe300000 0x00 0x4000>;
phandle = <0x172>;
};
pwm@fe6f0030 {
pinctrl-names = "active";
pinctrl-0 = <0xe7>;
clock-names = "pwm\0pclk";
interrupts = <0x00 0x54 0x04 0x00 0x58 0x04>;
clocks = <0x1f 0x15d 0x1f 0x15c>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6f0030 0x00 0x10>;
phandle = <0x1a0>;
};
serial@fe6d0000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xdf>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x7d 0x04>;
clocks = <0x1f 0x13f 0x1f 0x13c>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe6d0000 0x00 0x100>;
phandle = <0x198>;
dmas = <0x40 0x12 0x40 0x13>;
reg-shift = <0x02>;
};
reserved-memory {
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
phandle = <0x11d>;
rknpu {
alignment = <0x00 0x1000>;
inactive;
compatible = "shared-dma-pool";
size = <0x00 0x1000000>;
phandle = <0x60>;
reusable;
};
drm-logo@00000000 {
compatible = "rockchip,drm-logo";
reg = <0x00 0xedf00000 0x00 0x20754c>;
phandle = <0x10>;
};
ramoops@110000 {
record-size = <0x20000>;
pmsg-size = <0x50000>;
compatible = "ramoops";
console-size = <0x80000>;
reg = <0x00 0x110000 0x00 0xf0000>;
phandle = <0x11e>;
ftrace-size = <0x00>;
};
drm-cubic-lut@00000000 {
compatible = "rockchip,drm-cubic-lut";
reg = <0x00 0xeff00000 0x00 0x8000>;
phandle = <0x11>;
};
};
iommu@fe043e00 {
clock-names = "aclk\0iface";
interrupts = <0x00 0x94 0x04>;
clocks = <0x1f 0xdd 0x1f 0xde>;
#iommu-cells = <0x00>;
compatible = "rockchip,iommu-v2";
status = "okay";
interrupt-names = "vop_mmu";
reg = <0x00 0xfe043e00 0x00 0x100 0x00 0xfe043f00 0x00 0x100>;
phandle = <0x82>;
};
qos@fe138180 {
compatible = "syscon";
reg = <0x00 0xfe138180 0x00 0x20>;
phandle = <0x58>;
};
csi2-dphy-hw@fe870000 {
clock-names = "pclk";
clocks = <0x1f 0x179>;
compatible = "rockchip,rk3568-csi2-dphy-hw";
status = "okay";
rockchip,grf = <0x32>;
reg = <0x00 0xfe870000 0x00 0x1000>;
phandle = <0xf2>;
};
csi2-dphy0 {
rockchip,hw = <0xf2>;
compatible = "rockchip,rk3568-csi2-dphy";
status = "disabled";
phandle = <0x1a7>;
};
rng@fe388000 {
clock-names = "clk_trng\0hclk_trng";
resets = <0x1f 0x6d>;
clocks = <0x1f 0x70 0x1f 0x6f>;
compatible = "rockchip,cryptov2-rng";
status = "okay";
reg = <0x00 0xfe388000 0x00 0x2000>;
phandle = <0x176>;
reset-names = "reset";
};
i2s1-mclkin-rx {
clock-output-names = "i2s1_mclkin_rx";
#clock-cells = <0x00>;
clock-frequency = <0xbb8000>;
compatible = "fixed-clock";
phandle = <0x128>;
};
pwm@fe6f0020 {
pinctrl-names = "active";
pinctrl-0 = <0xe6>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x15d 0x1f 0x15c>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6f0020 0x00 0x10>;
phandle = <0x19f>;
};
pdm@fe440000 {
pinctrl-names = "default";
pinctrl-0 = <0xb3 0xb4 0xb5 0xb6 0xb7 0xb8>;
clock-names = "pdm_clk\0pdm_hclk";
clocks = <0x1f 0x5a 0x1f 0x59>;
dma-names = "rx";
#sound-dai-cells = <0x00>;
compatible = "rockchip,rk3568-pdm\0rockchip,pdm";
status = "disabled";
reg = <0x00 0xfe440000 0x00 0x1000>;
phandle = <0x17a>;
dmas = <0xa6 0x09>;
};
pwm@fe6f0010 {
pinctrl-names = "active";
pinctrl-0 = <0xe5>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x15d 0x1f 0x15c>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6f0010 0x00 0x10>;
phandle = <0x19e>;
};
qos@fe158000 {
compatible = "syscon";
reg = <0x00 0xfe158000 0x00 0x20>;
phandle = <0x4e>;
};
vop@fe040000 {
power-domains = <0x21 0x09>;
iommus = <0x82>;
clock-names = "aclk_vop\0hclk_vop\0dclk_vp0\0dclk_vp1\0dclk_vp2";
reg-names = "regs\0gamma_lut";
assigned-clocks = <0x1f 0xdf 0x1f 0xe0>;
assigned-clock-parents = <0x31 0x02 0x1f 0x05>;
interrupts = <0x00 0x94 0x04>;
clocks = <0x1f 0xdd 0x1f 0xde 0x1f 0xdf 0x1f 0xe0 0x1f 0xe1>;
compatible = "rockchip,rk3568-vop";
status = "okay";
rockchip,grf = <0x32>;
reg = <0x00 0xfe040000 0x00 0x3000 0x00 0xfe044000 0x00 0x1000>;
phandle = <0x163>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x12>;
port@0 {
rockchip,primary-plane = <0x02>;
rockchip,plane-mask = <0x05>;
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
phandle = <0x164>;
endpoint@3 {
remote-endpoint = <0x86>;
reg = <0x03>;
phandle = <0x17>;
};
endpoint@1 {
remote-endpoint = <0x84>;
reg = <0x01>;
phandle = <0x15>;
};
endpoint@2 {
remote-endpoint = <0x85>;
reg = <0x02>;
phandle = <0x16>;
};
endpoint@0 {
remote-endpoint = <0x83>;
reg = <0x00>;
phandle = <0x14>;
};
};
port@1 {
rockchip,primary-plane = <0x03>;
rockchip,plane-mask = <0x0a>;
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x01>;
phandle = <0x165>;
endpoint@3 {
remote-endpoint = <0x8a>;
reg = <0x03>;
phandle = <0x94>;
};
endpoint@1 {
remote-endpoint = <0x88>;
reg = <0x01>;
phandle = <0x90>;
};
endpoint@4 {
remote-endpoint = <0x8b>;
reg = <0x04>;
phandle = <0x18>;
};
endpoint@2 {
remote-endpoint = <0x89>;
reg = <0x02>;
phandle = <0x96>;
};
endpoint@0 {
remote-endpoint = <0x87>;
reg = <0x00>;
phandle = <0x8e>;
};
};
port@2 {
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x02>;
phandle = <0x166>;
endpoint@1 {
remote-endpoint = <0x8d>;
reg = <0x01>;
phandle = <0x19>;
};
endpoint@0 {
remote-endpoint = <0x8c>;
reg = <0x00>;
phandle = <0x2f>;
};
};
};
};
serial@fe660000 {
reg-io-width = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <0xd8>;
clock-names = "baudclk\0apb_pclk";
interrupts = <0x00 0x76 0x04>;
clocks = <0x1f 0x123 0x1f 0x120>;
compatible = "rockchip,rk3568-uart\0snps,dw-apb-uart";
status = "disabled";
reg = <0x00 0xfe660000 0x00 0x100>;
phandle = <0x191>;
dmas = <0x40 0x04 0x40 0x05>;
reg-shift = <0x02>;
};
dmc-opp-table {
nvmem-cells = <0x99 0x07 0x08>;
rockchip,low-temp = <0x00>;
rockchip,leakage-voltage-sel = <0x01 0x50 0x00 0x51 0xfe 0x01>;
rockchip,low-temp-adjust-volt = <0x00 0x618 0x61a8>;
compatible = "operating-points-v2";
nvmem-cell-names = "leakage\0pvtm\0mbist-vmin";
phandle = <0x98>;
rockchip,temp-hysteresis = <0x1388>;
mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>;
opp-1560000000 {
opp-microvolt = <0xdbba0>;
opp-hz = <0x00 0x5cfbb600>;
opp-microvolt-L0 = <0xdbba0>;
opp-microvolt-L1 = <0xcf850>;
};
};
rkcif_dvp {
rockchip,hw = <0x72>;
compatible = "rockchip,rkcif-dvp";
status = "disabled";
phandle = <0x73>;
};
rkcif_mipi_lvds {
rockchip,hw = <0x72>;
compatible = "rockchip,rkcif-mipi-lvds";
status = "disabled";
phandle = <0x74>;
};
eink@fdf00000 {
clock-names = "pclk\0hclk";
interrupts = <0x00 0xb2 0x04>;
clocks = <0x1f 0xff 0x1f 0x100>;
compatible = "rockchip,rk3568-eink-tcon";
status = "disabled";
reg = <0x00 0xfdf00000 0x00 0x74>;
phandle = <0x159>;
};
vcc-sys {
regulator-max-microvolt = <0x4c4b40>;
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <0x4c4b40>;
regulator-name = "vcc_sys";
compatible = "regulator-fixed";
phandle = <0x35>;
};
pwm@fe6f0000 {
pinctrl-names = "active";
pinctrl-0 = <0xe4>;
clock-names = "pwm\0pclk";
clocks = <0x1f 0x15d 0x1f 0x15c>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3568-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfe6f0000 0x00 0x10>;
phandle = <0x19d>;
};
memory {
device_type = "memory";
reg = <0x00 0x200000 0x00 0xefe00000 0x01 0xf0000000 0x00 0x10000000>;
};
qos@fe198000 {
compatible = "syscon";
reg = <0x00 0xfe198000 0x00 0x20>;
phandle = <0x55>;
};
cpu0-opp-table {
rockchip,pvtm-sample-time = <0x3e8>;
rockchip,pvtm-ch = <0x00 0x05>;
nvmem-cells = <0x06 0x07 0x08>;
rockchip,pvtm-number = <0x0a>;
rockchip,low-temp = <0x00>;
opp-shared;
rockchip,pvtm-freq = <0x639c0>;
rockchip,pvtm-ref-temp = <0x28>;
rockchip,thermal-zone = "soc-thermal";
rockchip,low-temp-adjust-volt = <0x00 0x648 0x124f8>;
compatible = "operating-points-v2";
nvmem-cell-names = "leakage\0pvtm\0mbist-vmin";
rockchip,pvtm-voltage-sel = <0x00 0x14050 0x00 0x14051 0x16b48 0x01 0x16b49 0x186a0 0x02>;
phandle = <0x03>;
rockchip,pvtm-temp-prop = <0x1a 0x1a>;
rockchip,temp-hysteresis = <0x1388>;
rockchip,pvtm-error = <0x3e8>;
mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>;
rockchip,avs-scale = <0x1a>;
rockchip,pvtm-volt = <0xdbba0>;
opp-1800000000 {
opp-microvolt = <0x100590 0x100590 0x100590>;
opp-hz = <0x00 0x6b49d200>;
clock-latency-ns = <0x61a80>;
};
opp-1608000000 {
opp-microvolt = <0xf4240 0xf4240 0xf4240>;
opp-hz = <0x00 0x5fd82200>;
clock-latency-ns = <0x9c40>;
};
opp-1104000000 {
opp-microvolt = <0xc96a8 0xc96a8 0x118c30>;
opp-hz = <0x00 0x41cdb400>;
clock-latency-ns = <0x9c40>;
};
opp-816000000 {
opp-microvolt = <0xc96a8 0xc96a8 0x118c30>;
opp-hz = <0x00 0x30a32c00>;
opp-suspend;
clock-latency-ns = <0x9c40>;
};
opp-600000000 {
opp-microvolt = <0xc96a8 0xc96a8 0x118c30>;
opp-hz = <0x00 0x23c34600>;
clock-latency-ns = <0x9c40>;
};
opp-1416000000 {
opp-microvolt = <0xe1d48 0xe1d48 0x118c30>;
opp-hz = <0x00 0x54667200>;
clock-latency-ns = <0x9c40>;
};
opp-408000000 {
opp-microvolt = <0xc96a8 0xc96a8 0x118c30>;
opp-hz = <0x00 0x18519600>;
clock-latency-ns = <0x9c40>;
};
};
i2s2-mclkin {
clock-output-names = "i2s2_mclkin";
#clock-cells = <0x00>;
clock-frequency = <0xbb8000>;
compatible = "fixed-clock";
phandle = <0x12a>;
};
pvtm@fde90000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "rockchip,rk3568-npu-pvtm";
reg = <0x00 0xfde90000 0x00 0x100>;
pvtm@2 {
clock-names = "clk\0pclk\0hclk";
thermal-zone = "soc-thermal";
resets = <0x1f 0x2e 0x1f 0x2d>;
clocks = <0x1f 0x2b 0x1f 0x2a 0x1f 0x25>;
reg = <0x02>;
reset-names = "rts\0rst-p";
};
};
wireless-wlan {
pinctrl-names = "default";
pinctrl-0 = <0x109>;
WIFI,host_wake_irq = <0x108 0x0a 0x00>;
wifi_chip_type = "ap6256";
compatible = "wlan-platdata";
status = "disabled";
rockchip,grf = <0x32>;
phandle = <0x2a0>;
};
rockchip-system-monitor {
rockchip,thermal-zone = "soc-thermal";
compatible = "rockchip,system-monitor";
phandle = <0x120>;
};
usbhost {
#address-cells = <0x02>;
clock-names = "ref_clk\0suspend_clk\0bus_clk\0pipe_clk";
clocks = <0x1f 0xa9 0x1f 0xaa 0x1f 0xa8 0x1f 0x7f>;
#size-cells = <0x02>;
compatible = "rockchip,rk3568-dwc3\0rockchip,rk3399-dwc3";
ranges;
status = "okay";
phandle = <0x133>;
dwc3@fd000000 {
power-domains = <0x21 0x0f>;
snps,dis_enblslpm_quirk;
phy-names = "usb2-phy\0usb3-phy";
snps,dis-u2-freeclk-exists-quirk;
phy_type = "utmi_wide";
resets = <0x1f 0x95>;
interrupts = <0x00 0xaa 0x04>;
compatible = "snps,dwc3";
snps,dis-del-phy-power-chg-quirk;
status = "okay";
snps,xhci-trb-ent-quirk;
phys = <0x25 0x20 0x04>;
reg = <0x00 0xfd000000 0x00 0x400000>;
phandle = <0x134>;
dr_mode = "host";
reset-names = "usb3-host";
snps,dis-tx-ipgap-linecheck-quirk;
};
};
crypto@fe380000 {
clock-names = "aclk\0hclk\0sclk\0apb_pclk";
assigned-clocks = <0x1f 0x6c>;
assigned-clock-rates = <0xbebc200>;
resets = <0x1f 0x69>;
interrupts = <0x00 0x04 0x04>;
clocks = <0x1f 0x6a 0x1f 0x6b 0x1f 0x6c 0x1f 0x6d>;
compatible = "rockchip,rk3568-crypto";
status = "disabled";
reg = <0x00 0xfe380000 0x00 0x4000>;
phandle = <0x175>;
reset-names = "crypto-rst";
};
can@fe580000 {
clock-names = "baudclk\0apb_pclk";
resets = <0x1f 0x157 0x1f 0x156>;
interrupts = <0x00 0x02 0x04>;
clocks = <0x1f 0x143 0x1f 0x142>;
compatible = "rockchip,canfd-1.0";
status = "disabled";
tx-fifo-depth = <0x01>;
rx-fifo-depth = <0x06>;
reg = <0x00 0xfe580000 0x00 0x1000>;
phandle = <0x181>;
reset-names = "can\0can-apb";
};
};
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