armbian-build/patch/kernel/archive/sunxi-6.14/patches.armbian/arm64-dts-sun50i-h618-orang...

435 lines
8.6 KiB
Diff

From 8d4c66671ff780d7b64b88666573ca392aa93e88 Mon Sep 17 00:00:00 2001
From: chraac <chraac@gmail.com>
Date: Fri, 15 Mar 2024 12:30:26 +0800
Subject: arm64: dts: sun50i-h618-orangepi-zero2w: Add missing nodes
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 25 +-
.../allwinner/sun50i-h618-orangepi-zero2w.dts | 289 ++++++++++++++++++
2 files changed, 306 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 72d008d6d4e7..6c1f1087f199 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -241,7 +241,7 @@ video-codec@1c0e000 {
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
- reg = <0x03000000 0x1000>;
+ reg = <0x03000000 0x30>,<0x03000038 0x0fc8>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -919,19 +919,28 @@ mdio0: mdio {
};
emac1: ethernet@5030000 {
- compatible = "allwinner,sun50i-h616-emac";
- syscon = <&syscon 1>;
- reg = <0x05030000 0x10000>;
+ compatible = "allwinner,sunxi-gmac";
+ reg = <0x05030000 0x10000>,
+ <0x03000034 0x4>;
+ reg-names = "gmac1_reg","ephy_reg";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ interrupt-names = "gmacirq";
resets = <&ccu RST_BUS_EMAC1>;
reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC1>;
- clock-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC1>,<&ccu CLK_EMAC_25M>;
+ clock-names = "bus-emac1","emac-25m";
+ pinctrl-0 = <&rmii_pins>;
+ pinctrl-names = "default";
+ tx-delay = <7>;
+ rx-delay = <31>;
+ phy-rst;
+ gmac-power0;
+ gmac-power1;
+ gmac-power2;
status = "disabled";
mdio1: mdio {
- compatible = "snps,dwmac-mdio";
+ compatible = "ethernet-phy-ieee802.3-c22";
#address-cells = <1>;
#size-cells = <0>;
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
index a0fe7a9afb77..2296c359699e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
@@ -18,12 +18,27 @@ / {
aliases {
serial0 = &uart0;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
};
chosen {
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "d";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -31,6 +46,19 @@ led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+ linux,default-trigger = "heartbeat";
+ };
+
+ 100m_link {
+ label = "100m_link";
+ gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
+ default-state = "off";
+ };
+
+ 100m_act {
+ label = "100m_act";
+ gpios = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
+ default-state = "off";
};
};
@@ -52,6 +80,85 @@ reg_vcc3v3: vcc3v3 {
vin-supply = <&reg_vcc5v>;
regulator-always-on;
};
+
+ reg_vcc_wifi_io: vcc-wifi-io {
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-wifi-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc3v3>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "osc32k-out";
+ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
+ post-power-on-delay-ms = <200>;
+ };
+
+ ac200_pwm_clk: ac200_clk {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ // pwm5 period_ns = 500 > 334 for select 24M clock.
+ pwms = <&pwm 5 500 0>;
+ clock-frequency = <2000000>;
+ status = "okay";
+ };
+
+ soc {
+ pwm: pwm@300a000 {
+ compatible = "allwinner,sun50i-h616-pwm";
+ reg = <0x0300a000 0x400>;
+ clocks = <&osc24M>, <&ccu CLK_BUS_PWM>;
+ clock-names = "mod", "bus";
+ resets = <&ccu RST_BUS_PWM>;
+ pwm-number = <6>;
+ pwm-base = <0x0>;
+ sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>,
+ <&pwm3>, <&pwm4>, <&pwm5>;
+ #pwm-cells = <3>;
+ status = "okay";
+ };
+
+ pwm0: pwm0@0300a000 {
+ compatible = "allwinner,sunxi-pwm0";
+ };
+
+ pwm1: pwm1@0300a000 {
+ compatible = "allwinner,sunxi-pwm1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_ph_pin>;
+ };
+
+ pwm2: pwm2@0300a000 {
+ compatible = "allwinner,sunxi-pwm2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_ph_pin>;
+ };
+
+ pwm3: pwm3@0300a000 {
+ compatible = "allwinner,sunxi-pwm3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_ph_pin>;
+ };
+
+ pwm4: pwm4@0300a000 {
+ compatible = "allwinner,sunxi-pwm4";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_ph_pin>;
+ };
+
+ pwm5: pwm5@0300a000 {
+ compatible = "allwinner,sunxi-pwm5";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm5_pin>;
+ clk_bypass_output = <0x1>;
+ status = "okay";
+ };
+ };
};
&codec {
@@ -59,27 +166,110 @@ &codec {
status = "okay";
};
+&de {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&reg_dcdc1>;
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_aldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
+&sid {
+ ephy_calibration: ephy-calibration@2c {
+ reg = <0x2c 0x2>;
+ };
+};
+
+&ehci0 {
+ status = "disabled";
+};
+
&ehci1 {
status = "okay";
};
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
/* USB 2 & 3 are on the FPC connector (or the exansion board) */
&mmc0 {
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
bus-width = <4>;
+ vmmc-supply = <&reg_dldo1>;
+ max-frequency = <50000000>;
+ status = "okay";
+};
+
+&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc_wifi_io>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ mmc-ddr-1_8v;
status = "okay";
};
+&emac0 {
+ status = "disabled";
+};
+
+&emac1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&rmii_phy>;
+ phy-supply = <&reg_dldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio1 {
+ rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&ohci0 {
+ status = "disabled";
+};
+
&ohci1 {
status = "okay";
};
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
&pio {
vcc-pc-supply = <&reg_dldo1>;
vcc-pf-supply = <&reg_dldo1>; /* internally via VCC-IO */
@@ -144,6 +334,12 @@ reg_dcdc3: dcdc3 {
};
};
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_rx_pin>;
+ status = "okay";
+};
+
&spi0 {
status = "okay";
pinctrl-names = "default";
@@ -158,12 +354,77 @@ flash@0 {
};
};
+&spi1 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>;
+
+ spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "disabled";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pi_pins>;
+ status = "disabled";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pi_pins>;
+ status = "disabled";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_pins>;
+ status = "disabled";
+};
+
+&i2c3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pa_pins>;
+
+ ac200_x: mfd@10 {
+ compatible = "x-powers,ac200-sunxi";
+ reg = <0x10>;
+ clocks = <&ac200_pwm_clk>;
+ // ephy id
+ nvmem-cells = <&ephy_calibration>;
+ nvmem-cell-names = "calibration";
+
+ ac200_ephy: phy {
+ compatible = "x-powers,ac200-ephy-sunxi";
+ status = "okay";
+ };
+ };
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_ph_pins>;
+ status = "disabled";
+};
+
&usbotg {
/*
* PHY0 pins are connected to a USB-C socket, but a role switch
@@ -184,3 +445,31 @@ &usbphy {
usb1_vbus-supply = <&reg_vcc5v>;
status = "okay";
};
+
+&ahub_dam_plat {
+ status = "okay";
+};
+
+&ahub1_plat {
+ status = "okay";
+};
+
+&ahub1_mach {
+ status = "okay";
+};
+
+&cpu_critical {
+ temperature = <100000>;
+};
+
+&gpu_temp_critical {
+ temperature = <100000>;
+};
+
+&ve_temp_critical {
+ temperature = <100000>;
+};
+
+&ddr_temp_critical {
+ temperature = <100000>;
+};
--
2.35.3