Fix issue #6528 opi-zero2w, ethernet PHY not powered (#6617)

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nullname 2024-06-02 16:23:18 +08:00 committed by GitHub
parent 0f66c05886
commit cc300423e1
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GPG Key ID: B5690EEEBB952194
12 changed files with 11928 additions and 51 deletions

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@ -1,6 +1,6 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.6.8 Kernel Configuration
# Linux/arm64 6.6.30 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
CONFIG_CC_IS_GCC=y
@ -2437,6 +2437,7 @@ CONFIG_MDIO=m
CONFIG_NET_VENDOR_ALACRITECH=y
CONFIG_NET_VENDOR_ALLWINNER=y
CONFIG_SUN4I_EMAC=y
CONFIG_SUNXI_GMAC=m
# CONFIG_ALTERA_TSE is not set
CONFIG_NET_VENDOR_AMAZON=y
CONFIG_NET_VENDOR_AMD=y
@ -2543,6 +2544,7 @@ CONFIG_FIXED_PHY=y
# MII PHY device drivers
#
CONFIG_AC200_PHY=m
CONFIG_AC200_PHY_SUNXI=m
CONFIG_AMD_PHY=m
CONFIG_ADIN_PHY=m
CONFIG_ADIN1100_PHY=m
@ -4047,6 +4049,7 @@ CONFIG_MFD_SUN4I_GPADC=y
CONFIG_MFD_BD9571MWV=m
CONFIG_MFD_AC100=y
CONFIG_MFD_AC200=m
CONFIG_MFD_AC200_SUNXI=m
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_AXP20X_RSB=y
@ -7482,6 +7485,7 @@ CONFIG_PWM_CLK=m
CONFIG_PWM_NTXEC=m
CONFIG_PWM_PCA9685=m
CONFIG_PWM_SUN4I=m
CONFIG_PWM_SUNXI_ENHANCE=m
CONFIG_PWM_XILINX=m
#

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@ -2446,6 +2446,7 @@ CONFIG_MDIO=m
CONFIG_NET_VENDOR_ALACRITECH=y
CONFIG_NET_VENDOR_ALLWINNER=y
CONFIG_SUN4I_EMAC=y
CONFIG_SUNXI_GMAC=m
# CONFIG_ALTERA_TSE is not set
CONFIG_NET_VENDOR_AMAZON=y
CONFIG_NET_VENDOR_AMD=y
@ -2552,6 +2553,7 @@ CONFIG_FIXED_PHY=y
# MII PHY device drivers
#
CONFIG_AC200_PHY=m
CONFIG_AC200_PHY_SUNXI=m
CONFIG_AMD_PHY=m
CONFIG_ADIN_PHY=m
CONFIG_ADIN1100_PHY=m
@ -4059,6 +4061,7 @@ CONFIG_MFD_SUN4I_GPADC=y
CONFIG_MFD_BD9571MWV=m
CONFIG_MFD_AC100=y
CONFIG_MFD_AC200=m
CONFIG_MFD_AC200_SUNXI=m
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_MFD_AXP20X_RSB=y
@ -7533,6 +7536,7 @@ CONFIG_PWM_CLK=m
CONFIG_PWM_NTXEC=m
CONFIG_PWM_PCA9685=m
CONFIG_PWM_SUN4I=m
CONFIG_PWM_SUNXI_ENHANCE=m
CONFIG_PWM_XILINX=m
#

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@ -1,25 +1,17 @@
From 09a088f5c8e28c394a74730481adf9cec434fc93 Mon Sep 17 00:00:00 2001
From a2fc735d168c47f137462b4167cdde76b96822c9 Mon Sep 17 00:00:00 2001
From: chraac <chraac@gmail.com>
Date: Fri, 15 Mar 2024 12:30:26 +0800
Subject: [PATCH] orangepi-zero2w add dtb
update zero2w dts
udpate zero2w dts from linux kernel 6.8+
add log for thermal zone
reference the sun50i-h618-cpu-dvfs.dtsi in zero2w
remove i2c bind
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h618-orangepi-zero2w.dts | 435 ++++++++++++++++++
2 files changed, 436 insertions(+)
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 25 +-
.../allwinner/sun50i-h618-orangepi-zero2w.dts | 491 ++++++++++++++++++
3 files changed, 509 insertions(+), 8 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 8b504ee408e78..a957365edc1aa 100644
index 8b504ee408e7..a957365edc1a 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -56,5 +56,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-sd.dtb
@ -29,12 +21,61 @@ index 8b504ee408e78..a957365edc1aa 100644
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb
subdir-y := $(dts-dirs) overlay
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 3a2a1c4f327a..90e55a6aef1d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -209,7 +209,7 @@ video-codec@1c0e000 {
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
- reg = <0x03000000 0x1000>;
+ reg = <0x03000000 0x30>,<0x03000038 0x0fc8>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -708,19 +708,28 @@ mdio0: mdio {
};
emac1: ethernet@5030000 {
- compatible = "allwinner,sun50i-h616-emac";
- syscon = <&syscon 1>;
- reg = <0x05030000 0x10000>;
+ compatible = "allwinner,sunxi-gmac";
+ reg = <0x05030000 0x10000>,
+ <0x03000034 0x4>;
+ reg-names = "gmac1_reg","ephy_reg";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ interrupt-names = "gmacirq";
resets = <&ccu RST_BUS_EMAC1>;
reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC1>;
- clock-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC1>,<&ccu CLK_EMAC_25M>;
+ clock-names = "bus-emac1","emac-25m";
+ pinctrl-0 = <&rmii_pins>;
+ pinctrl-names = "default";
+ tx-delay = <7>;
+ rx-delay = <31>;
+ phy-rst;
+ gmac-power0;
+ gmac-power1;
+ gmac-power2;
status = "disabled";
mdio1: mdio {
- compatible = "snps,dwmac-mdio";
+ compatible = "ethernet-phy-ieee802.3-c22";
#address-cells = <1>;
#size-cells = <0>;
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
new file mode 100644
index 0000000000000..c09cc24a8b279
index 000000000000..b224902f5684
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
@@ -0,0 +1,435 @@
@@ -0,0 +1,491 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Arm Ltd.
@ -156,11 +197,39 @@ index 0000000000000..c09cc24a8b279
+ resets = <&ccu RST_BUS_PWM>;
+ pwm-number = <6>;
+ pwm-base = <0x0>;
+ sunxi-pwms = <&pwm5>;
+ sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>, <&pwm3>, <&pwm4>, <&pwm5>;
+ #pwm-cells = <3>;
+ status = "okay";
+ };
+
+ pwm0: pwm0@0300a000 {
+ compatible = "allwinner,sunxi-pwm0";
+ };
+
+ pwm1: pwm1@0300a000 {
+ compatible = "allwinner,sunxi-pwm1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_ph_pin>;
+ };
+
+ pwm2: pwm2@0300a000 {
+ compatible = "allwinner,sunxi-pwm2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_ph_pin>;
+ };
+
+ pwm3: pwm3@0300a000 {
+ compatible = "allwinner,sunxi-pwm3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_ph_pin>;
+ };
+
+ pwm4: pwm4@0300a000 {
+ compatible = "allwinner,sunxi-pwm4";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_ph_pin>;
+ };
+
+ pwm5: pwm5@0300a000 {
+ compatible = "allwinner,sunxi-pwm5";
+ pinctrl-names = "default";
@ -209,19 +278,23 @@ index 0000000000000..c09cc24a8b279
+};
+
+&emac0 {
+ status = "disabled";
+};
+
+&emac1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-handle = <&ext_rgmii_phy>;
+ allwinner,tx-delay-ps = <700>;
+ phy-mode = "rgmii-rxid";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&rmii_phy>;
+ phy-supply = <&reg_dldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio0 {
+ ext_rgmii_phy: ethernet-phy@1 {
+&mdio1 {
+ rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ motorcomm,clk-out-frequency-hz = <125000000>;
+ reg = <1>;
+ };
+};
@ -329,7 +402,7 @@ index 0000000000000..c09cc24a8b279
+ pinctrl-0 = <&i2c3_pa_pins>;
+
+ ac200_x: mfd@10 {
+ compatible = "x-powers,ac200";
+ compatible = "x-powers,ac200-sunxi";
+ reg = <0x10>;
+ clocks = <&ac200_pwm_clk>;
+ // ephy id
@ -337,7 +410,7 @@ index 0000000000000..c09cc24a8b279
+ nvmem-cell-names = "calibration";
+
+ ac200_ephy: phy {
+ compatible = "x-powers,ac200-ephy";
+ compatible = "x-powers,ac200-ephy-sunxi";
+ status = "okay";
+ };
+ };
@ -465,6 +538,30 @@ index 0000000000000..c09cc24a8b279
+ };
+
+ /omit-if-no-ref/
+ pwm1_ph_pin: pwm1-ph-pin {
+ pins = "PH3";
+ function = "pwm1";
+ };
+
+ /omit-if-no-ref/
+ pwm2_ph_pin: pwm2-ph-pin {
+ pins = "PH2";
+ function = "pwm2";
+ };
+
+ /omit-if-no-ref/
+ pwm3_ph_pin: pwm3-ph-pin {
+ pins = "PH0";
+ function = "pwm3";
+ };
+
+ /omit-if-no-ref/
+ pwm4_ph_pin: pwm4-ph-pin {
+ pins = "PH1";
+ function = "pwm4";
+ };
+
+ /omit-if-no-ref/
+ pwm5_pin: pwm5-pin {
+ pins = "PA12";
+ function = "pwm5";

View File

@ -197,6 +197,8 @@
patches.armbian/arm64-dts-h616-add-hdmi-support-for-zero2-and-zero3.patch
patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch
patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch
patches.armbian/drv-pwm-sun50i-h616-enhance-pwm.patch
patches.armbian/drv-net-gmac-sun50i-h616-gmac.patch
patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch

View File

@ -466,6 +466,8 @@
patches.armbian/arm64-dts-h616-add-hdmi-support-for-zero2-and-zero3.patch
patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch
patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch
patches.armbian/drv-pwm-sun50i-h616-enhance-pwm.patch
patches.armbian/drv-net-gmac-sun50i-h616-gmac.patch
patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch

View File

@ -1,25 +1,17 @@
From 09a088f5c8e28c394a74730481adf9cec434fc93 Mon Sep 17 00:00:00 2001
From a2fc735d168c47f137462b4167cdde76b96822c9 Mon Sep 17 00:00:00 2001
From: chraac <chraac@gmail.com>
Date: Fri, 15 Mar 2024 12:30:26 +0800
Subject: [PATCH] orangepi-zero2w add dtb
update zero2w dts
udpate zero2w dts from linux kernel 6.8+
add log for thermal zone
reference the sun50i-h618-cpu-dvfs.dtsi in zero2w
remove i2c bind
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h618-orangepi-zero2w.dts | 435 ++++++++++++++++++
2 files changed, 436 insertions(+)
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 25 +-
.../allwinner/sun50i-h618-orangepi-zero2w.dts | 491 ++++++++++++++++++
3 files changed, 509 insertions(+), 8 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 8b504ee408e78..a957365edc1aa 100644
index 8b504ee408e7..a957365edc1a 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -56,5 +56,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-sd.dtb
@ -29,12 +21,61 @@ index 8b504ee408e78..a957365edc1aa 100644
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb
subdir-y := $(dts-dirs) overlay
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 3a2a1c4f327a..90e55a6aef1d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -209,7 +209,7 @@ video-codec@1c0e000 {
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
- reg = <0x03000000 0x1000>;
+ reg = <0x03000000 0x30>,<0x03000038 0x0fc8>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -708,19 +708,28 @@ mdio0: mdio {
};
emac1: ethernet@5030000 {
- compatible = "allwinner,sun50i-h616-emac";
- syscon = <&syscon 1>;
- reg = <0x05030000 0x10000>;
+ compatible = "allwinner,sunxi-gmac";
+ reg = <0x05030000 0x10000>,
+ <0x03000034 0x4>;
+ reg-names = "gmac1_reg","ephy_reg";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ interrupt-names = "gmacirq";
resets = <&ccu RST_BUS_EMAC1>;
reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC1>;
- clock-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC1>,<&ccu CLK_EMAC_25M>;
+ clock-names = "bus-emac1","emac-25m";
+ pinctrl-0 = <&rmii_pins>;
+ pinctrl-names = "default";
+ tx-delay = <7>;
+ rx-delay = <31>;
+ phy-rst;
+ gmac-power0;
+ gmac-power1;
+ gmac-power2;
status = "disabled";
mdio1: mdio {
- compatible = "snps,dwmac-mdio";
+ compatible = "ethernet-phy-ieee802.3-c22";
#address-cells = <1>;
#size-cells = <0>;
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
new file mode 100644
index 0000000000000..c09cc24a8b279
index 000000000000..b224902f5684
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
@@ -0,0 +1,435 @@
@@ -0,0 +1,491 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Arm Ltd.
@ -156,11 +197,39 @@ index 0000000000000..c09cc24a8b279
+ resets = <&ccu RST_BUS_PWM>;
+ pwm-number = <6>;
+ pwm-base = <0x0>;
+ sunxi-pwms = <&pwm5>;
+ sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>, <&pwm3>, <&pwm4>, <&pwm5>;
+ #pwm-cells = <3>;
+ status = "okay";
+ };
+
+ pwm0: pwm0@0300a000 {
+ compatible = "allwinner,sunxi-pwm0";
+ };
+
+ pwm1: pwm1@0300a000 {
+ compatible = "allwinner,sunxi-pwm1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_ph_pin>;
+ };
+
+ pwm2: pwm2@0300a000 {
+ compatible = "allwinner,sunxi-pwm2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_ph_pin>;
+ };
+
+ pwm3: pwm3@0300a000 {
+ compatible = "allwinner,sunxi-pwm3";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_ph_pin>;
+ };
+
+ pwm4: pwm4@0300a000 {
+ compatible = "allwinner,sunxi-pwm4";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_ph_pin>;
+ };
+
+ pwm5: pwm5@0300a000 {
+ compatible = "allwinner,sunxi-pwm5";
+ pinctrl-names = "default";
@ -209,19 +278,23 @@ index 0000000000000..c09cc24a8b279
+};
+
+&emac0 {
+ status = "disabled";
+};
+
+&emac1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-handle = <&ext_rgmii_phy>;
+ allwinner,tx-delay-ps = <700>;
+ phy-mode = "rgmii-rxid";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&rmii_phy>;
+ phy-supply = <&reg_dldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio0 {
+ ext_rgmii_phy: ethernet-phy@1 {
+&mdio1 {
+ rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ motorcomm,clk-out-frequency-hz = <125000000>;
+ reg = <1>;
+ };
+};
@ -329,7 +402,7 @@ index 0000000000000..c09cc24a8b279
+ pinctrl-0 = <&i2c3_pa_pins>;
+
+ ac200_x: mfd@10 {
+ compatible = "x-powers,ac200";
+ compatible = "x-powers,ac200-sunxi";
+ reg = <0x10>;
+ clocks = <&ac200_pwm_clk>;
+ // ephy id
@ -337,7 +410,7 @@ index 0000000000000..c09cc24a8b279
+ nvmem-cell-names = "calibration";
+
+ ac200_ephy: phy {
+ compatible = "x-powers,ac200-ephy";
+ compatible = "x-powers,ac200-ephy-sunxi";
+ status = "okay";
+ };
+ };
@ -465,6 +538,30 @@ index 0000000000000..c09cc24a8b279
+ };
+
+ /omit-if-no-ref/
+ pwm1_ph_pin: pwm1-ph-pin {
+ pins = "PH3";
+ function = "pwm1";
+ };
+
+ /omit-if-no-ref/
+ pwm2_ph_pin: pwm2-ph-pin {
+ pins = "PH2";
+ function = "pwm2";
+ };
+
+ /omit-if-no-ref/
+ pwm3_ph_pin: pwm3-ph-pin {
+ pins = "PH0";
+ function = "pwm3";
+ };
+
+ /omit-if-no-ref/
+ pwm4_ph_pin: pwm4-ph-pin {
+ pins = "PH1";
+ function = "pwm4";
+ };
+
+ /omit-if-no-ref/
+ pwm5_pin: pwm5-pin {
+ pins = "PA12";
+ function = "pwm5";

View File

@ -197,6 +197,8 @@
patches.armbian/arm64-dts-h616-add-hdmi-support-for-zero2-and-zero3.patch
patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch
patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch
patches.armbian/drv-net-gmac-sun50i-h616-gmac.patch
patches.armbian/drv-pwm-sun50i-h616-enhance-pwm.patch
patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch

View File

@ -519,6 +519,8 @@
patches.armbian/arm64-dts-h616-add-hdmi-support-for-zero2-and-zero3.patch
patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch
patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch
patches.armbian/drv-pwm-sun50i-h616-enhance-pwm.patch
patches.armbian/drv-net-gmac-sun50i-h616-gmac.patch
patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch
patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch