mirror of https://github.com/armbian/build.git
Orange Pi 3B: Edge: Switch to mainline dts
This commit is contained in:
parent
21a1628e02
commit
94f65ea813
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@ -12,12 +12,6 @@ BOOT_SCENARIO="spl-blobs"
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BOOT_SUPPORT_SPI="yes"
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BOOT_SPI_RKSPI_LOADER="yes"
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function post_family_config_branch_edge__orangepi3b_use_patched_dtb() {
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# orangepi 3b dtbs are coming to mainline in v6.11
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# until then, v1.1 boards can continue to use patched dtb
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BOOT_FDT_FILE="rockchip/rk3566-orangepi-3b.dtb"
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}
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# Override family config for this board; let's avoid conditionals in family config.
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function post_family_config__orangepi3b_use_mainline_uboot() {
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display_alert "$BOARD" "mainline u-boot overrides" "info"
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@ -1,17 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/dts-v1/;
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#include "rk3566-orangepi-3b.dts"
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/ {
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model = "Rockchip RK3566 OPi 3B with SATA instead of PCIe";
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};
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&pcie2x1 {
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status = "disabled";
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};
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&sata2 {
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status = "okay";
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};
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@ -1,869 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include "rk3566.dtsi"
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/ {
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model = "Rockchip RK3566 OPi 3B";
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compatible = "rockchip,rk3566-orangepi-3b", "rockchip,rk3566";
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aliases {
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ethernet0 = &gmac1;
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mmc0 = &sdhci;
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mmc1 = &sdmmc0;
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};
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chosen: chosen {
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stdout-path = "serial2:1500000n8";
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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#cooling-cells = <2>;
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pwms = <&pwm7 0 50000 0>;
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cooling-levels = <0 50 100 150 200 255>;
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rockchip,temp-trips = <
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50000 1
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55000 2
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60000 3
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65000 4
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70000 5
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>;
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};
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hdmi-con {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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leds: leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 =<&leds_gpio>;
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led@1 {
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gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
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label = "status_led";
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linux,default-trigger = "heartbeat";
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};
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};
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rk809-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "Analog RK809";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s1_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&rk809>;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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post-power-on-delay-ms = <200>;
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reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
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};
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sprd-mtty {
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compatible = "sprd,mtty";
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sprd,name = "ttyBT";
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};
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unisoc_uwe_bsp: uwe-bsp {
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compatible = "unisoc,uwe_bsp";
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wl-reg-on = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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bt-reg-on = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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wl-wake-host-gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
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bt-wake-host;
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bt-wake-host-gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
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sdio-ext-int-gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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unisoc,btwf-file-name = "/lib/firmware/wcnmodem.bin";
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blksz-512;
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keep-power-on;
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};
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/* labeled +12v in schematic */
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vcc12v_dcin: vcc12v-dcin-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc12v_dcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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/* labeled +5v in schematic */
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vcc_5v: vcc-5v-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vbus: vbus {
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compatible = "regulator-fixed";
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regulator-name = "vbus";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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/* labeled +3.3v For PCIe only in schematic */
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vcc3v3_pcie: vcc3v3-pcie-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_drv>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vbus>;
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};
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vcc5v0_sys: vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vbus>;
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};
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vcc5v0_usb: vcc5v0-usb {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vbus>;
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};
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vcc_sd: vcc-sd {
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compatible = "regulator-fixed";
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "vcc_sd";
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vin-supply = <&vcc3v3_sys>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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regulator-name = "vcc5v0_host";
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regulator-always-on;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_otg_en>;
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regulator-name = "vcc5v0_otg";
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regulator-always-on;
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};
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};
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&combphy1 {
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status = "okay";
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};
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&combphy2 {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu1 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu2 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu3 {
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cpu-supply = <&vdd_cpu>;
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};
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&gmac1 {
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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clock_in_out = "input";
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phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m0_miim
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&gmac1m0_tx_bus2
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&gmac1m0_rx_bus2
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&gmac1m0_rgmii_clk
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&gmac1m0_clkinout
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&gmac1m0_rgmii_bus>;
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snps,reset-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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//snps,reset-delays-us = <0 20000 100000>;
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snps,reset-delays-us = <0 50000 200000>;
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tx_delay = <0x30>;
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rx_delay = <0x10>;
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phy-handle = <&rgmii_phy0>;
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status = "okay";
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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avdd-0v9-supply = <&vdda0v9_image>;
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avdd-1v8-supply = <&vcca1v8_image>;
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status = "okay";
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};
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&hdmi_in {
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hdmi_in_vp0: endpoint {
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remote-endpoint = <&vp0_out_hdmi>;
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};
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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&hdmi_sound {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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vdd_cpu: syr837@40 {
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compatible = "silergy,syr827";
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reg = <0x40>;
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vin-supply = <&vcc5v0_sys>;
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regulator-compatible = "fan53555-reg";
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1390000>;
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regulator-init-microvolt = <900000>;
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regulator-initial-mode = <1>;
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regulator-ramp-delay = <2300>;
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fcs,suspend-voltage-selector = <1>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
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assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
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#clock-cells = <1>;
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clock-names = "mclk";
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clocks = <&cru I2S1_MCLKOUT_TX>;
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pinctrl-names = "default", "pmic-sleep",
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"pmic-power-off", "pmic-reset";
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pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
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pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
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pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
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pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
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#sound-dai-cells = <0>;
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rockchip,system-power-controller;
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wakeup-source;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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pinctrl_rk8xx: pinctrl_rk8xx {
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gpio-controller;
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#gpio-cells = <2>;
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rk817_slppin_null: rk817_slppin_null {
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pins = "gpio_slp";
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function = "pin_fun0";
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};
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rk817_slppin_slp: rk817_slppin_slp {
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pins = "gpio_slp";
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function = "pin_fun1";
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};
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rk817_slppin_pwrdn: rk817_slppin_pwrdn {
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pins = "gpio_slp";
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function = "pin_fun2";
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};
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rk817_slppin_rst: rk817_slppin_rst {
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pins = "gpio_slp";
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function = "pin_fun3";
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};
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};
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_logic";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_gpu";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-name = "vcc_ddr";
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vdd_npu: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_npu";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda0v9_image: LDO_REG1 {
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdda0v9_image";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda_0v9: LDO_REG2 {
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regulator-always-on;
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||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda_0v9";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v9_pmu: LDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda0v9_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_acodec: LDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-name = "vccio_acodec";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_1v8: LDO_REG7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca_1v8";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pmu: LDO_REG8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_image: LDO_REG9 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_image";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: DCDC_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: SWITCH_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sd: SWITCH_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc3v3_sd";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
codec {
|
||||
mic-in-differential;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* i2c3_m0 is exposed on the 40-pin (green connectors)
|
||||
* pin 27 - i2c3_sda_m0
|
||||
* pin 28 - i2c3_scl_m0
|
||||
*/
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s0_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s1_8ch {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s1m0_sclktx
|
||||
&i2s1m0_lrcktx
|
||||
&i2s1m0_sdi0
|
||||
&i2s1m0_sdo0>;
|
||||
rockchip,trcm-sync-tx-only;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rgmii_phy0: phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sd {
|
||||
sdmmc0_pwr_h: sdmmc0-pwr-h {
|
||||
rockchip,pins =
|
||||
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
mxc6655xa {
|
||||
mxc6655xa_irq_gpio: mxc6655xa_irq_gpio {
|
||||
rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int: pmic_int {
|
||||
rockchip,pins =
|
||||
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
soc_slppin_gpio: soc_slppin_gpio {
|
||||
rockchip,pins =
|
||||
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
|
||||
};
|
||||
|
||||
soc_slppin_slp: soc_slppin_slp {
|
||||
rockchip,pins =
|
||||
<0 RK_PA2 1 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
soc_slppin_rst: soc_slppin_rst {
|
||||
rockchip,pins =
|
||||
<0 RK_PA2 2 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
touch {
|
||||
touch_gpio: touch-gpio {
|
||||
rockchip,pins =
|
||||
<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
|
||||
<0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
vcc5v0_host_en: vcc5v0-host-en {
|
||||
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
vcc5v0_otg_en: vcc5v0-otg-en {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
work-led {
|
||||
leds_gpio: leds-gpio {
|
||||
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
headphone {
|
||||
hp_det: hp-det {
|
||||
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie {
|
||||
pcie_drv: pcie-drv {
|
||||
rockchip,pins =
|
||||
<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
edp {
|
||||
edp_hpd: edp-hpd {
|
||||
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
bl_en: bl-en {
|
||||
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_high>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
|
||||
* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
|
||||
* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
|
||||
* must be consistent with the software configuration correspondingly
|
||||
* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
|
||||
* should also be configured to 1.8V accordingly;
|
||||
* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
|
||||
* should also be configured to 3.3V accordingly;
|
||||
* 3/ VCCIO2 voltage control selection (0xFDC20140)
|
||||
* BIT[0]: 0x0: from GPIO_0A7 (default)
|
||||
* BIT[0]: 0x1: from GRF
|
||||
* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
|
||||
* L:VCCIO2 must supply 3.3V
|
||||
* H:VCCIO2 must supply 1.8V
|
||||
*/
|
||||
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
pmuio1-supply = <&vcc3v3_pmu>;
|
||||
pmuio2-supply = <&vcc3v3_pmu>;
|
||||
vccio1-supply = <&vcc_3v3>;
|
||||
vccio2-supply = <&vcc_1v8>;
|
||||
vccio3-supply = <&vccio_sd>;
|
||||
vccio4-supply = <&vcc_1v8>;
|
||||
vccio5-supply = <&vcc_3v3>;
|
||||
vccio6-supply = <&vcc_3v3>;
|
||||
vccio7-supply = <&vcc_3v3>;
|
||||
};
|
||||
|
||||
&pwm7 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcca_1v8>;
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
max-frequency = <150000000>;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
max-frequency = <150000000>;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sfc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
|
||||
uart-has-rtscts;
|
||||
};
|
||||
|
||||
/* (debug) uart2 has connectors near the usb-c power, but also on the 40-pin pins 6 (tx) and 8 (rx) - don't wire both */
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_host {
|
||||
phy-supply = <&vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_host {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_xhci {
|
||||
dr_mode = "host";
|
||||
extcon = <&usb2phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_xhci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop {
|
||||
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vp0 {
|
||||
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
remote-endpoint = <&hdmi_in_vp0>;
|
||||
};
|
||||
};
|
Loading…
Reference in New Issue