rk3308: tidy up kernel 6.6 patches

This commit is contained in:
Paolo Sabatino 2024-11-25 17:44:47 +01:00 committed by Paolo
parent 9e6ef2c3d5
commit 3f9f36bc23
17 changed files with 183 additions and 646 deletions

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@ -1,406 +0,0 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: brentr <brent@mbari.org>
Date: Fri, 23 Dec 2022 21:57:53 +0100
Subject: [ARCHEOLOGY] Rockpis devtree mainlined (#4603)
> X-Git-Archeology: > recovered message: > * moved rockpro64 patch out of rockpis patch sequence
> X-Git-Archeology: > recovered message: > It had been misnamed
> X-Git-Archeology: > recovered message: > * patch new mainline devtree for Rock Pi-S instead of overwritting it.
> X-Git-Archeology: > recovered message: > Also restores lost bluetooth compatibility items on UART4
> X-Git-Archeology: - Revision 588c2ec17e709dec19304fa50522459702ebfadd: https://github.com/armbian/build/commit/588c2ec17e709dec19304fa50522459702ebfadd
> X-Git-Archeology: Date: Fri, 23 Dec 2022 21:57:53 +0100
> X-Git-Archeology: From: brentr <brent@mbari.org>
> X-Git-Archeology: Subject: Rockpis devtree mainlined (#4603)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 34ae84fac5d0b66a1ab2d1e51534b7beb13ef245: https://github.com/armbian/build/commit/34ae84fac5d0b66a1ab2d1e51534b7beb13ef245
> X-Git-Archeology: Date: Fri, 05 May 2023 14:22:00 +0200
> X-Git-Archeology: From: amazingfate <liujianfeng1994@gmail.com>
> X-Git-Archeology: Subject: bump rockchip64 edge to v6.3
> X-Git-Archeology:
---
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 240 +++++++---
1 file changed, 164 insertions(+), 76 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index e9810d2f0407..0d917658d24a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -2,6 +2,7 @@
/*
* Copyright (c) 2019 Akash Gajjar <akash@openedev.com>
* Copyright (c) 2019 Jagan Teki <jagan@openedev.com>
+ * Revised: 2022 Brent Roman <brent@mbari.org>
*/
/dts-v1/;
@@ -11,12 +12,6 @@ / {
model = "Radxa ROCK Pi S";
compatible = "radxa,rockpis", "rockchip,rk3308";
- aliases {
- ethernet0 = &gmac;
- mmc0 = &emmc;
- mmc1 = &sdmmc;
- };
-
chosen {
stdout-path = "serial0:1500000n8";
};
@@ -27,48 +22,106 @@ leds {
pinctrl-0 = <&green_led>, <&heartbeat_led>;
green-led {
color = <LED_COLOR_ID_GREEN>;
- default-state = "on";
function = LED_FUNCTION_POWER;
- gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
label = "rockpis:green:power";
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
+ default-state = "on";
};
blue-led {
color = <LED_COLOR_ID_BLUE>;
- default-state = "on";
function = LED_FUNCTION_HEARTBEAT;
- gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
label = "rockpis:blue:user";
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
+ default-state = "on";
};
};
+ codec: acodec-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rk3308-acodec";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,codec-hp-det;
+ simple-audio-card,widgets =
+ "Headphone", "Headphones";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s_8ch_2>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&acodec>;
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "i2s_8ch_0";
+
+ simple-audio-card,dai-link@1 {
+ format = "i2s";
+ cpu {
+ sound-dai = <&i2s_8ch_0>;
+ };
+
+ codec {
+ sound-dai = <&pcm5102a>;
+ };
+ };
+ };
+
+ pcm5102a: pcm5102a {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5102a";
+ pcm510x,format = "i2s";
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-0 = <&wifi_enable_h>;
pinctrl-names = "default";
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
};
- vcc_1v8: vcc-1v8 {
+ vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
+ regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_io>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
};
- vcc_io: vcc-io {
+ vdd_core: vdd-core {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <827000>;
+ regulator-max-microvolt = <1340000>;
+ regulator-init-microvolt = <1015000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ pwm-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_log: vdd-log {
compatible = "regulator-fixed";
- regulator-name = "vcc_io";
+ regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
vin-supply = <&vcc5v0_sys>;
};
@@ -78,49 +131,50 @@ vcc_ddr: vcc-ddr {
vin-supply = <&vcc5v0_sys>;
};
- vcc5v0_otg: vcc5v0-otg {
+ vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&otg_vbus_drv>;
- regulator-name = "vcc5v0_otg";
+ regulator-name = "vcc_1v8";
regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_io>;
};
- vcc5v0_sys: vcc5v0-sys {
+ vcc_io: vcc-io {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
+ regulator-name = "vcc_io";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
};
- vdd_core: vdd-core {
- compatible = "pwm-regulator";
- pwms = <&pwm0 0 5000 1>;
- pwm-supply = <&vcc5v0_sys>;
- regulator-name = "vdd_core";
- regulator-min-microvolt = <827000>;
- regulator-max-microvolt = <1340000>;
- regulator-settling-time-up-us = <250>;
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
- vdd_log: vdd-log {
+ vcc5v0_otg: vcc5v0-otg {
compatible = "regulator-fixed";
- regulator-name = "vdd_log";
+ regulator-name = "vcc5v0_otg";
regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_drv>;
vin-supply = <&vcc5v0_sys>;
};
};
+&acodec {
+ status = "okay";
+ #sound-dai-cells = <0>;
+};
+
&cpu0 {
cpu-supply = <&vdd_core>;
};
@@ -138,21 +138,59 @@
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
- vmmc-supply = <&vcc_io>;
status = "okay";
};
+&sdmmc {
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
+ card-detect-delay = <800>;
+ status = "okay";
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ no-mmc;
+ status = "okay";
+
+ rtl8723ds: wifi@1 {
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake>;
+ };
+};
+
&gmac {
+ phy-supply = <&vcc_phy>;
clock_in_out = "output";
- phy-supply = <&vcc_io>;
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&cru SCLK_MAC_SRC>;
snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
status = "okay";
};
-&i2c1 {
+&i2s_8ch_0 {
+ assigned-clocks = <&cru SCLK_I2S0_8CH_RX>;
+ assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_MUX>;
+ rockchip,clk-trcm = <1>;
+ #sound-dai-cells = <0>;
+};
+
+&i2s_8ch_2 {
status = "okay";
+ #sound-dai-cells = <0>;
};
&pinctrl {
@@ -171,7 +262,9 @@ sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
+ };
+ wifi {
wifi_host_wake: wifi-host-wake {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
};
@@ -188,42 +281,29 @@ &saradc {
status = "okay";
};
-&sdio {
- #address-cells = <1>;
- #size-cells = <0>;
- cap-sd-highspeed;
- cap-sdio-irq;
- keep-power-in-suspend;
- max-frequency = <1000000>;
- mmc-pwrseq = <&sdio_pwrseq>;
- non-removable;
- sd-uhs-sdr104;
+&tsadc {
+ rockchip,hw-tshut-mode = <0>; /* 0:CRU */
+ rockchip,hw-tshut-polarity = <1>; /* 1:HIGH */
status = "okay";
};
-&sdmmc {
- cap-sd-highspeed;
+&i2c1 {
status = "okay";
};
-&u2phy {
- status = "okay";
-
- u2phy_host: host-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
-
- u2phy_otg: otg-port {
- phy-supply = <&vcc5v0_otg>;
- status = "okay";
- };
+&spi2 {
+// status = "okay"; //conflicts with UART2
+ max-freq = <10000000>;
};
&uart0 {
status = "okay";
};
+&uart2 {
+ status = "okay";
+};
+
&uart4 {
status = "okay";
@@ -234,19 +314,27 @@ bluetooth {
};
};
-&usb_host_ehci {
+&u2phy {
status = "okay";
+
+ u2phy_host: host-port {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ status = "okay";
+ };
};
-&usb_host_ohci {
+&usb20_otg {
status = "okay";
};
-&usb20_otg {
- dr_mode = "peripheral";
+&usb_host_ehci {
status = "okay";
};
-&wdt {
+&usb_host_ohci{
status = "okay";
};
--
Armbian

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@ -1,41 +0,0 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Fri, 17 Jan 2020 17:12:51 +0100
Subject: arm64: dts: rk3308: Add rk-timer-rtc
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 11 +++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 1567758ca90e..291f011800b2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -540,6 +540,15 @@ rktimer: rktimer@ff1a0000 {
clock-names = "pclk", "timer";
};
+ rk_timer_rtc: rk-timer-rtc@ff1a0020 {
+ compatible = "rockchip,rk3308-timer-rtc";
+ reg = <0x0 0xff1a0020 0x0 0x20>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER1>;
+ clock-names = "pclk", "timer";
+ status = "disabled";
+ };
+
saradc: saradc@ff1e0000 {
compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
reg = <0x0 0xff1e0000 0x0 0x100>;
@@ -740,7 +749,7 @@ i2s_8ch_3: i2s@ff330000 {
rockchip,mclk-calibrate;
status = "disabled";
};
-
+
i2s_2ch_0: i2s@ff350000 {
compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff350000 0x0 0x1000>;
--
Armbian

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@ -1,50 +0,0 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: ashthespy <ashthespy@gmail.com>
Date: Mon, 3 Feb 2020 17:19:33 +0100
Subject: arm64: dts: rockchip: Add acodec node for rk3308
Change-Id: I76f4a877711d33620bdef295e9047bdba26d4da4
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 18 +++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 291f011800b2..dd221ee88722 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -548,7 +548,7 @@ rk_timer_rtc: rk-timer-rtc@ff1a0020 {
clock-names = "pclk", "timer";
status = "disabled";
};
-
+
saradc: saradc@ff1e0000 {
compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
reg = <0x0 0xff1e0000 0x0 0x100>;
@@ -933,6 +933,22 @@ cru: clock-controller@ff500000 {
assigned-clock-rates = <32768>;
};
+ acodec: acodec@ff560000 {
+ compatible = "rockchip,rk3308-codec";
+ reg = <0x0 0xff560000 0x0 0x10000>;
+ rockchip,grf = <&grf>;
+ rockchip,detect-grf = <&detect_grf>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_ACODEC>,
+ <&cru SCLK_I2S2_8CH_TX_OUT>,
+ <&cru SCLK_I2S2_8CH_RX_OUT>;
+ clock-names = "acodec", "mclk_tx", "mclk_rx";
+ resets = <&cru SRST_ACODEC_P>;
+ reset-names = "acodec-reset";
+ status = "disabled";
+};
+
gic: interrupt-controller@ff580000 {
compatible = "arm,gic-400";
reg = <0x0 0xff581000 0x0 0x1000>,
--
Armbian

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@ -1,99 +0,0 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
Date: Wed, 8 Sep 2021 17:51:34 +0200
Subject: [ARCHEOLOGY] Bumping EDGE kernel to 5.14.y (#3125)
> X-Git-Archeology: > recovered message: > * Bumping EDGE kernel to 5.14.y
> X-Git-Archeology: > recovered message: > Meson64:
> X-Git-Archeology: > recovered message: > - removing Odroid reboot shutdown patch since its probably not needed anymore
> X-Git-Archeology: > recovered message: > Rockchip64:
> X-Git-Archeology: > recovered message: > - removing Rockpi S. No interest to maintain this any further
> X-Git-Archeology: > recovered message: > - removing PBP suspend. Doesn't align. Need inspection if some other way was mainstreamed
> X-Git-Archeology: > recovered message: > - temporally removing Orangepi R1
> X-Git-Archeology: > recovered message: > * Re-adding rockpis, pbp suspend, HFLPS170 wifi and cleanup
> X-Git-Archeology: > recovered message: > * Removing deprecated patch, fixing ap6256 wifi
> X-Git-Archeology: > recovered message: > * Re-enable Opi R1 plus, untest
> X-Git-Archeology: > recovered message: > * Add and fix Radxa Zero
> X-Git-Archeology: - Revision 744ea89a589d62cb6f409baab60fc6664520bc39: https://github.com/armbian/build/commit/744ea89a589d62cb6f409baab60fc6664520bc39
> X-Git-Archeology: Date: Wed, 08 Sep 2021 17:51:34 +0200
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology: Subject: Bumping EDGE kernel to 5.14.y (#3125)
> X-Git-Archeology:
> X-Git-Archeology: - Revision dd51f9f2afcbc83a3e10b32eb6a5061d91d1558e: https://github.com/armbian/build/commit/dd51f9f2afcbc83a3e10b32eb6a5061d91d1558e
> X-Git-Archeology: Date: Tue, 09 Nov 2021 18:06:34 +0100
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology: Subject: Bump imx6, xu4, rockchip64 and jetson-nano to 5.15 (#3238)
> X-Git-Archeology:
> X-Git-Archeology: - Revision ac8fc4385594d59257ee9dffd9efa85e3497fa7d: https://github.com/armbian/build/commit/ac8fc4385594d59257ee9dffd9efa85e3497fa7d
> X-Git-Archeology: Date: Sat, 26 Feb 2022 07:46:44 +0100
> X-Git-Archeology: From: Piotr Szczepanik <piter75@gmail.com>
> X-Git-Archeology: Subject: Switch rockchip64 current to linux 5.15.y (#3489)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 897674aa74bce0326ed7fe06f5336bf4709a8a1f: https://github.com/armbian/build/commit/897674aa74bce0326ed7fe06f5336bf4709a8a1f
> X-Git-Archeology: Date: Tue, 03 May 2022 08:27:32 +0200
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology: Subject: Bump and freeze kernel at last known working versions (#3736)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 597d2dac11f00d9070a4e49d6bad1b2244e36cb3: https://github.com/armbian/build/commit/597d2dac11f00d9070a4e49d6bad1b2244e36cb3
> X-Git-Archeology: Date: Sat, 28 May 2022 07:56:22 +0200
> X-Git-Archeology: From: Jianfeng Liu <liujianfeng1994@gmail.com>
> X-Git-Archeology: Subject: update rockchip64-edge to 5.18 (#3814)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 8c6641e7b79f0d50acdc306d140e586a4e923cf0: https://github.com/armbian/build/commit/8c6641e7b79f0d50acdc306d140e586a4e923cf0
> X-Git-Archeology: Date: Wed, 03 Aug 2022 22:22:55 +0200
> X-Git-Archeology: From: Jianfeng Liu <liujianfeng1994@gmail.com>
> X-Git-Archeology: Subject: update rockchip64 edge to 5.19 (#4039)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 6765f734cc4a22aeaa9f99a3ad28c8c322de26f6: https://github.com/armbian/build/commit/6765f734cc4a22aeaa9f99a3ad28c8c322de26f6
> X-Git-Archeology: Date: Tue, 25 Oct 2022 11:26:51 +0200
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology: Subject: Bump rockchip64 edge to 6.0.y (#4337)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 92f1a22d76b987afa7ba555d5b509adc51d689e7: https://github.com/armbian/build/commit/92f1a22d76b987afa7ba555d5b509adc51d689e7
> X-Git-Archeology: Date: Fri, 16 Dec 2022 13:38:13 +0100
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology: Subject: Re-add rockchip64 6.0 patches (#4575)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 34ae84fac5d0b66a1ab2d1e51534b7beb13ef245: https://github.com/armbian/build/commit/34ae84fac5d0b66a1ab2d1e51534b7beb13ef245
> X-Git-Archeology: Date: Fri, 05 May 2023 14:22:00 +0200
> X-Git-Archeology: From: amazingfate <liujianfeng1994@gmail.com>
> X-Git-Archeology: Subject: bump rockchip64 edge to v6.3
> X-Git-Archeology:
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 20 ++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 5f48dcee7548..c5fe355c6deb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -179,6 +179,26 @@ psci {
method = "smc";
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ drm_logo: drm-logo@00000000 {
+ compatible = "rockchip,drm-logo";
+ reg = <0x0 0x0 0x0 0x0>;
+ };
+
+ ramoops: ramoops@110000 {
+ compatible = "ramoops";
+ reg = <0x0 0x110000 0x0 0xf0000>;
+ record-size = <0x30000>;
+ console-size = <0xc0000>;
+ ftrace-size = <0x00000>;
+ pmsg-size = <0x00000>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
--
Armbian

View File

@ -1,24 +0,0 @@
From 395bc247144869b1a78c40872d38049f56ebfaf9 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Thu, 7 Nov 2024 18:37:34 +0100
Subject: [PATCH] rockpi-s emmc support hs200 mode, enable it
---
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 5ca0cc19f92c..d189eceb6fb2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -139,6 +139,7 @@ &emmc {
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
+ mmc-hs200-1_8v;
vmmc-supply = <&vcc_io>;
status = "okay";
};
--
2.43.0

View File

@ -0,0 +1,106 @@
From b159c55f7d9f81f3c7aa5ae041c1d0ec61281af4 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Mon, 25 Nov 2024 17:02:05 +0100
Subject: [PATCH] rk3308: various fixes and enhancements for rockpi-s
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 51 +++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 5ca0cc19f92c..817684e54617 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -48,6 +48,30 @@ blue-led {
};
};
+ pcm5102_sound: pcm5102-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "lineout";
+
+ simple-audio-card,dai-link@1 {
+ format = "i2s";
+ cpu {
+ sound-dai = <&i2s_8ch_0>;
+ };
+
+ codec {
+ sound-dai = <&pcm5102a>;
+ };
+ };
+ };
+
+ pcm5102a: pcm5102a {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5102a";
+ pcm510x,format = "i2s";
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-0 = <&wifi_enable_h>;
@@ -128,6 +152,11 @@ vdd_log: vdd-log {
};
};
+&acodec {
+ status = "okay";
+ #sound-dai-cells = <0>;
+};
+
&cpu0 {
cpu-supply = <&vdd_core>;
};
@@ -139,6 +168,7 @@ &emmc {
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
+ mmc-hs200-1_8v;
vmmc-supply = <&vcc_io>;
status = "okay";
};
@@ -170,6 +200,19 @@ &i2c1 {
status = "okay";
};
+&i2s_8ch_0 {
+ #sound-dai-cells = <0>;
+ assigned-clocks = <&cru SCLK_I2S0_8CH_RX>;
+ assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_MUX>;
+ rockchip,clk-trcm = <1>;
+ status = "okay";
+};
+
+&i2s_8ch_2 {
+ #sound-dai-cells = <0>;
+ status = "disabled";
+};
+
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&rtc_32k>;
@@ -261,10 +304,18 @@ &sdmmc {
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
+ card-detect-delay = <800>;
vmmc-supply = <&vcc_io>;
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <0>; /* 0:CRU */
+ rockchip,hw-tshut-polarity = <1>; /* 1:HIGH */
+ status = "okay";
+};
+
&u2phy {
status = "okay";
--
2.43.0

View File

@ -33,32 +33,6 @@ Subject: [ARCHEOLOGY] Restored Hardware Random Number Generator from legacy
drivers/char/hw_random/rockchip-rng.c | 330 ++++++++++
4 files changed, 359 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index c5fe355c6deb..3eaef6941a8f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -655,6 +655,21 @@ logic_thermal: logic-thermal {
};
};
+ rng: rng@ff2f0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x0 0xff2f0000 0x0 0x4000>;
+ clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+ <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+ clock-names = "clk_crypto", "clk_crypto_apk",
+ "aclk_crypto", "hclk_crypto";
+ assigned-clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+ <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+ assigned-clock-rates = <150000000>, <150000000>,
+ <200000000>, <100000000>;
+ resets = <&cru SRST_CRYPTO>;
+ reset-names = "reset";
+ };
+
tsadc: tsadc@ff1f0000 {
compatible = "rockchip,rk3308-tsadc";
reg = <0x0 0xff1f0000 0x0 0x100>;
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 8de74dcfa18c..89000c996d77 100644
--- a/drivers/char/hw_random/Kconfig

View File

@ -0,0 +1,39 @@
From f4c497b95f487598a921b9f08cfc691b12847bb0 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Mon, 25 Nov 2024 17:17:21 +0100
Subject: [PATCH] rk3308: add analog codec dts node
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 8ac4476ef76d..178dce126421 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -569,6 +569,22 @@ rktimer: rktimer@ff1a0000 {
clock-names = "pclk", "timer";
};
+ acodec: acodec@ff560000 {
+ compatible = "rockchip,rk3308-codec";
+ reg = <0x0 0xff560000 0x0 0x10000>;
+ rockchip,grf = <&grf>;
+ rockchip,detect-grf = <&detect_grf>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_ACODEC>,
+ <&cru SCLK_I2S2_8CH_TX_OUT>,
+ <&cru SCLK_I2S2_8CH_RX_OUT>;
+ clock-names = "acodec", "mclk_tx", "mclk_rx";
+ resets = <&cru SRST_ACODEC_P>;
+ reset-names = "acodec-reset";
+ status = "disabled";
+ };
+
saradc: saradc@ff1e0000 {
compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
reg = <0x0 0xff1e0000 0x0 0x100>;
--
2.43.0

View File

@ -0,0 +1,38 @@
From aae322ad410b6ad891c1b6605811756124c3b1f9 Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Mon, 25 Nov 2024 17:23:22 +0100
Subject: [PATCH] rk3308: add cryptov2 dts node
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 2ae4bb7d5e62..7c13709c522c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -164,6 +164,21 @@ xin24m: xin24m {
clock-output-names = "xin24m";
};
+ rng: rng@ff2f0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x0 0xff2f0000 0x0 0x4000>;
+ clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+ <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+ clock-names = "clk_crypto", "clk_crypto_apk",
+ "aclk_crypto", "hclk_crypto";
+ assigned-clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
+ <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
+ assigned-clock-rates = <150000000>, <150000000>,
+ <200000000>, <100000000>;
+ resets = <&cru SRST_CRYPTO>;
+ reset-names = "reset";
+ };
+
grf: grf@ff000000 {
compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
reg = <0x0 0xff000000 0x0 0x08000>;
--
2.43.0