mirror of https://github.com/armbian/build.git
add board `bigtreetech-cb2`: BigTreeTech CB2
This commit is contained in:
JohnTheCoolingFan
JohnTheCoolingFan
parent
523be17a78
commit
3a7ba30f3f
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@ -0,0 +1,48 @@
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# Rockchip RK3566 quad core 2GB-8GB GBE eMMC NVMe USB3 WiFi
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BOARD_NAME="BigTreeTech CB2"
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BOARDFAMILY="rockchip64"
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BOARD_MAINTAINER=""
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BOOTCONFIG="bigtreetech-cb2-rk3566_defconfig"
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BOOT_SOC="rk3566"
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KERNEL_TARGET="current,edge"
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KERNEL_TEST_TARGET="current"
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BOOT_FDT_FILE="rockchip/rk3566-bigtreetech-cb2.dtb"
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IMAGE_PARTITION_TABLE="gpt"
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BOOT_SCENARIO="spl-blobs"
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OVERLAY_PREFIX='rk3566'
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FULL_DESKTOP="yes"
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BOOT_LOGO="desktop"
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# TODO: replace with BOOT_SCENARIO=binman when it gets merged and in good shape
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function post_family_config__bigtreetech-cb2_uboot_overrides() {
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display_alert "$BOARD" "mainline u-boot overrides" "info"
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DDR_BLOB="rk35/rk3566_ddr_1056MHz_v1.21.bin"
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BL31_BLOB="rk35/rk3568_bl31_v1.44.elf" # NOT a typo, bl31 is shared across 68 and 66
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declare -g BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc
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declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git"
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declare -g BOOTBRANCH="tag:v2024.10"
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declare -g BOOTPATCHDIR="v2024.10/board_bigtreetech-cb2"
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#declare -g BOOTDIR="u-boot-${BOARD}"
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declare -g UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin"
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unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # disable stuff from rockchip64_common; we're using binman here which does all the work already
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# Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go
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function write_uboot_platform() {
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dd "if=${1}/u-boot-rockchip.bin" "of=${2}" bs=32k seek=1 conv=notrunc
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}
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function write_uboot_platform_mtd() {
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declare -a extra_opts_flashcp=("--verbose")
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if flashcp -h | grep -q -e '--partition'; then
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echo "Confirmed flashcp supports --partition -- read and write only changed blocks." >&2
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extra_opts_flashcp+=("--partition")
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else
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echo "flashcp does not support --partition, will write full SPI flash blocks." >&2
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fi
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flashcp "${extra_opts_flashcp[@]}" "${1}/u-boot-rockchip-spi.bin" /dev/mtd0
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}
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}
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# vim: ft=bash
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,645 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: JohnTheCoolingFan <ivan8215145640@gmail.com>
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Date: Mon, 18 Nov 2024 03:35:50 +0000
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Subject: Add BigTreeTech CB2 defconfig and device tree
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Signed-off-by: JohnTheCoolingFan <ivan8215145640@gmail.com>
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---
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arch/arm/dts/rk3566-bigtreetech-cb2-u-boot.dtsi | 3 +
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arch/arm/dts/rk3566-bigtreetech-cb2.dts | 494 ++++++++++
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configs/bigtreetech-cb2-rk3566_defconfig | 115 +++
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3 files changed, 612 insertions(+)
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diff --git a/arch/arm/dts/rk3566-bigtreetech-cb2-u-boot.dtsi b/arch/arm/dts/rk3566-bigtreetech-cb2-u-boot.dtsi
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new file mode 100644
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index 00000000000..2e2341667f6
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--- /dev/null
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+++ b/arch/arm/dts/rk3566-bigtreetech-cb2-u-boot.dtsi
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@@ -0,0 +1,3 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+
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+#include "rk356x-u-boot.dtsi"
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diff --git a/arch/arm/dts/rk3566-bigtreetech-cb2.dts b/arch/arm/dts/rk3566-bigtreetech-cb2.dts
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new file mode 100644
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index 00000000000..6bcf5b26f49
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--- /dev/null
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+++ b/arch/arm/dts/rk3566-bigtreetech-cb2.dts
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@@ -0,0 +1,494 @@
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+/*
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+ * SPDX-License-Identifier: GPL-2.0+
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+ *
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+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
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+ */
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+
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+/dts-v1/;
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+#include "rk356x.dtsi"
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+#include "rk3566-bigtreetech-cb2-u-boot.dtsi"
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+
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+/ {
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+ model = "BigTreeTech CB2";
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+ compatible = "rockchip,rk3566";
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+
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+ aliases {
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+ mmc0 = &sdhci;
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+ mmc1 = &sdmmc0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ dc_12v: dc-12v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "dc_12v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <12000000>;
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+ regulator-max-microvolt = <12000000>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&dc_12v>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ regulator-name = "vcc5v0_host";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ led_sys: led-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "led_sys";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; // Turn on blue led
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+ regulator-boot-on;
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+ regulator-always-on;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ adc-keys {
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+ compatible = "adc-keys";
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+ io-channels = <&saradc 0>;
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+ io-channel-names = "buttons";
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+ keyup-threshold-microvolt = <1800000>;
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+ status = "okay";
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+
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+ volumeup-key {
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+ linux,code = <KEY_VOLUMEUP>;
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+ label = "volume up";
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+ press-threshold-microvolt = <9>;
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+ };
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+ };
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+};
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+
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+&sdhci {
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ mmc-hs200-1_8v;
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+ no-sd;
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+ no-sdio;
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+ non-removable;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
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+ status = "okay";
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+};
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+
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+&sdmmc0 {
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+ bus-width = <4>;
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+ cap-sd-highspeed;
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+ disable-wp;
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+ no-mmc;
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+ no-sdio;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
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+ status = "okay";
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+};
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+
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+&sfc {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <24000000>;
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+ };
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+};
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+
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+/*
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+&crypto {
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+ status = "okay";
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+};
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+*/
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+
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+&uart2 {
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+ status = "okay";
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+};
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+
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+&pmu_io_domains {
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+ status = "okay";
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+ pmuio1-supply = <&vcc3v3_pmu>;
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+ pmuio2-supply = <&vcc3v3_pmu>;
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+ vccio1-supply = <&vccio_acodec>;
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+ vccio3-supply = <&vccio_sd>;
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+ vccio4-supply = <&vcc_1v8>;
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+ vccio5-supply = <&vcc_3v3>;
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+ vccio6-supply = <&vcc_1v8>;
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+ vccio7-supply = <&vcc_3v3>;
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+};
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+
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+&gpio0 {
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+};
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+
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+&gpio3 {
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+ clock-frequency = <100000>;
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+
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+ vdd_cpu: tcs4525@1c {
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+ compatible = "tcs,tcs452x";
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+ reg = <0x1c>;
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+ vin-supply = <&vcc5v0_sys>;
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+ regulator-compatible = "fan53555-reg";
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+ regulator-name = "vdd_cpu";
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1390000>;
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+ regulator-init-microvolt = <900000>;
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+ regulator-ramp-delay = <2300>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ rk809: pmic@20 {
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+ status = "okay";
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+ compatible = "rockchip,rk809";
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+ reg = <0x20>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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+
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+ pinctrl-names = "default", "pmic-sleep",
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+ "pmic-power-off", "pmic-reset";
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+ pinctrl-0 = <&pmic_int>;
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+ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
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+ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
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+ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
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+
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+ #clock-cells = <1>;
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+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
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+ //fb-inner-reg-idxs = <2>;
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+ /* 1: rst regs (default in codes), 0: rst the pmic */
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+ pmic-reset-func = <0>;
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+ /* not save the PMIC_POWER_EN register in uboot */
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+ not-save-power-en = <1>;
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+
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc5-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+
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+ pwrkey {
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+ status = "okay";
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+ };
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+
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+ pinctrl_rk8xx: pinctrl_rk8xx {
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ rk817_slppin_null: rk817_slppin_null {
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+ pins = "gpio_slp";
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+ function = "pin_fun0";
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+ };
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+
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+ rk817_slppin_slp: rk817_slppin_slp {
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+ pins = "gpio_slp";
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+ function = "pin_fun1";
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+ };
|
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+
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+ rk817_slppin_pwrdn: rk817_slppin_pwrdn {
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+ pins = "gpio_slp";
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+ function = "pin_fun2";
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+ };
|
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+
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+ rk817_slppin_rst: rk817_slppin_rst {
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+ pins = "gpio_slp";
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+ function = "pin_fun3";
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+ };
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+ };
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <500000>;
|
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+ regulator-max-microvolt = <1350000>;
|
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+ regulator-init-microvolt = <900000>;
|
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+ regulator-ramp-delay = <6001>;
|
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+ regulator-initial-mode = <0x2>;
|
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+ regulator-name = "vdd_logic";
|
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+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
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+ vdd_gpu: DCDC_REG2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-name = "vdd_gpu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_npu: DCDC_REG4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-init-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-name = "vdd_npu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_image: LDO_REG1 {
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdda0v9_image";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v9: LDO_REG2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdda_0v9";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_pmu: LDO_REG3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-name = "vdda0v9_pmu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_acodec: LDO_REG4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vccio_acodec";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: LDO_REG5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pmu: LDO_REG6 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc3v3_pmu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: LDO_REG7 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pmu: LDO_REG8 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca1v8_pmu";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_image: LDO_REG9 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: DCDC_REG5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: SWITCH_REG1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sd: SWITCH_REG2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vcc3v3_sd";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_host {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_otg {
|
||||
+ phy-supply = <&vcc5v0_host>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy1_grf {
|
||||
+};
|
||||
+
|
||||
+
|
||||
+&pinctrl {
|
||||
+
|
||||
+ pcfg_output_low_pull_down: pcfg_output_low_pull_down {
|
||||
+ bias-pull-down;
|
||||
+ output-low;
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int: pmic_int {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ soc_slppin_gpio: soc_slppin_gpio {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
|
||||
+ };
|
||||
+
|
||||
+ soc_slppin_slp: soc_slppin_slp {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PA2 RK_FUNC_1 &pcfg_pull_up>;
|
||||
+ };
|
||||
+
|
||||
+ soc_slppin_rst: soc_slppin_rst {
|
||||
+ rockchip,pins =
|
||||
+ <0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ vcc5v0_host_en: vcc5v0-host-en {
|
||||
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/configs/bigtreetech-cb2-rk3566_defconfig b/configs/bigtreetech-cb2-rk3566_defconfig
|
||||
new file mode 100644
|
||||
index 00000000000..3c7c294545a
|
||||
--- /dev/null
|
||||
+++ b/configs/bigtreetech-cb2-rk3566_defconfig
|
||||
@@ -0,0 +1,115 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_ROCKCHIP=y
|
||||
+CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
+CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3566-bigtreetech-cb2"
|
||||
+CONFIG_ROCKCHIP_RK3568=y
|
||||
+CONFIG_SPL_SERIAL=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xFE660000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
+CONFIG_SPL_SPI=y
|
||||
+CONFIG_SYS_LOAD_ADDR=0xc00800
|
||||
+CONFIG_PCI=y
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_FIT=y
|
||||
+CONFIG_FIT_VERBOSE=y
|
||||
+CONFIG_SPL_FIT_SIGNATURE=y
|
||||
+CONFIG_SPL_LOAD_FIT=y
|
||||
+CONFIG_LEGACY_IMAGE_FORMAT=y
|
||||
+CONFIG_BOOTDELAY=0
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
+CONFIG_SPL_MAX_SIZE=0x40000
|
||||
+CONFIG_SPL_PAD_TO=0x7f8000
|
||||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
+CONFIG_SPL_MMC_WRITE=y
|
||||
+CONFIG_SPL_DM_RESET=y
|
||||
+CONFIG_SPL_SPI_LOAD=y
|
||||
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
|
||||
+CONFIG_SPL_ATF=y
|
||||
+CONFIG_SYS_PROMPT="CB2@uboot:~$ "
|
||||
+CONFIG_CMD_BOOTZ=y
|
||||
+# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
|
||||
+# CONFIG_CMD_ELF is not set
|
||||
+# CONFIG_CMD_IMI is not set
|
||||
+# CONFIG_CMD_XIMG is not set
|
||||
+# CONFIG_CMD_LZMADEC is not set
|
||||
+# CONFIG_CMD_UNZIP is not set
|
||||
+CONFIG_CMD_GPT=y
|
||||
+# CONFIG_CMD_LOADB is not set
|
||||
+# CONFIG_CMD_LOADS is not set
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_MTD=y
|
||||
+CONFIG_CMD_PCI=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_ITEST is not set
|
||||
+CONFIG_CMD_TFTPPUT=y
|
||||
+# CONFIG_NET_TFTP_VARS is not set
|
||||
+# CONFIG_SPL_DOS_PARTITION is not set
|
||||
+# CONFIG_ISO_PARTITION is not set
|
||||
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
|
||||
+CONFIG_SPL_OF_CONTROL=y
|
||||
+CONFIG_OF_LIVE=y
|
||||
+# CONFIG_OF_UPSTREAM is not set
|
||||
+CONFIG_OF_SPL_REMOVE_PROPS=""
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
+CONFIG_SPL_REGMAP=y
|
||||
+CONFIG_SPL_SYSCON=y
|
||||
+CONFIG_SPL_CLK=y
|
||||
+CONFIG_FASTBOOT_BUF_ADDR=0xc00800
|
||||
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
|
||||
+CONFIG_ROCKCHIP_GPIO=y
|
||||
+CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_LED=y
|
||||
+CONFIG_LED_GPIO=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_MMC_DW=y
|
||||
+CONFIG_MMC_DW_ROCKCHIP=y
|
||||
+CONFIG_MMC_SDHCI=y
|
||||
+CONFIG_MMC_SDHCI_SDMA=y
|
||||
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
+CONFIG_SPI_FLASH_EON=y
|
||||
+CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
+CONFIG_SPI_FLASH_MACRONIX=y
|
||||
+CONFIG_SPI_FLASH_WINBOND=y
|
||||
+CONFIG_SPI_FLASH_XMC=y
|
||||
+CONFIG_SPI_FLASH_MTD=y
|
||||
+CONFIG_PHY_MOTORCOMM=y
|
||||
+CONFIG_DM_ETH_PHY=y
|
||||
+CONFIG_PHY_GIGE=y
|
||||
+CONFIG_DWC_ETH_QOS=y
|
||||
+CONFIG_NVME=y
|
||||
+CONFIG_DM_PCI_COMPAT=y
|
||||
+CONFIG_PCIE_DW_ROCKCHIP=y
|
||||
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
+CONFIG_SPL_PINCTRL=y
|
||||
+CONFIG_DM_PMIC=y
|
||||
+CONFIG_PMIC_RK8XX=y
|
||||
+CONFIG_SPL_PMIC_RK8XX=y
|
||||
+CONFIG_REGULATOR_RK8XX=y
|
||||
+CONFIG_SPL_RAM=y
|
||||
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||||
+CONFIG_BAUDRATE=1500000
|
||||
+CONFIG_DEBUG_UART_SHIFT=2
|
||||
+CONFIG_SYS_NS16550_MEM32=y
|
||||
+CONFIG_ROCKCHIP_SFC=y
|
||||
+CONFIG_SYSRESET=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_XHCI_PCI=y
|
||||
+CONFIG_USB_EHCI_HCD=y
|
||||
+CONFIG_USB_EHCI_GENERIC=y
|
||||
+CONFIG_USB_OHCI_HCD=y
|
||||
+CONFIG_USB_OHCI_GENERIC=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+CONFIG_USB_DWC3_GENERIC=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_SHA512=y
|
||||
+CONFIG_SPL_GZIP=y
|
||||
+CONFIG_ERRNO_STR=y
|
||||
--
|
||||
Created with Armbian build tools https://github.com/armbian/build
|
||||
|
||||
Loading…
Reference in New Issue