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Mekotronics R58HD - add initial support

This commit is contained in:
Igor Pecovnik 2025-08-12 22:11:24 +02:00 committed by Igor
parent 4db2f1abd2
commit 28230cbe29
9 changed files with 6248 additions and 0 deletions
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13
config/boards/mekotronics-r58hd.conf Normal file
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@ -0,0 +1,13 @@
# Rockchip RK3588 SoC octa core 4-16GB SoC 2x1GBe eMMC USB3 NVMe SATA WiFi/BT HDMI DP HDMI-In RS232 RS485
declare -g BOARD_NAME="Mekotronics R58HD"
declare -g BOARDFAMILY="rockchip-rk3588"
declare -g BOARD_MAINTAINER="150balbes"
declare -g KERNEL_TARGET="vendor"
declare -g BOOTCONFIG="mekotronics_r58hd-rk3588_defconfig" # vendor u-boot; with NVMe and a DTS
declare -g BOOT_FDT_FILE="rockchip/rk3588-blueberry-r58-hd3-linux.dtb" # Specific to this board
declare -g UEFI_EDK2_BOARD_ID="r58HD" # This _only_ used for uefi-edk2-rk3588 extension
declare -g DISPLAY_MANAGER="wayland"
declare -g ASOUND_STATE="asound.state.rk3588hd"
# Source vendor-specific configuration
source "${SRC}/config/sources/vendors/mekotronics/mekotronics-rk3588.conf.sh"

3
config/sources/vendors/mekotronics/mekotronics-rk3588.conf.sh vendored
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@ -11,6 +11,9 @@ display_alert "shared vendor code" "Mekotronics (RK3588) config" "info"
# enable shared hooks (could be made into an extension)
source "${SRC}/config/sources/vendors/mekotronics/mekotronics-rk3588.hooks.sh"
# enable audio (could be made into an extension)
enable_extension "audio-init"
# hciattach
declare -g BLUETOOTH_HCIATTACH_PARAMS="-s 115200 /dev/ttyS6 bcm43xx 1500000" # For the bluetooth-hciattach extension
enable_extension "bluetooth-hciattach" # Enable the bluetooth-hciattach extension

81
extensions/audio-init.sh Normal file
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@ -0,0 +1,81 @@
#!/bin/bash
#
# SPDX-License-Identifier: GPL-2.0
# Copyright (c) 2023 Ricardo Pardini <ricardo@pardini.net>
# This file is a part of the Armbian Build Framework https://github.com/armbian/build/
#
# Some boards needs special audio initialization
# To use, enable_extension audio-init, and set AUDIO_INIT_SCRIPT_CONTENT
function extension_prepare_config__audio_init() {
display_alert "Extension: ${EXTENSION}: ${BOARD}" "initializing config" "info"
}
# Add necessary audio packages to the image
function post_family_config__audio_init_add_audio_packages() {
display_alert "Extension: ${EXTENSION}: ${BOARD}" "adding audio packages to image" "info"
# Install essential audio packages instead of non-existent "audio" package
add_packages_to_image alsa-utils pulseaudio bluez bluez-tools
}
# Deploy the script and the systemd service in the BSP
function post_family_tweaks_bsp__audio_init_add_systemd_service() {
display_alert "Extension: ${EXTENSION}: ${BOARD}" "adding audio init service to BSP" "info"
: "${destination:?destination is not set}"
declare script_dir="/usr/local/sbin"
run_host_command_logged mkdir -pv "${destination}${script_dir}"
declare script_path="${script_dir}/audio-init.sh"
# Create audio initialization script with custom content
cat <<- AUDIO_INIT_SCRIPT > "${destination}${script_path}"
#!/bin/bash
# Wait for audio devices to initialize
sleep 2
# Set ALSA controls
amixer -c rockchipes8388 set 'OUT1 Switch' on || true
amixer -c rockchipes8388 set 'OUT2 Switch' on || true
amixer -c rockchipes8388 set 'Speaker Switch' on || true
amixer -c rockchipes8388 set 'PCM Volume' 255,255 || true
# Restore ALSA state if available
if [ -f /var/lib/alsa/asound.state ]; then
alsactl -f /var/lib/alsa/asound.state restore || true
else
alsactl store || true
fi
# Set default PulseAudio sink
pactl set-default-sink alsa_output.platform-rockchipes8388.stereo-speakers || true
# Ensure PulseAudio service applies changes
systemctl --user restart pulseaudio.service || true
AUDIO_INIT_SCRIPT
run_host_command_logged chmod -v +x "${destination}${script_path}" # Make it executable
# Create systemd service file
cat <<- AUDIO_INIT_SYSTEMD_SERVICE > "$destination"/lib/systemd/system/audio-init.service
[Unit]
Description=${BOARD} Audio Initialization
After=sound.target systemd-user-sessions.service
Before=pulseaudio.service
[Service]
Type=oneshot
ExecStart=${script_path}
[Install]
WantedBy=multi-user.target
AUDIO_INIT_SYSTEMD_SERVICE
return 0
}
# Enable the service in the image
function post_family_tweaks__audio_init_enable_service_in_image() {
display_alert "Extension: ${EXTENSION}: ${BOARD}" "enabling audio init service in the image" "info"
chroot_sdcard systemctl --no-reload enable "audio-init.service"
return 0
}

41
packages/blobs/asound.state/asound.state.rk3588hd Normal file
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@ -0,0 +1,41 @@
# packages/bsp/rockchip/asound.state.rk3588hd
state.rockchipes8388 {
control.1 {
iface MIXER
name 'OUT1 Switch'
value true
}
control.2 {
iface MIXER
name 'OUT2 Switch'
value true
}
control.3 {
iface MIXER
name 'Speaker Switch'
value true
}
control.4 {
iface MIXER
name 'hp switch'
value true
}
control.5 {
iface MIXER
name 'PCM Volume'
value.0 255
value.1 255
}
control.6 {
iface MIXER
name 'Headset Mic Switch'
value true
}
# HDMI 控制
control.7 {
iface MIXER
name 'HDMI Playback Switch'
value true
}
}

4042
patch/kernel/rk35xx-vendor-6.1/0001-drivers-drm-rockchip-Update-Hdmi-Color-in-VOP-driver.patch Normal file
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82
patch/kernel/rk35xx-vendor-6.1/0001-include-drm-Update-Hdmi-Color-in-VOP-driver.patch Normal file
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@ -0,0 +1,82 @@
From 7a935a2a61ac0b11b97943f2f8771089808b3cd0 Mon Sep 17 00:00:00 2001
From: caco <caco@126.com>
Date: Wed, 30 Jul 2025 09:17:29 +0800
Subject: [PATCH drm/rockchip] include/drm: Update Hdmi Color in VOP driver
Fixed incorrect horizontal sync timing in vop_crtc_set_timing.
Path: drivers/gpu/drm/rockchip/rockchip_drm_vop.c
Signed-off-by: caco <caco@126.com>
---
include/drm/bridge/dw_hdmi.h | 14 --------------
include/uapi/drm/rockchip_drm.h | 2 +-
2 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index 9580f6e43d3c..557e5d4efbe9 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -80,7 +80,6 @@ struct platform_device;
*/
#define SUPPORT_HDMI_ALLM BIT(1)
-#define DOVI_VSIF_LEN 8
enum {
DW_HDMI_RES_8,
@@ -143,11 +142,6 @@ struct dw_hdmi_link_config {
u8 pps_payload[128];
};
-struct dovi_vsif_data {
- u8 header[3];
- u8 pb[28];
-};
-
struct dw_hdmi_phy_ops {
int (*init)(struct dw_hdmi *hdmi, void *data,
const struct drm_display_info *display,
@@ -260,9 +254,6 @@ struct dw_hdmi_plat_data {
int (*get_edid_dsc_info)(void *data, const struct edid *edid);
int (*get_next_hdr_data)(void *data, struct edid *edid,
struct drm_connector *connector);
- int (*get_dovi_data)(void *data, const struct edid *edid,
- struct drm_connector *connector);
- void (*get_dovi_vsif)(void *data, u32 *buf);
struct dw_hdmi_link_config *(*get_link_cfg)(void *data);
void (*set_hdcp_status)(void *data, u8 status);
void (*set_hdcp2_enable)(void *data, bool enable);
@@ -282,10 +273,6 @@ struct dw_hdmi_plat_data {
struct drm_display_mode *(*get_force_timing)(void *data);
u32 (*get_refclk_rate)(void *data);
void (*force_frl_rate)(void *data, u8 rate);
- void (*get_mode_color_caps)(struct drm_connector *connector, struct drm_display_info *info,
- void *data);
- void (*crtc_pre_disable)(void *data, struct drm_crtc *crtc);
- void (*crtc_post_enable)(void *data, struct drm_crtc *crtc);
/* Vendor Property support */
const struct dw_hdmi_property_ops *property_ops;
@@ -369,7 +356,6 @@ void dw_hdmi_qp_audio_enable(struct dw_hdmi_qp *hdmi);
void dw_hdmi_qp_audio_disable(struct dw_hdmi_qp *hdmi);
int dw_hdmi_qp_set_plugged_cb(struct dw_hdmi_qp *hdmi, hdmi_codec_plugged_cb fn,
struct device *codec_dev);
-void dw_hdmi_qp_set_quant_range(struct dw_hdmi_qp *hdmi);
void dw_hdmi_qp_set_output_type(struct dw_hdmi_qp *hdmi, u64 val);
bool dw_hdmi_qp_get_output_whether_hdmi(struct dw_hdmi_qp *hdmi);
int dw_hdmi_qp_get_output_type_cap(struct dw_hdmi_qp *hdmi);
diff --git a/include/uapi/drm/rockchip_drm.h b/include/uapi/drm/rockchip_drm.h
index 200584764a65..6d0422a9a126 100644
--- a/include/uapi/drm/rockchip_drm.h
+++ b/include/uapi/drm/rockchip_drm.h
@@ -90,7 +90,7 @@ enum drm_rockchip_gem_cpu_acquire_type {
enum rockchip_crtc_feture {
ROCKCHIP_DRM_CRTC_FEATURE_ALPHA_SCALE,
ROCKCHIP_DRM_CRTC_FEATURE_HDR10,
- ROCKCHIP_DRM_CRTC_FEATURE_DOVI,
+ ROCKCHIP_DRM_CRTC_FEATURE_NEXT_HDR,
ROCKCHIP_DRM_CRTC_FEATURE_VIVID_HDR,
};
--
2.34.1

1549
patch/kernel/rk35xx-vendor-6.1/rk3588-1000-board-blueberry-r58-hd-dts.patch Normal file
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178
patch/u-boot/legacy/u-boot-radxa-rk35xx/5002-boot-r58-hd.patch Normal file
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@ -0,0 +1,178 @@
From 5e531fd4f73b12aaa7cf44cf0bae37cb02341b09 Mon Sep 17 00:00:00 2001
From: shi <shi@126.com>
Date: Fri, 18 Jul 2025 14:17:26 +0800
Subject: [PATCH] update r58 hd dts tree
---
arch/arm/dts/rk3588-blueberry-hd3.dts | 159 ++++++++++++++++++++++++++
1 file changed, 159 insertions(+)
create mode 100644 arch/arm/dts/rk3588-blueberry-hd3.dts
diff --git a/arch/arm/dts/rk3588-blueberry-hd3.dts b/arch/arm/dts/rk3588-blueberry-hd3.dts
new file mode 100644
index 00000000000..5ad26eb8b0e
--- /dev/null
+++ b/arch/arm/dts/rk3588-blueberry-hd3.dts
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include "rk3588.dtsi"
+#include "rk3588-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Mekotronics R58 HD -4G (RK3588 HD LP4x V1.2 BlueBerry Board)";
+ compatible = "rockchip,rk3588-blueberry-r58-hd3-linux", "rockchip,rk3588";
+
+ // This is needed for the RECOVERY button to actually trigger LOADER mode when pressed during boot
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ u-boot,dm-pre-reloc;
+ status = "okay";
+
+ volumeup-key {
+ u-boot,dm-pre-reloc;
+ linux,code = <KEY_VOLUMEUP>;
+ label = "volume up";
+ press-threshold-microvolt = <1750>;
+ };
+ };
+
+ vcc12v_dcin: vcc12v-dcin {
+ u-boot,dm-pre-reloc;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ u-boot,dm-pre-reloc;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ u-boot,dm-pre-reloc;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_pcie30: vcc3v3-pcie30 {
+ u-boot,dm-pre-reloc;
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; //hugsun gpio1_c4
+ regulator-boot-on;
+ regulator-always-on;
+ startup-delay-us = <10000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie30_en>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ /* work led is actually blue "PWR" LED and the powerbutton backlight LED */
+ led_work: led_work {
+ u-boot,dm-pre-reloc;
+ compatible = "regulator-fixed";
+ regulator-name = "led_work";
+ enable-active-high;
+ gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; // Turn on work led
+ regulator-boot-on;
+ regulator-always-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&pcie3x4 {
+ u-boot,dm-pre-reloc;
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&pcie30phy {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&combphy0_ps {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&combphy1_ps {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&combphy2_psu {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+/* related to usbhost_dwc3_0 */
+&usbhost3_0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+ maximum-speed = "super-speed";
+};
+
+/* related to usbhost3_0 */
+&usbhost_dwc3_0 {
+ u-boot,dm-pre-reloc;
+ dr_mode = "host";
+ status = "okay";
+ maximum-speed = "super-speed";
+};
+
+&pinctrl {
+ usb {
+ u-boot,dm-pre-reloc;
+ vcc5v0_host_en: vcc5v0-host-en {
+ u-boot,dm-pre-reloc;
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+
+ pcie {
+ u-boot,dm-spl;
+ vcc3v3_pcie30_en: vcc3v3-pcie30-en {
+ u-boot,dm-spl;
+ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ };
+};
+
--
2.34.1

259
patch/u-boot/legacy/u-boot-radxa-rk35xx/mekotronics_r58hd-rk3588_defconfig.patch Normal file
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@ -0,0 +1,259 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: John Doe <john.doe@somewhere.on.planet>
Date: Tue, 12 Aug 2025 16:08:09 +0000
Subject: Adding mekotronics_r58hd-rk3588_defconfig
Signed-off-by: John Doe <john.doe@somewhere.on.planet>
---
configs/mekotronics_r58hd-rk3588_defconfig | 240 ++++++++++
1 file changed, 240 insertions(+)
diff --git a/configs/mekotronics_r58hd-rk3588_defconfig b/configs/mekotronics_r58hd-rk3588_defconfig
new file mode 100644
index 00000000000..145cb0cd4f3
--- /dev/null
+++ b/configs/mekotronics_r58hd-rk3588_defconfig
@@ -0,0 +1,240 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_ROCKCHIP_HWID_DTB=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_USING_KERNEL_DTB_V2=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_NEW_IDB=y
+CONFIG_PSTORE=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RK3588=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3588-blueberry-hd3"
+CONFIG_DEBUG_UART=y
+CONFIG_LOCALVERSION="-armbian"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_BOOTDELAY=1
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_AB=y
+CONFIG_FASTBOOT_BUF_ADDR=0xc00800
+CONFIG_FASTBOOT_BUF_SIZE=0x07000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_MTD_BLK=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_NET_TFTP_VARS is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_SARADC_ROCKCHIP_V2=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_SCMI=y
+CONFIG_SPL_CLK_SCMI=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
+CONFIG_SCMI_FIRMWARE=y
+CONFIG_SPL_SCMI_FIRMWARE=y
+CONFIG_GPIO_HOG=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_ROCKCHIP_GPIO_V2=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_I2C_MUX=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_MISC_DECOMPRESS=y
+CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_ROCKCHIP_OTP=y
+CONFIG_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=80000000
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_RGMII=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
+CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
+CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_CW201X=y
+CONFIG_POWER_FG_CW221X=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_SPI_RK8XX=y
+CONFIG_DM_POWER_DELIVERY=y
+CONFIG_TYPEC_TCPM=y
+CONFIG_TYPEC_TCPCI=y
+CONFIG_TYPEC_HUSB311=y
+CONFIG_TYPEC_FUSB302=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK860X=y
+CONFIG_CHARGER_BQ25700=y
+CONFIG_CHARGER_BQ25890=y
+CONFIG_CHARGER_SC8551=y
+CONFIG_CHARGER_SGM41542=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RAMDISK=y
+CONFIG_RAMDISK_RO=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_XHCI_PCI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
+CONFIG_USB_GADGET_VENDOR_NUM=0x2207
+CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_MAXIM_MAX96745=y
+CONFIG_DRM_MAXIM_MAX96755F=y
+CONFIG_DRM_ROHM_BU18XL82=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
+CONFIG_DRM_ROCKCHIP_DW_DP=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
+CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_LIB_RAND=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_N_SIZE=0x200
+CONFIG_RSA_E_SIZE=0x10
+CONFIG_RSA_C_SIZE=0x20
+CONFIG_XBC=y
+CONFIG_LZ4=y
+CONFIG_LZMA=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
--
Created with Armbian build tools https://github.com/armbian/build