mirror of https://github.com/armbian/build.git
rk3576: nanopi-r76s: add mainline u-boot and fix USB3.0 host (#8997)
- Add mainline U-Boot support for edge branch (v2026.01-rc2) - Add U-Boot defconfig patch for nanopi-r76s - Fix USB3.0 Type-A host port configuration in DTS - Enable USB OTG0 controller in host mode with power GPIO control - Set KERNEL_TEST_TARGET to edge
This commit is contained in:
SuperKali
GitHub
parent
e4db83ae2c
commit
18795c437a
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@ -3,6 +3,7 @@ BOARD_NAME="NanoPi R76S"
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BOARDFAMILY="rk35xx"
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BOOTCONFIG="nanopi-r76s-rk3576_defconfig"
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KERNEL_TARGET="vendor,edge" # WIP: current kernel
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KERNEL_TEST_TARGET="edge"
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FULL_DESKTOP="yes"
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BOOT_LOGO="desktop"
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BOOT_FDT_FILE="rockchip/rk3576-nanopi-r76s.dtb"
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@ -18,3 +19,41 @@ function post_family_tweaks__nanopi-r76s_naming_audios() {
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echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-hdmi-sound", ENV{SOUND_DESCRIPTION}="HDMI Audio"' > $SDCARD/etc/udev/rules.d/90-naming-audios.rules
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return 0
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}
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function post_family_config__nanopi_r76s_use_mainline_uboot() {
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# Use mainline U-Boot for edge, keep vendor U-Boot for vendor branch
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[[ "${BRANCH}" == "vendor" ]] && return 0
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display_alert "$BOARD" "Using mainline U-Boot for $BOARD / $BRANCH" "info"
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declare -g BOOTDELAY=1
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declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git"
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declare -g BOOTBRANCH="tag:v2026.01-rc2"
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declare -g BOOTPATCHDIR="v2026.01"
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unset BOOT_FDT_FILE
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# Don't set BOOTDIR, allow shared U-Boot source directory for disk space efficiency
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declare -g UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin"
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# Disable stuff from rockchip64_common; we're using binman here which does all the work already
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unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # disable stuff from rockchip64_common; we're using binman here which does all the work already
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# Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go
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function write_uboot_platform() {
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dd "if=$1/u-boot-rockchip.bin" "of=$2" bs=32k seek=1 conv=notrunc status=none
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}
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}
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# "rockchip-common: boot SD card first, then NVMe, then mmc"
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# include/configs/rockchip-common.h
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# -#define BOOT_TARGETS "mmc1 mmc0 nvme scsi usb pxe dhcp"
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# +#define BOOT_TARGETS "mmc0 mmc1 nvme scsi usb pxe dhcp"
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# On NanoPi R76S, mmc0 is the SD card, mmc1 is the eMMC slot
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function pre_config_uboot_target__nanopi_r76s_patch_rockchip_common_boot_order() {
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[[ "${BRANCH}" == "vendor" ]] && return 0
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declare -a rockchip_uboot_targets=("mmc0" "mmc1" "nvme" "scsi" "usb" "pxe" "dhcp") # for future make-this-generic delight
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display_alert "u-boot for ${BOARD}/${BRANCH}" "u-boot: adjust boot order to '${rockchip_uboot_targets[*]}'" "info"
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sed -i -e "s/#define BOOT_TARGETS.*/#define BOOT_TARGETS \"${rockchip_uboot_targets[*]}\"/" include/configs/rockchip-common.h
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regular_git diff -u include/configs/rockchip-common.h || true
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}
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@ -153,17 +153,17 @@
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vin-supply = <&vcc_3v3_s3>;
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};
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/* USB Type-C Power */
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vbus5v0_typec: regulator-vbus5v0-typec {
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/* USB OTG0 Power (USB3.0 Type-A) */
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vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
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compatible = "regulator-fixed";
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regulator-name = "vbus5v0_typec";
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regulator-name = "vcc5v0_usb_otg0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc_5v0_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_otg0_pwren>;
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vin-supply = <&vcc_5v0_sys>;
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};
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};
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@ -818,10 +818,9 @@
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status = "okay";
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};
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/* USB Configuration */
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/* USB Configuration - USB3.0 Type-A Host Port (OTG0) */
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&usb_drd0_dwc3 {
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dr_mode = "otg";
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extcon = <&u2phy0>;
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dr_mode = "host";
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status = "okay";
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};
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@ -835,7 +834,7 @@
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&u2phy0_otg {
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status = "okay";
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phy-supply = <&vbus5v0_typec>;
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phy-supply = <&vcc5v0_usb_otg0>;
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};
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/* Video Output Configuration */
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@ -0,0 +1,969 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: SuperKali <hello@superkali.me>
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Date: Tue, 25 Nov 2025 07:54:11 +0000
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Subject: arm: rk3576: Add support for FriendlyELEC NanoPi R76S
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Add support for the FriendlyELEC NanoPi R76S board
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based on the Rockchip RK3576 SoC.
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Features:
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- 2x Realtek RTL8125 2.5GbE (PCIe)
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- eMMC and SD card support
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- SDIO WiFi/Bluetooth
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- USB3.0 Type-A Host
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- HDMI output
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- 3x GPIO LEDs (system, LAN, WAN)
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- Rockchip RK806 PMIC
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Signed-off-by: SuperKali <hello@superkali.me>
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---
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arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi | 7 +
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configs/nanopi-r76s-rk3576_defconfig | 60 +
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dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts | 857 ++++++++++
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3 files changed, 924 insertions(+)
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diff --git a/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi
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new file mode 100644
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index 00000000000..9798c46e2d0
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--- /dev/null
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+++ b/arch/arm/dts/rk3576-nanopi-r76s-u-boot.dtsi
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@@ -0,0 +1,7 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+#include "rk3576-u-boot.dtsi"
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+
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+&sys_led {
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+ default-state = "on";
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+};
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diff --git a/configs/nanopi-r76s-rk3576_defconfig b/configs/nanopi-r76s-rk3576_defconfig
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new file mode 100644
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index 00000000000..d7d402bc237
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--- /dev/null
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+++ b/configs/nanopi-r76s-rk3576_defconfig
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@@ -0,0 +1,60 @@
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+CONFIG_ARM=y
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+CONFIG_SKIP_LOWLEVEL_INIT=y
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+CONFIG_COUNTER_FREQUENCY=24000000
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3576-nanopi-r76s"
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+CONFIG_ROCKCHIP_RK3576=y
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+CONFIG_SYS_LOAD_ADDR=0x40c00800
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+CONFIG_DEBUG_UART_BASE=0x2AD40000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_PCI=y
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+CONFIG_DEBUG_UART=y
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-nanopi-r76s.dtb"
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_SPL_MAX_SIZE=0x40000
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+CONFIG_CMD_MEMINFO=y
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+CONFIG_CMD_MEMINFO_MAP=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_MISC=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_PCI=y
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+CONFIG_CMD_USB=y
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+CONFIG_CMD_ROCKUSB=y
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+CONFIG_CMD_USB_MASS_STORAGE=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_RNG=y
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+CONFIG_CMD_REGULATOR=y
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+# CONFIG_SPL_DOS_PARTITION is not set
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+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_LED=y
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+CONFIG_LED_GPIO=y
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+CONFIG_SUPPORT_EMMC_RPMB=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_PHY_REALTEK=y
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+CONFIG_DWC_ETH_QOS=y
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+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
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+CONFIG_PCIE_DW_ROCKCHIP=y
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+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
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+CONFIG_PHY_ROCKCHIP_USBDP=y
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+CONFIG_DM_PMIC=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_SYS_NS16550_MEM32=y
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+CONFIG_SYSRESET_PSCI=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_DWC3=y
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+CONFIG_USB_DWC3_GENERIC=y
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+CONFIG_USB_GADGET=y
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+CONFIG_USB_GADGET_DOWNLOAD=y
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+CONFIG_USB_FUNCTION_ROCKUSB=y
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+# CONFIG_USB_FUNCTION_FASTBOOT is not set
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+CONFIG_ERRNO_STR=y
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diff --git a/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts b/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts
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new file mode 100644
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index 00000000000..5ef2b193789
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--- /dev/null
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+++ b/dts/upstream/src/arm64/rockchip/rk3576-nanopi-r76s.dts
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@@ -0,0 +1,857 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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+ *
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include <dt-bindings/usb/pd.h>
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+#include "rk3576.dtsi"
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+
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+/ {
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+ model = "FriendlyELEC NanoPi R76S";
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+ compatible = "friendlyelec,nanopi-r76s", "rockchip,rk3576";
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+
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+ /* Network and Storage Aliases */
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+ aliases {
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+ ethernet0 = &r8125_b;
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+ ethernet1 = &r8125_a;
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+ mmc0 = &sdmmc;
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+ mmc1 = &sdhci;
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+ };
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+
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+ /* Boot Configuration */
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+ chosen {
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+ stdout-path = "serial0:1500000n8";
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+ };
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+
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+ /* HDMI Connector */
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ /* LED Configuration */
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+ leds: leds {
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+ compatible = "gpio-leds";
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+
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+ sys_led: led-0 {
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+ color = <LED_COLOR_ID_RED>;
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+ function = LED_FUNCTION_HEARTBEAT;
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+ gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ pinctrl-0 = <&sys_led_pin>;
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+ };
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+
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+ lan_led: led-1 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_STATUS;
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+ gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
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+ pinctrl-0 = <&lan_led_pin>;
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+ };
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+
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+ wan_led: led-2 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_STATUS;
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+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-0 = <&wan_led_pin>;
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+ };
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+ };
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+
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+ /* SDIO for WIFI CARD */
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_poweren_gpio>;
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+
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+ post-power-on-delay-ms = <200>;
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+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ /* Power Input */
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+ vcc_5v0_dcin: regulator-vcc-5v0-dcin {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_5v0_dcin";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ /* Main System Power */
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+ vcc_5v0_sys: regulator-vcc-5v0-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc_5v0_dcin>;
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+ };
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+
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+ /* PMIC Input Rails */
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+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_1v1_nldo_s3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1100000>;
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+ vin-supply = <&vcc_5v0_sys>;
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+ };
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+
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+ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_2v0_pldo_s3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <2000000>;
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+ regulator-max-microvolt = <2000000>;
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+ vin-supply = <&vcc_5v0_sys>;
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+ };
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+
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+ /* General Purpose 3.3V Rails */
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+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_3v3_s0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_3v3_s3>;
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+ };
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+
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+ /* RTC Backup Power */
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+ vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_3v3_rtc_s5";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_5v0_sys>;
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+ };
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+
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+ /* PCIe Power */
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+ vcc_3v3_pcie20: regulator-vcc-3v3-pcie20 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_3v3_pcie20";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_3v3_s3>;
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+ };
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+
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+ /* USB OTG0 Power (USB3.0 Type-A) */
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+ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_usb_otg0";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usb_otg0_pwren>;
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+ vin-supply = <&vcc_5v0_sys>;
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+ };
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+};
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+
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+/* Combo PHY Configuration */
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+&combphy0_ps {
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+ status = "okay";
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+};
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+
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+&combphy1_psu {
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+ status = "okay";
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+};
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+
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+/* CPU Nodes */
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+&cpu_b0 {
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+ cpu-supply = <&vdd_cpu_big_s0>;
|
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+};
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+
|
||||
+&cpu_b1 {
|
||||
+ cpu-supply = <&vdd_cpu_big_s0>;
|
||||
+};
|
||||
+
|
||||
+&cpu_b2 {
|
||||
+ cpu-supply = <&vdd_cpu_big_s0>;
|
||||
+};
|
||||
+
|
||||
+&cpu_b3 {
|
||||
+ cpu-supply = <&vdd_cpu_big_s0>;
|
||||
+};
|
||||
+
|
||||
+&cpu_l0 {
|
||||
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
+};
|
||||
+
|
||||
+&cpu_l1 {
|
||||
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
+};
|
||||
+
|
||||
+&cpu_l2 {
|
||||
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
+};
|
||||
+
|
||||
+&cpu_l3 {
|
||||
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||||
+};
|
||||
+
|
||||
+/* GPU Node */
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu_s0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* GPIO Connector */
|
||||
+&gpio4 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO4 A0-A7 */
|
||||
+ "", "",
|
||||
+ "", "PIN_03",
|
||||
+ "PIN_04 [UART6_TX_M0]", "PIN_05",
|
||||
+ "PIN_06 [UART6_RX_M0]", "PIN_07",
|
||||
+ /* GPIO4 B0-B7 */
|
||||
+ "", "", "", "",
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO4 C0-C7 */
|
||||
+ "", "", "", "",
|
||||
+ "", "", "", "",
|
||||
+ /* GPIO4 D0-D7 */
|
||||
+ "", "", "", "",
|
||||
+ "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+/* HDMI Nodes */
|
||||
+&hdmi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_in {
|
||||
+ hdmi_in_vp0: endpoint {
|
||||
+ remote-endpoint = <&vp0_out_hdmi>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_out {
|
||||
+ hdmi_out_con: endpoint {
|
||||
+ remote-endpoint = <&hdmi_con_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdptxphy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* I2C Nodes */
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pmic@23 {
|
||||
+ compatible = "rockchip,rk806";
|
||||
+ reg = <0x23>;
|
||||
+
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
||||
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
+
|
||||
+ system-power-controller;
|
||||
+
|
||||
+ vcc1-supply = <&vcc_5v0_sys>;
|
||||
+ vcc2-supply = <&vcc_5v0_sys>;
|
||||
+ vcc3-supply = <&vcc_5v0_sys>;
|
||||
+ vcc4-supply = <&vcc_5v0_sys>;
|
||||
+ vcc5-supply = <&vcc_5v0_sys>;
|
||||
+ vcc6-supply = <&vcc_5v0_sys>;
|
||||
+ vcc7-supply = <&vcc_5v0_sys>;
|
||||
+ vcc8-supply = <&vcc_5v0_sys>;
|
||||
+ vcc9-supply = <&vcc_5v0_sys>;
|
||||
+ vcc10-supply = <&vcc_5v0_sys>;
|
||||
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
|
||||
+ vcc12-supply = <&vcc_5v0_sys>;
|
||||
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
|
||||
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
|
||||
+ vcca-supply = <&vcc_5v0_sys>;
|
||||
+
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+
|
||||
+ rk806_dvs1_null: dvs1-null-pins {
|
||||
+ pins = "gpio_pwrctrl1";
|
||||
+ function = "pin_fun0";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs2_null: dvs2-null-pins {
|
||||
+ pins = "gpio_pwrctrl2";
|
||||
+ function = "pin_fun0";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs3_null: dvs3-null-pins {
|
||||
+ pins = "gpio_pwrctrl3";
|
||||
+ function = "pin_fun0";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs1_slp: dvs1-slp-pins {
|
||||
+ pins = "gpio_pwrctrl1";
|
||||
+ function = "pin_fun1";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
|
||||
+ pins = "gpio_pwrctrl1";
|
||||
+ function = "pin_fun2";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs1_rst: dvs1-rst-pins {
|
||||
+ pins = "gpio_pwrctrl1";
|
||||
+ function = "pin_fun3";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs2_slp: dvs2-slp-pins {
|
||||
+ pins = "gpio_pwrctrl2";
|
||||
+ function = "pin_fun1";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
|
||||
+ pins = "gpio_pwrctrl2";
|
||||
+ function = "pin_fun2";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs2_rst: dvs2-rst-pins {
|
||||
+ pins = "gpio_pwrctrl2";
|
||||
+ function = "pin_fun3";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs2_dvs: dvs2-dvs-pins {
|
||||
+ pins = "gpio_pwrctrl2";
|
||||
+ function = "pin_fun4";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs2_gpio: dvs2-gpio-pins {
|
||||
+ pins = "gpio_pwrctrl2";
|
||||
+ function = "pin_fun5";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs3_slp: dvs3-slp-pins {
|
||||
+ pins = "gpio_pwrctrl3";
|
||||
+ function = "pin_fun1";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
|
||||
+ pins = "gpio_pwrctrl3";
|
||||
+ function = "pin_fun2";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs3_rst: dvs3-rst-pins {
|
||||
+ pins = "gpio_pwrctrl3";
|
||||
+ function = "pin_fun3";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs3_dvs: dvs3-dvs-pins {
|
||||
+ pins = "gpio_pwrctrl3";
|
||||
+ function = "pin_fun4";
|
||||
+ };
|
||||
+
|
||||
+ rk806_dvs3_gpio: dvs3-gpio-pins {
|
||||
+ pins = "gpio_pwrctrl3";
|
||||
+ function = "pin_fun5";
|
||||
+ };
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_cpu_big_s0: dcdc-reg1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_cpu_big_s0";
|
||||
+ regulator-enable-ramp-delay = <400>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_npu_s0: dcdc-reg2 {
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_npu_s0";
|
||||
+ regulator-enable-ramp-delay = <400>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_cpu_lit_s0: dcdc-reg3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <950000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_cpu_lit_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ regulator-suspend-microvolt = <750000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3_s3: dcdc-reg4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcc_3v3_s3";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu_s0: dcdc-reg5 {
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-name = "vdd_gpu_s0";
|
||||
+ regulator-enable-ramp-delay = <400>;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ regulator-suspend-microvolt = <850000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vddq_ddr_s0: dcdc-reg6 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vddq_ddr_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_logic_s0: dcdc-reg7 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <800000>;
|
||||
+ regulator-name = "vdd_logic_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8_s3: dcdc-reg8 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcc_1v8_s3";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd2_ddr_s3: dcdc-reg9 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-name = "vdd2_ddr_s3";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_ddr_s0: dcdc-reg10 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <550000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-name = "vdd_ddr_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8_s0: pldo-reg1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca_1v8_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pldo2_s0: pldo-reg2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca1v8_pldo2_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_1v2_s0: pldo-reg3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-name = "vdda_1v2_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca_3v3_s0: pldo-reg4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vcca_3v3_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd_s0: pldo-reg5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-name = "vccio_sd_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pldo6_s3: pldo-reg6 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-name = "vcca1v8_pldo6_s3";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_0v75_s3: nldo-reg1 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <750000>;
|
||||
+ regulator-name = "vdd_0v75_s3";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <750000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_ddr_pll_s0: nldo-reg2 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <850000>;
|
||||
+ regulator-name = "vdda_ddr_pll_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v75_hdmi_s0: nldo-reg3 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <837500>;
|
||||
+ regulator-max-microvolt = <837500>;
|
||||
+ regulator-name = "vdda0v75_hdmi_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v85_s0: nldo-reg4 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <850000>;
|
||||
+ regulator-max-microvolt = <850000>;
|
||||
+ regulator-name = "vdda_0v85_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v75_s0: nldo-reg5 {
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <750000>;
|
||||
+ regulator-name = "vdda_0v75_s0";
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ pinctrl-0 = <&i2c0m1_xfer>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ hym8563: rtc@51 {
|
||||
+ compatible = "haoyu,hym8563";
|
||||
+ reg = <0x51>;
|
||||
+ #clock-cells = <0>;
|
||||
+ clock-frequency = <32768>;
|
||||
+ clock-output-names = "hym8563";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&hym8563_int>;
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c5 {
|
||||
+ status = "okay";
|
||||
+ clock-frequency = <200000>;
|
||||
+ pinctrl-0 = <&i2c5m3_xfer>;
|
||||
+};
|
||||
+
|
||||
+&i2c8 {
|
||||
+ clock-frequency = <200000>;
|
||||
+ pinctrl-0 = <&i2c8m2_xfer>;
|
||||
+};
|
||||
+
|
||||
+/* PCIE Nodes */
|
||||
+&pcie0 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pcie0_reset_gpio>;
|
||||
+ phys = <&combphy0_ps PHY_TYPE_PCIE>;
|
||||
+ reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&vcc_3v3_pcie20>;
|
||||
+
|
||||
+ pcie@0,0 {
|
||||
+ reg = <0x00000000 0 0 0 0>;
|
||||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ r8125_a: pcie@0,0 {
|
||||
+ reg = <0x000000 0 0 0 0>;
|
||||
+ local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie1 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-0 = <&pcie1_reset_gpio>;
|
||||
+ reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
+ phys = <&combphy1_psu PHY_TYPE_PCIE>;
|
||||
+ vpcie3v3-supply = <&vcc_3v3_pcie20>;
|
||||
+
|
||||
+ pcie@0,0 {
|
||||
+ reg = <0x00200000 0 0 0 0>;
|
||||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+
|
||||
+ r8125_b: pcie@20,0 {
|
||||
+ reg = <0x000000 0 0 0 0>;
|
||||
+ local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* PINs Configuration */
|
||||
+&pinctrl {
|
||||
+
|
||||
+ hym8563 {
|
||||
+ hym8563_int: hym8563-int {
|
||||
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio-leds {
|
||||
+ sys_led_pin: sys-led-pin {
|
||||
+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ lan_led_pin: lan-led-pin {
|
||||
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ wan_led_pin: wan-led-pin {
|
||||
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie {
|
||||
+ pcie0_reset_gpio: pcie0-reset-gpio {
|
||||
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ pcie1_reset_gpio: pcie1-reset-gpio {
|
||||
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ usb_otg0_pwren: usb-otg0-pwren {
|
||||
+ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-bluetooth {
|
||||
+ uart5_gpios: uart5-gpios {
|
||||
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-wlan {
|
||||
+ wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_poweren_gpio: wifi-poweren-gpio {
|
||||
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/* Audio Interface Configuration */
|
||||
+&sai6 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* SD/MMC Configuration */
|
||||
+&sdio {
|
||||
+ max-frequency = <200000000>;
|
||||
+ bus-width = <4>;
|
||||
+ cap-sdio-irq;
|
||||
+ disable-wp;
|
||||
+ keep-power-in-suspend;
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+ no-sd;
|
||||
+ no-mmc;
|
||||
+ non-removable;
|
||||
+ sd-uhs-sdr50;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc_3v3_s3>;
|
||||
+ vqmmc-supply = <&vcc_1v8_s3>;
|
||||
+ pinctrl-0 = <&sdmmc1m0_bus4 &sdmmc1m0_clk &sdmmc1m0_cmd>;
|
||||
+ wakeup-source;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ full-pwr-cycle-in-suspend;
|
||||
+ max-frequency = <200000000>;
|
||||
+ mmc-hs400-1_8v;
|
||||
+ mmc-hs400-enhanced-strobe;
|
||||
+ no-sdio;
|
||||
+ no-sd;
|
||||
+ non-removable;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ max-frequency = <200000000>;
|
||||
+ no-sdio;
|
||||
+ no-mmc;
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc_3v3_s3>;
|
||||
+ vqmmc-supply = <&vccio_sd_s0>;
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* UART Configuration */
|
||||
+&uart0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart5 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bluetooth {
|
||||
+ compatible = "realtek,rtl8822cs-bt";
|
||||
+ enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
+ host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
+ device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart6 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* USB Configuration - USB3.0 Type-A Host Port (OTG0) */
|
||||
+&usb_drd0_dwc3 {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdp_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy0_otg {
|
||||
+ status = "okay";
|
||||
+ phy-supply = <&vcc5v0_usb_otg0>;
|
||||
+};
|
||||
+
|
||||
+/* Video Output Configuration */
|
||||
+&vop {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vp0 {
|
||||
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
+ remote-endpoint = <&hdmi_in_vp0>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
Armbian
|
||||
Loading…
Reference in New Issue