License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2015-12-01 03:36:26 +00:00
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#ifndef _ASM_POWERPC_BOOK3S_64_HASH_H
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#define _ASM_POWERPC_BOOK3S_64_HASH_H
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2009-03-10 17:53:29 +00:00
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#ifdef __KERNEL__
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2018-07-05 16:24:57 +00:00
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#include <asm/asm-const.h>
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2015-12-01 03:36:53 +00:00
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/*
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* Common bits between 4K and 64K pages in a linux-style PTE.
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2016-02-22 02:41:12 +00:00
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* Additional bits may be defined in pgtable-hash64-*.h
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2015-12-01 03:36:53 +00:00
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*
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*/
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2016-04-29 13:25:46 +00:00
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#define H_PTE_NONE_MASK _PAGE_HPTEFLAGS
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2015-12-01 03:36:53 +00:00
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2015-12-01 03:36:36 +00:00
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#ifdef CONFIG_PPC_64K_PAGES
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#include <asm/book3s/64/hash-64k.h>
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#else
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#include <asm/book3s/64/hash-4k.h>
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#endif
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2018-09-20 18:09:42 +00:00
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/* Bits to set in a PMD/PUD/PGD entry valid bit*/
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#define HASH_PMD_VAL_BITS (0x8000000000000000UL)
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#define HASH_PUD_VAL_BITS (0x8000000000000000UL)
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#define HASH_PGD_VAL_BITS (0x8000000000000000UL)
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2015-12-01 03:36:36 +00:00
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/*
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* Size of EA range mapped by our pagetables.
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*/
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2016-04-29 13:25:49 +00:00
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#define H_PGTABLE_EADDR_SIZE (H_PTE_INDEX_SIZE + H_PMD_INDEX_SIZE + \
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H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + PAGE_SHIFT)
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#define H_PGTABLE_RANGE (ASM_CONST(1) << H_PGTABLE_EADDR_SIZE)
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2019-04-17 12:59:14 +00:00
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/*
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* Top 2 bits are ignored in page table walk.
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*/
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#define EA_MASK (~(0xcUL << 60))
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2015-12-01 03:36:36 +00:00
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2018-02-11 15:00:06 +00:00
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/*
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* We store the slot details in the second half of page table.
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* Increase the pud level table so that hugetlb ptes can be stored
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* at pud level.
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*/
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#if defined(CONFIG_HUGETLB_PAGE) && defined(CONFIG_PPC_64K_PAGES)
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#define H_PUD_CACHE_INDEX (H_PUD_INDEX_SIZE + 1)
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#else
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#define H_PUD_CACHE_INDEX (H_PUD_INDEX_SIZE)
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#endif
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2019-02-13 11:15:09 +00:00
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2015-12-01 03:36:36 +00:00
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/*
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2019-04-17 12:59:14 +00:00
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* +------------------------------+
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* | |
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* | |
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* | |
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* +------------------------------+ Kernel virtual map end (0xc00e000000000000)
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* | |
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* | |
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* | 512TB/16TB of vmemmap |
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* | |
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* | |
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* +------------------------------+ Kernel vmemmap start
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* | |
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* | 512TB/16TB of IO map |
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* | |
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* +------------------------------+ Kernel IO map start
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* | |
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* | 512TB/16TB of vmap |
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* | |
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* +------------------------------+ Kernel virt start (0xc008000000000000)
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* | |
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* | |
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* | |
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* +------------------------------+ Kernel linear (0xc.....)
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2015-12-01 03:36:36 +00:00
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*/
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2019-04-17 12:59:14 +00:00
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#define H_VMALLOC_START H_KERN_VIRT_START
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#define H_VMALLOC_SIZE H_KERN_MAP_SIZE
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#define H_VMALLOC_END (H_VMALLOC_START + H_VMALLOC_SIZE)
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2019-02-13 11:15:09 +00:00
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2019-04-17 12:59:14 +00:00
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#define H_KERN_IO_START H_VMALLOC_END
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#define H_KERN_IO_SIZE H_KERN_MAP_SIZE
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#define H_KERN_IO_END (H_KERN_IO_START + H_KERN_IO_SIZE)
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2015-12-01 03:36:36 +00:00
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2019-04-17 12:59:14 +00:00
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#define H_VMEMMAP_START H_KERN_IO_END
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#define H_VMEMMAP_SIZE H_KERN_MAP_SIZE
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#define H_VMEMMAP_END (H_VMEMMAP_START + H_VMEMMAP_SIZE)
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2017-08-01 10:29:22 +00:00
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2019-04-17 12:59:17 +00:00
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#define NON_LINEAR_REGION_ID(ea) ((((unsigned long)ea - H_KERN_VIRT_START) >> REGION_SHIFT) + 2)
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2015-12-01 03:36:36 +00:00
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/*
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* Region IDs
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*/
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2019-04-17 12:59:17 +00:00
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#define USER_REGION_ID 0
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2019-04-17 12:59:19 +00:00
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#define LINEAR_MAP_REGION_ID 1
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2019-04-17 12:59:17 +00:00
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#define VMALLOC_REGION_ID NON_LINEAR_REGION_ID(H_VMALLOC_START)
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#define IO_REGION_ID NON_LINEAR_REGION_ID(H_KERN_IO_START)
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#define VMEMMAP_REGION_ID NON_LINEAR_REGION_ID(H_VMEMMAP_START)
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powerpc/mm/hash: Fix get_region_id() for invalid addresses
Accesses by userspace to random addresses outside the user or kernel
address range will generate an SLB fault. When we handle that fault we
classify the effective address into several classes, eg. user, kernel
linear, kernel virtual etc.
For addresses that are completely outside of any valid range, we
should not insert an SLB entry at all, and instead immediately an
exception.
In the past this was handled in two ways. Firstly we would check the
top nibble of the address (using REGION_ID(ea)) and that would tell us
if the address was user (0), kernel linear (c), kernel virtual (d), or
vmemmap (f). If the address didn't match any of these it was invalid.
Then for each type of address we would do a secondary check. For the
user region we check against H_PGTABLE_RANGE, for kernel linear we
would mask the top nibble of the address and then check the address
against MAX_PHYSMEM_BITS.
As part of commit 0034d395f89d ("powerpc/mm/hash64: Map all the kernel
regions in the same 0xc range") we replaced REGION_ID() with
get_region_id() and changed the masking of the top nibble to only mask
the top two bits, which introduced a bug.
Addresses less than (4 << 60) are still handled correctly, they are
either less than (1 << 60) in which case they are subject to the
H_PGTABLE_RANGE check, or they are correctly checked against
MAX_PHYSMEM_BITS.
However addresses from (4 << 60) to ((0xc << 60) - 1), are incorrectly
treated as kernel linear addresses in get_region_id(). Then the top
two bits are cleared by EA_MASK in slb_allocate_kernel() and the
address is checked against MAX_PHYSMEM_BITS, which it passes due to
the masking. The end result is we incorrectly insert SLB entries for
those addresses.
That is not actually catastrophic, having inserted the SLB entry we
will then go on to take a page fault for the address and at that point
we detect the problem and report it as a bad fault.
Still we should not be inserting those entries, or treating them as
kernel linear addresses in the first place. So fix get_region_id() to
detect addresses in that range and return an invalid region id, which
we cause use to not insert an SLB entry and directly report an
exception.
Fixes: 0034d395f89d ("powerpc/mm/hash64: Map all the kernel regions in the same 0xc range")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
[mpe: Drop change to EA_MASK for now, rewrite change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2019-05-16 11:50:54 +00:00
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#define INVALID_REGION_ID (VMEMMAP_REGION_ID + 1)
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2015-12-01 03:36:36 +00:00
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/*
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* Defines the address of the vmemap area, in its own region on
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* hash table CPUs.
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*/
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#ifdef CONFIG_PPC_MM_SLICES
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#define HAVE_ARCH_UNMAPPED_AREA
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#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
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#endif /* CONFIG_PPC_MM_SLICES */
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2009-03-19 19:34:08 +00:00
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2009-03-10 17:53:29 +00:00
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/* PTEIDX nibble */
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#define _PTEIDX_SECONDARY 0x8
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#define _PTEIDX_GROUP_IX 0x7
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2016-04-29 13:25:54 +00:00
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#define H_PMD_BAD_BITS (PTE_TABLE_SIZE-1)
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#define H_PUD_BAD_BITS (PMD_TABLE_SIZE-1)
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2015-12-01 03:36:36 +00:00
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#ifndef __ASSEMBLY__
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2019-04-17 12:59:14 +00:00
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static inline int get_region_id(unsigned long ea)
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{
|
2019-04-17 12:59:17 +00:00
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int region_id;
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2019-04-17 12:59:14 +00:00
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int id = (ea >> 60UL);
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if (id == 0)
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return USER_REGION_ID;
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powerpc/mm/hash: Fix get_region_id() for invalid addresses
Accesses by userspace to random addresses outside the user or kernel
address range will generate an SLB fault. When we handle that fault we
classify the effective address into several classes, eg. user, kernel
linear, kernel virtual etc.
For addresses that are completely outside of any valid range, we
should not insert an SLB entry at all, and instead immediately an
exception.
In the past this was handled in two ways. Firstly we would check the
top nibble of the address (using REGION_ID(ea)) and that would tell us
if the address was user (0), kernel linear (c), kernel virtual (d), or
vmemmap (f). If the address didn't match any of these it was invalid.
Then for each type of address we would do a secondary check. For the
user region we check against H_PGTABLE_RANGE, for kernel linear we
would mask the top nibble of the address and then check the address
against MAX_PHYSMEM_BITS.
As part of commit 0034d395f89d ("powerpc/mm/hash64: Map all the kernel
regions in the same 0xc range") we replaced REGION_ID() with
get_region_id() and changed the masking of the top nibble to only mask
the top two bits, which introduced a bug.
Addresses less than (4 << 60) are still handled correctly, they are
either less than (1 << 60) in which case they are subject to the
H_PGTABLE_RANGE check, or they are correctly checked against
MAX_PHYSMEM_BITS.
However addresses from (4 << 60) to ((0xc << 60) - 1), are incorrectly
treated as kernel linear addresses in get_region_id(). Then the top
two bits are cleared by EA_MASK in slb_allocate_kernel() and the
address is checked against MAX_PHYSMEM_BITS, which it passes due to
the masking. The end result is we incorrectly insert SLB entries for
those addresses.
That is not actually catastrophic, having inserted the SLB entry we
will then go on to take a page fault for the address and at that point
we detect the problem and report it as a bad fault.
Still we should not be inserting those entries, or treating them as
kernel linear addresses in the first place. So fix get_region_id() to
detect addresses in that range and return an invalid region id, which
we cause use to not insert an SLB entry and directly report an
exception.
Fixes: 0034d395f89d ("powerpc/mm/hash64: Map all the kernel regions in the same 0xc range")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
[mpe: Drop change to EA_MASK for now, rewrite change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2019-05-16 11:50:54 +00:00
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if (id != (PAGE_OFFSET >> 60))
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return INVALID_REGION_ID;
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2019-04-17 12:59:17 +00:00
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if (ea < H_KERN_VIRT_START)
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2019-04-17 12:59:19 +00:00
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return LINEAR_MAP_REGION_ID;
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2019-04-17 12:59:14 +00:00
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2019-04-17 12:59:17 +00:00
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BUILD_BUG_ON(NON_LINEAR_REGION_ID(H_VMALLOC_START) != 2);
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2019-04-17 12:59:14 +00:00
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2019-04-17 12:59:17 +00:00
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region_id = NON_LINEAR_REGION_ID(ea);
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return region_id;
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2019-04-17 12:59:14 +00:00
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}
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2016-04-29 13:25:54 +00:00
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#define hash__pmd_bad(pmd) (pmd_val(pmd) & H_PMD_BAD_BITS)
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#define hash__pud_bad(pud) (pud_val(pud) & H_PUD_BAD_BITS)
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static inline int hash__pgd_bad(pgd_t pgd)
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{
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return (pgd_val(pgd) == 0);
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}
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2017-06-28 17:04:08 +00:00
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#ifdef CONFIG_STRICT_KERNEL_RWX
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extern void hash__mark_rodata_ro(void);
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2017-07-14 06:51:23 +00:00
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extern void hash__mark_initmem_nx(void);
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2017-06-28 17:04:08 +00:00
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#endif
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2015-12-01 03:36:36 +00:00
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extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, unsigned long pte, int huge);
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2015-12-01 03:36:50 +00:00
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extern unsigned long htab_convert_pte_flags(unsigned long pteflags);
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2015-12-01 03:36:36 +00:00
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/* Atomic PTE updates */
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2016-04-29 13:25:54 +00:00
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static inline unsigned long hash__pte_update(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep, unsigned long clr,
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unsigned long set,
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int huge)
|
2015-12-01 03:36:36 +00:00
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{
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2016-04-29 13:25:28 +00:00
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__be64 old_be, tmp_be;
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unsigned long old;
|
2015-12-01 03:36:36 +00:00
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__asm__ __volatile__(
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"1: ldarx %0,0,%3 # pte_update\n\
|
2016-04-29 13:25:28 +00:00
|
|
|
and. %1,%0,%6\n\
|
2015-12-01 03:36:36 +00:00
|
|
|
bne- 1b \n\
|
|
|
|
|
andc %1,%0,%4 \n\
|
|
|
|
|
or %1,%1,%7\n\
|
|
|
|
|
stdcx. %1,0,%3 \n\
|
|
|
|
|
bne- 1b"
|
2016-04-29 13:25:28 +00:00
|
|
|
: "=&r" (old_be), "=&r" (tmp_be), "=m" (*ptep)
|
|
|
|
|
: "r" (ptep), "r" (cpu_to_be64(clr)), "m" (*ptep),
|
2016-04-29 13:25:45 +00:00
|
|
|
"r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set))
|
2015-12-01 03:36:36 +00:00
|
|
|
: "cc" );
|
|
|
|
|
/* huge pages use the old page table lock */
|
|
|
|
|
if (!huge)
|
|
|
|
|
assert_pte_locked(mm, addr);
|
|
|
|
|
|
2016-04-29 13:25:28 +00:00
|
|
|
old = be64_to_cpu(old_be);
|
2016-04-29 13:25:45 +00:00
|
|
|
if (old & H_PAGE_HASHPTE)
|
2015-12-01 03:36:36 +00:00
|
|
|
hpte_need_flush(mm, addr, ptep, old, huge);
|
|
|
|
|
|
|
|
|
|
return old;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Set the dirty and/or accessed bits atomically in a linux PTE, this
|
|
|
|
|
* function doesn't need to flush the hash entry
|
|
|
|
|
*/
|
2016-04-29 13:25:54 +00:00
|
|
|
static inline void hash__ptep_set_access_flags(pte_t *ptep, pte_t entry)
|
2015-12-01 03:36:36 +00:00
|
|
|
{
|
2016-04-29 13:25:28 +00:00
|
|
|
__be64 old, tmp, val, mask;
|
|
|
|
|
|
2016-04-29 13:25:30 +00:00
|
|
|
mask = cpu_to_be64(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_READ | _PAGE_WRITE |
|
2016-04-29 13:25:28 +00:00
|
|
|
_PAGE_EXEC | _PAGE_SOFT_DIRTY);
|
2015-12-01 03:36:36 +00:00
|
|
|
|
2016-04-29 13:25:28 +00:00
|
|
|
val = pte_raw(entry) & mask;
|
2015-12-01 03:36:36 +00:00
|
|
|
|
|
|
|
|
__asm__ __volatile__(
|
|
|
|
|
"1: ldarx %0,0,%4\n\
|
2016-04-29 13:25:28 +00:00
|
|
|
and. %1,%0,%6\n\
|
2015-12-01 03:36:36 +00:00
|
|
|
bne- 1b \n\
|
|
|
|
|
or %0,%3,%0\n\
|
|
|
|
|
stdcx. %0,0,%4\n\
|
|
|
|
|
bne- 1b"
|
|
|
|
|
:"=&r" (old), "=&r" (tmp), "=m" (*ptep)
|
2016-04-29 13:25:45 +00:00
|
|
|
:"r" (val), "r" (ptep), "m" (*ptep), "r" (cpu_to_be64(H_PAGE_BUSY))
|
2015-12-01 03:36:36 +00:00
|
|
|
:"cc");
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 13:25:54 +00:00
|
|
|
static inline int hash__pte_same(pte_t pte_a, pte_t pte_b)
|
2016-03-01 04:15:13 +00:00
|
|
|
{
|
2016-04-29 13:25:54 +00:00
|
|
|
return (((pte_raw(pte_a) ^ pte_raw(pte_b)) & ~cpu_to_be64(_PAGE_HPTEFLAGS)) == 0);
|
2016-03-01 04:15:13 +00:00
|
|
|
}
|
|
|
|
|
|
2016-04-29 13:25:54 +00:00
|
|
|
static inline int hash__pte_none(pte_t pte)
|
2016-04-29 13:25:29 +00:00
|
|
|
{
|
2016-04-29 13:25:54 +00:00
|
|
|
return (pte_val(pte) & ~H_PTE_NONE_MASK) == 0;
|
2016-04-29 13:25:29 +00:00
|
|
|
}
|
|
|
|
|
|
2017-11-06 08:50:46 +00:00
|
|
|
unsigned long pte_get_hash_gslot(unsigned long vpn, unsigned long shift,
|
|
|
|
|
int ssize, real_pte_t rpte, unsigned int subpg_index);
|
|
|
|
|
|
2015-12-01 03:36:37 +00:00
|
|
|
/* This low level function performs the actual PTE insertion
|
|
|
|
|
* Setting the PTE depends on the MMU type and other factors. It's
|
|
|
|
|
* an horrible mess that I'm not going to try to clean up now but
|
|
|
|
|
* I'm keeping it in one place rather than spread around
|
|
|
|
|
*/
|
2016-04-29 13:25:54 +00:00
|
|
|
static inline void hash__set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pte_t *ptep, pte_t pte, int percpu)
|
2015-12-01 03:36:37 +00:00
|
|
|
{
|
|
|
|
|
/*
|
|
|
|
|
* Anything else just stores the PTE normally. That covers all 64-bit
|
|
|
|
|
* cases, and 32-bit non-hash with 32-bit PTEs.
|
|
|
|
|
*/
|
|
|
|
|
*ptep = pte;
|
|
|
|
|
}
|
|
|
|
|
|
2015-12-01 03:36:36 +00:00
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
|
|
|
extern void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pmd_t *pmdp, unsigned long old_pmd);
|
|
|
|
|
#else
|
|
|
|
|
static inline void hpte_do_hugepage_flush(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pmd_t *pmdp,
|
|
|
|
|
unsigned long old_pmd)
|
|
|
|
|
{
|
|
|
|
|
WARN(1, "%s called with THP disabled\n", __func__);
|
|
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
|
|
|
|
|
2016-04-29 13:25:59 +00:00
|
|
|
|
2018-10-09 13:51:45 +00:00
|
|
|
int hash__map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
|
2016-04-29 13:25:59 +00:00
|
|
|
extern int __meminit hash__vmemmap_create_mapping(unsigned long start,
|
|
|
|
|
unsigned long page_size,
|
|
|
|
|
unsigned long phys);
|
|
|
|
|
extern void hash__vmemmap_remove_mapping(unsigned long start,
|
|
|
|
|
unsigned long page_size);
|
2017-01-03 20:39:51 +00:00
|
|
|
|
2018-02-13 15:08:22 +00:00
|
|
|
int hash__create_section_mapping(unsigned long start, unsigned long end, int nid);
|
2017-01-03 20:39:51 +00:00
|
|
|
int hash__remove_section_mapping(unsigned long start, unsigned long end);
|
|
|
|
|
|
2015-12-01 03:36:36 +00:00
|
|
|
#endif /* !__ASSEMBLY__ */
|
2009-03-10 17:53:29 +00:00
|
|
|
#endif /* __KERNEL__ */
|
2015-12-01 03:36:26 +00:00
|
|
|
#endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */
|
