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Mark Salter 700fceb986 perf: arm_pmuv3: Add support for Armv9.4 PMU instruction counter 
JIRA: https://issues.redhat.com/browse/RHEL-5704

commit d8226d8cfbaf5eb9771af8ad8b4e58697e2ffb74
Author: "Rob Herring (Arm)" <robh@kernel.org>
Date: Wed, 31 Jul 2024 10:51:24 -0600

    Armv9.4/8.9 PMU adds optional support for a fixed instruction counter
    similar to the fixed cycle counter. Support for the feature is indicated
    in the ID_AA64DFR1_EL1 register PMICNTR field. The counter is not
    accessible in AArch32.

    Existing userspace using direct counter access won't know how to handle
    the fixed instruction counter, so we have to avoid using the counter
    when user access is requested.

    Acked-by: Mark Rutland <mark.rutland@arm.com>
    Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
    Tested-by: James Clark <james.clark@linaro.org>
    Link: https://lore.kernel.org/r/20240731-arm-pmu-3-9-icntr-v3-7-280a8d7ff465@kernel.org
    Signed-off-by: Will Deacon <will@kernel.org>

Signed-off-by: Mark Salter <msalter@redhat.com>
 		2025-01-04 12:21:46 -05:00
..
arm_pmu.h perf: arm_pmuv3: Add support for Armv9.4 PMU instruction counter 2025-01-04 12:21:46 -05:00
arm_pmuv3.h perf: arm_pmuv3: Add support for Armv9.4 PMU instruction counter 2025-01-04 12:21:46 -05:00