Commit Graph

6 Commits

Author SHA1 Message Date
Rafael Aquini 1ac04de9a1 scripts/gdb: redefine MAX_ORDER sanely
JIRA: https://issues.redhat.com/browse/RHEL-84184

This patch is a backport of the following upstream commit:
commit 63ce5947ef45071d825d4712d6c5ece13f1ce2f6
Author: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
Date:   Wed Jun 19 15:49:06 2024 +0800

    scripts/gdb: redefine MAX_ORDER sanely

    Patch series "Fix GDB command error".

    This patchset fixes some GDB command errors.

    1. Since memory layout of AARCH64 has been changed, we need to modify
       the layout in GDB scripts as well.

    2. Fix pool_index naming of stackdepot.

    This patch (of 6):

    Change the definition of MAX_ORDER to be inclusive.

    Link: https://lkml.kernel.org/r/20240619074911.100434-1-kuan-ying.lee@canonical.com
    Link: https://lkml.kernel.org/r/20240619074911.100434-2-kuan-ying.lee@canonical.com
    Fixes: 23baf831a32c ("mm, treewide: redefine MAX_ORDER sanely")
    Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
    Cc: Jan Kiszka <jan.kiszka@siemens.com>
    Cc: Kieran Bingham <kbingham@kernel.org>
    Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Rafael Aquini <raquini@redhat.com>
2025-04-18 08:39:49 -04:00
Mark Salter 2d16cdc81b scripts/gdb: change the layout of vmemmap
JIRA: https://issues.redhat.com/browse/RHEL-40604

commit 3c0e9a200434e8bb4a2bffbaaeb381bdff5a5938
Author: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
Date: Wed, 19 Jun 2024 15:49:08 +0800

    We need to change the layout of vmemmap in gdb scripts after
    commit 32697ff38287 ("arm64: vmemmap: Avoid base2 order of
    struct page size to dimension region") changed it.

    Link: https://lkml.kernel.org/r/20240619074911.100434-4-kuan-ying.lee@canonical.com
    Fixes: 32697ff38287 ("arm64: vmemmap: Avoid base2 order of struct page size to dimension region")
    Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
    Cc: Jan Kiszka <jan.kiszka@siemens.com>
    Cc: Kieran Bingham <kbingham@kernel.org>
    Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Mark Salter <msalter@redhat.com>
2024-10-31 10:42:52 -04:00
Mark Salter 676b14154b scripts/gdb: change VA_BITS_MIN when we use 16K page
JIRA: https://issues.redhat.com/browse/RHEL-40604

commit 7d8742bf853cc1d4faf08840cc64414ad5f34061
Author: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
Date: Wed, 19 Jun 2024 15:49:10 +0800

    Change VA_BITS_MIN when we use 16K page.

    Link: https://lkml.kernel.org/r/20240619074911.100434-6-kuan-ying.lee@canonical.com
    Fixes: 9684ec186f8f ("arm64: Enable LPA2 at boot if supported by the system")
    Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
    Cc: Jan Kiszka <jan.kiszka@siemens.com>
    Cc: Kieran Bingham <kbingham@kernel.org>
    Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Mark Salter <msalter@redhat.com>
2024-10-31 10:42:52 -04:00
Mark Salter 5880d7b9e4 scripts/gdb: set vabits_actual based on TCR_EL1
JIRA: https://issues.redhat.com/browse/RHEL-40604

commit 04a40baec04fa0634d71ebfa0c91469160a9976e
Author: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
Date: Wed, 19 Jun 2024 15:49:09 +0800

    We encounter the following issue after commit 9cce9c6c2c3b ("arm64: mm: Handle
    LVA support as a CPU feature").

    (gdb) lx-slabinfo
    Python Exception <class 'gdb.error'>: No symbol "vabits_actual" in current context.
    Error occurred in Python: No symbol "vabits_actual" in current context.

    We set vabits_actual based on TCR_EL1 value when
    VA_BITS is bigger than 48.

    Link: https://lkml.kernel.org/r/20240619074911.100434-5-kuan-ying.lee@canonical.com
    Fixes: 9cce9c6c2c3b ("arm64: mm: Handle LVA support as a CPU feature")
    Signed-off-by: Kuan-Ying Lee <kuan-ying.lee@canonical.com>
    Cc: Jan Kiszka <jan.kiszka@siemens.com>
    Cc: Kieran Bingham <kbingham@kernel.org>
    Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Mark Salter <msalter@redhat.com>
2024-10-31 10:42:52 -04:00
Mark Salter eced195c17 scripts/gdb/aarch64: add aarch64 page operation helper commands and configs
JIRA: https://issues.redhat.com/browse/RHEL-40604

Conflicts:
	scripts/gdb/linux/constants.py.in
	Out of order backport of commit 8ac647d96a "x86: replace
	CONFIG_HAVE_KVM with IS_ENABLED(CONFIG_KVM)"

	scripts/gdb/vmlinux-gdb.py
	No backports for vfs, radixtree, and interrupts helpers

commit eb985b5dbf9791136700c555fbf964b6c07481ce
Author: Kuan-Ying Lee <Kuan-Ying.Lee@mediatek.com>
Date: Tue, 8 Aug 2023 16:30:14 +0800

    1. Move page table debugging from mm.py to pgtable.py.

    2. Add aarch64 kernel config and memory constants value.

    3. Add below aarch64 page operation helper commands.
       page_to_pfn, page_to_phys, pfn_to_page, page_address,
       virt_to_phys, sym_to_pfn, pfn_to_kaddr, virt_to_page.

    4. Only support CONFIG_SPARSEMEM_VMEMMAP=y now.

    Link: https://lkml.kernel.org/r/20230808083020.22254-5-Kuan-Ying.Lee@mediatek.com
    Signed-off-by: Kuan-Ying Lee <Kuan-Ying.Lee@mediatek.com>
    Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
    Cc: Chinwen Chang <chinwen.chang@mediatek.com>
    Cc: Matthias Brugger <matthias.bgg@gmail.com>
    Cc: Qun-Wei Lin <qun-wei.lin@mediatek.com>
    Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Mark Salter <msalter@redhat.com>
2024-10-31 10:35:27 -04:00
Mark Salter b331750f53 scripts/gdb: add mm introspection utils
JIRA: https://issues.redhat.com/browse/RHEL-40604

commit e36903b0c19fc6e4cfd84a55840ac9559c3f2831
Author: Dmitrii Bundin <dmitrii.bundin.a@gmail.com>
Date: Mon, 2 Jan 2023 20:10:14 +0300

    This command provides a way to traverse the entire page hierarchy by a
    given virtual address on x86.  In addition to qemu's commands info
    tlb/info mem it provides the complete information about the paging
    structure for an arbitrary virtual address.  It supports 4KB/2MB/1GB and 5
    level paging.

    Here is an example output for 2MB success translation:

    (gdb) translate-vm address
    cr3:
        cr3 binary data                0x1085be003
        next entry physical address   0x1085be000
        ---
        bit  3          page level write through       False
        bit  4          page level cache disabled      False
    level 4:
        entry address                  0xffff8881085be7f8
        page entry binary data         0x800000010ac83067
        next entry physical address   0x10ac83000
        ---
        bit  0          entry present                  True
        bit  1          read/write access allowed      True
        bit  2          user access allowed            True
        bit  3          page level write through       False
        bit  4          page level cache disabled      False
        bit  5          entry has been accessed        True
        bit  7          page size                      False
        bit  11         restart to ordinary            False
        bit  63         execute disable                True
    level 3:
        entry address                  0xffff88810ac83a48
        page entry binary data         0x101af7067
        next entry physical address   0x101af7000
        ---
        bit  0          entry present                  True
        bit  1          read/write access allowed      True
        bit  2          user access allowed            True
        bit  3          page level write through       False
        bit  4          page level cache disabled      False
        bit  5          entry has been accessed        True
        bit  7          page size                      False
        bit  11         restart to ordinary            False
        bit  63         execute disable                False
    level 2:
        entry address                  0xffff888101af7368
        page entry binary data         0x80000001634008e7
        page size                      2MB
        page physical address         0x163400000
        ---
        bit  0          entry present                  True
        bit  1          read/write access allowed      True
        bit  2          user access allowed            True
        bit  3          page level write through       False
        bit  4          page level cache disabled      False
        bit  5          entry has been accessed        True
        bit  7          page size                      True
        bit  6          page dirty                     True
        bit  8          global translation             False
        bit  11         restart to ordinary            True
        bit  12         pat                            False
        bits (59, 62)   protection key                 0
        bit  63         execute disable                True

    [dmitrii.bundin.a@gmail.com: add SPDX line, other tweaks]
      Link: https://lkml.kernel.org/r/20230113175151.22278-1-dmitrii.bundin.a@gmail.com
    [akpm@linux-foundation.org: s/physicall/physical/]
    Link: https://lkml.kernel.org/r/20230102171014.31408-1-dmitrii.bundin.a@gmail.com
    Signed-off-by: Dmitrii Bundin <dmitrii.bundin.a@gmail.com>
    Acked by: Mike Rapoport (IBM) <rppt@kernel.org>
    Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: Jan Kiszka <jan.kiszka@siemens.com>
    Cc: Kieran Bingham <kbingham@kernel.org>
    Cc: Vlastimil Babka <vbabka@suse.cz>
    Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Mark Salter <msalter@redhat.com>
2024-10-31 10:35:25 -04:00