JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: 22a9120479a40a56c13c5e473a0100fad2e017c0
commit 22a9120479a40a56c13c5e473a0100fad2e017c0
Author: Siddharth Vadapalli <s-vadapalli@ti.com>
Date: Mon Nov 4 13:14:20 2024 +0530
PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS milliseconds
According to Section 2.2 of the PCI Express Card Electromechanical
Specification (Revision 5.1), in order to ensure that the power and the
reference clock are stable, PERST# has to be deasserted after a delay of
100 milliseconds (TPVPERL).
Currently, it is being assumed that the power is already stable, which
is not necessarily true.
Hence, change the delay to PCIE_T_PVPERL_MS to guarantee that power and
reference clock are stable.
Fixes: f3e25911a4 ("PCI: j721e: Add TI J721E PCIe driver")
Fixes: f96b69713733 ("PCI: j721e: Use T_PERST_CLK_US macro")
Link: https://lore.kernel.org/r/20241104074420.1862932-1-s-vadapalli@ti.com
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: c538d40f365b5b6d7433d371710f58e8b266fb19
commit c538d40f365b5b6d7433d371710f58e8b266fb19
Author: Théo Lebrun <theo.lebrun@bootlin.com>
Date: Wed Jun 19 12:15:15 2024 +0200
PCI: j721e: Add suspend and resume support
Add suspend and resume support. Only the Root Complex mode is supported.
During the suspend stage PERST# is asserted, then deasserted during the
resume stage.
Link: https://lore.kernel.org/linux-pci/20240102-j7200-pcie-s2r-v7-7-a2f9156da6c3@bootlin.com
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
[kwilczynski: commit log, update references to the PCI SIG specification]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: f96b6971373382855bc964f1c067bd6dc41cf0ab
commit f96b6971373382855bc964f1c067bd6dc41cf0ab
Author: Thomas Richard <thomas.richard@bootlin.com>
Date: Wed Jun 19 12:15:14 2024 +0200
PCI: j721e: Use T_PERST_CLK_US macro
Use the T_PERST_CLK_US macro, and the fsleep() function instead of
usleep_range().
Link: https://lore.kernel.org/linux-pci/20240102-j7200-pcie-s2r-v7-6-a2f9156da6c3@bootlin.com
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: b8600b8791cb2b7c8be894846b1ecddba7291680
commit b8600b8791cb2b7c8be894846b1ecddba7291680
Author: Théo Lebrun <theo.lebrun@bootlin.com>
Date: Wed Jun 19 12:15:12 2024 +0200
PCI: j721e: Add reset GPIO to struct j721e_pcie
Add reset GPIO to struct j721e_pcie, so it can be used at suspend and
resume stages.
Link: https://lore.kernel.org/linux-pci/20240102-j7200-pcie-s2r-v7-4-a2f9156da6c3@bootlin.com
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: 7d7ce746a9e109ab0aa30ad3c6107e601cf17045
commit 7d7ce746a9e109ab0aa30ad3c6107e601cf17045
Author: Thomas Richard <thomas.richard@bootlin.com>
Date: Wed Jun 19 12:15:11 2024 +0200
PCI: j721e: Use dev_err_probe() in the probe() function
Use dev_err_probe() instead of dev_err() in the probe() function to
simplify the code and standardize the error output.
Link: https://lore.kernel.org/linux-pci/20240102-j7200-pcie-s2r-v7-3-a2f9156da6c3@bootlin.com
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: 063c938928dc80c2bfd66f34df48344db22e009b
commit 063c938928dc80c2bfd66f34df48344db22e009b
Author: Thomas Richard <thomas.richard@bootlin.com>
Date: Wed Jun 19 12:15:10 2024 +0200
PCI: cadence: Set cdns_pcie_host_init() global
During the resume sequence of the host, cdns_pcie_host_init() needs to be
called, so set it global.
The dev function parameter is removed, as it isn't used.
Link: https://lore.kernel.org/linux-pci/20240102-j7200-pcie-s2r-v7-2-a2f9156da6c3@bootlin.com
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: d1b6f2e2ce4d8b17d9f3558c98a1517b864bfd03
commit d1b6f2e2ce4d8b17d9f3558c98a1517b864bfd03
Author: Thomas Richard <thomas.richard@bootlin.com>
Date: Wed Jun 19 12:15:09 2024 +0200
PCI: cadence: Extract link setup sequence from cdns_pcie_host_setup()
The function cdns_pcie_host_setup() mixes probe structure and link setup.
The link setup must be done during the resume sequence. So extract it from
cdns_pcie_host_setup() and create a dedicated function.
Link: https://lore.kernel.org/linux-pci/20240102-j7200-pcie-s2r-v7-1-a2f9156da6c3@bootlin.com
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: 82c4be4168e26a5593aaa1002b5678128a638824
commit 82c4be4168e26a5593aaa1002b5678128a638824
Author: Siddharth Vadapalli <s-vadapalli@ti.com>
Date: Thu Aug 29 16:23:16 2024 +0530
PCI: j721e: Enable ACSPCIE Refclk if "ti,syscon-acspcie-proxy-ctrl" exists
The ACSPCIE module is capable of driving the reference clock required by
the PCIe Endpoint device. It is an alternative to on-board and external
reference clock generators. Enabling the output from the ACSPCIE module's
PAD IO Buffers requires clearing the "PAD IO disable" bits of the
ACSPCIE_PROXY_CTRL register in the CTRL_MMR register space.
Add support to enable the ACSPCIE reference clock output using the optional
device-tree property "ti,syscon-acspcie-proxy-ctrl".
Link: https://lore.kernel.org/linux-pci/20240829105316.1483684-3-s-vadapalli@ti.com
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: c3d95aa93fd8549588097b0701b3835920fd8533
commit c3d95aa93fd8549588097b0701b3835920fd8533
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Tue Sep 3 15:31:33 2024 -0500
PCI: cadence: Drop excess cdns_pcie_rc.dev kerneldoc description
Struct cdns_pcie_rc once had a .dev member, but it was removed by
bd22885aa1 ("PCI: cadence: Refactor driver to use as a core library").
Drop the extra kerneldoc for it.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-50255
Upstream Status: a01e7214bef904723d26d293eb17586078610379
commit a01e7214bef904723d26d293eb17586078610379
Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Date: Wed Mar 27 14:43:37 2024 +0530
PCI: endpoint: Remove "core_init_notifier" flag
"core_init_notifier" flag is set by the glue drivers requiring refclk from
the host to complete the DWC core initialization. Also, those drivers will
send a notification to the EPF drivers once the initialization is fully
completed using the pci_epc_init_notify() API. Only then, the EPF drivers
will start functioning.
For the rest of the drivers generating refclk locally, EPF drivers will
start functioning post binding with them. EPF drivers rely on the
'core_init_notifier' flag to differentiate between the drivers.
Unfortunately, this creates two different flows for the EPF drivers.
So to avoid that, let's get rid of the "core_init_notifier" flag and follow
a single initialization flow for the EPF drivers. This is done by calling
the dw_pcie_ep_init_notify() from all glue drivers after the completion of
dw_pcie_ep_init_registers() API. This will allow all the glue drivers to
send the notification to the EPF drivers once the initialization is fully
completed.
Only difference here is that, the drivers requiring refclk from host will
send the notification once refclk is received, while others will send it
during probe time itself.
But this also requires the EPC core driver to deliver the notification
after EPF driver bind. Because, the glue driver can send the notification
before the EPF drivers bind() and in those cases the EPF drivers will miss
the event. To accommodate this, EPC core is now caching the state of the
EPC initialization in 'init_complete' flag and pci-ep-cfs driver sends the
notification to EPF drivers based on that after each EPF driver bind.
Link: https://lore.kernel.org/linux-pci/20240327-pci-dbi-rework-v12-8-082625472414@linaro.org
Tested-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-50255
Upstream Status: 07db0fa80cf311be17da55e01f99d455f83a7c7b
commit 07db0fa80cf311be17da55e01f99d455f83a7c7b
Author: Niklas Cassel <cassel@kernel.org>
Date: Wed Mar 20 12:31:53 2024 +0100
PCI: cadence: Set a 64-bit BAR if requested
Ever since commit f25b5fae29 ("PCI: endpoint: Setting a BAR size > 4 GB
is invalid if 64-bit flag is not set") it has been impossible to get the
.set_bar() callback with a BAR size > 2 GB (yes, 2GB!), if the BAR was
also not requested to be configured as a 64-bit BAR.
Thus, forcing setting the 64-bit flag for BARs larger than 2 GB in the
lower level driver is dead code and can be removed.
It is however possible that an EPF driver configures a BAR as 64-bit,
even if the requested size is < 4 GB.
Respect the requested BAR configuration, just like how it is already
respected with regards to the prefetchable bit.
Link: https://lore.kernel.org/linux-pci/20240320113157.322695-7-cassel@kernel.org
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-33544
Upstream Status: 667a006d73fb7320fc6f414b6fe11a998fcf0c28
commit 667a006d73fb7320fc6f414b6fe11a998fcf0c28
Author: Jasko-EXT Wojciech <wojciech.jasko-EXT@continental-corporation.com>
Date: Sat Dec 2 14:20:15 2023 +0530
PCI: cadence: Clear the ARI Capability Next Function Number of the last function
Next Function Number field in ARI Capability Register for last function
must be zero by default as per the PCIe specification, indicating there
is no next higher number function but that's not happening in our case,
so this patch clears the Next Function Number field for last function
used.
[kwilczynski: white spaces update for one define]
Link: https://lore.kernel.org/linux-pci/20231202085015.3048516-1-s-vadapalli@ti.com
Signed-off-by: Jasko-EXT Wojciech <wojciech.jasko-EXT@continental-corporation.com>
Signed-off-by: Achal Verma <a-verma1@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-28627
Upstream Status: 570e8579761a68d80c29034c291b34cff732d76d
commit 570e8579761a68d80c29034c291b34cff732d76d
Author: Damien Le Moal <dlemoal@kernel.org>
Date: Wed Nov 22 15:03:58 2023 +0900
PCI: cadence: Use INTX instead of legacy
In the Cadence endpoint controller driver, rename the function
cdns_pcie_ep_send_legacy_irq() to cdns_pcie_ep_send_intx_irq() to match
the macro PCI_IRQ_INTX name. Related comments and messages mentioning
"legacy" are also changed to refer to "intx".
Link: https://lore.kernel.org/r/20231122060406.14695-9-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-28627
Upstream Status: 74955cb8ccc38539f8c029336e07e6b43b6a942e
commit 74955cb8ccc38539f8c029336e07e6b43b6a942e
Author: Damien Le Moal <dlemoal@kernel.org>
Date: Wed Nov 22 15:03:52 2023 +0900
PCI: endpoint: Drop PCI_EPC_IRQ_XXX definitions
linux/pci.h defines the IRQ flags PCI_IRQ_INTX, PCI_IRQ_MSI and
PCI_IRQ_MSIX. Let's use these flags directly instead of the endpoint
definitions provided by enum pci_epc_irq_type. This removes the need
for defining this enum type completely.
Link: https://lore.kernel.org/r/20231122060406.14695-3-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-28627
Upstream Status: 177c9ac6ab3fa585608a16877b1fa1aad832571c
commit 177c9ac6ab3fa585608a16877b1fa1aad832571c
Author: Peter Robinson <pbrobinson@gmail.com>
Date: Thu Jan 4 21:39:06 2024 +0000
PCI: j721e: Make TI J721E depend on ARCH_K3
The J721E PCIe is hardware specific to TI SoC parts so add a dependency
on that so it's available for those SoC parts and for compile testing but
not necessarily everyone who enables the Cadence PCIe controller.
Link: https://lore.kernel.org/linux-pci/20240104213910.1426843-1-pbrobinson@gmail.com
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-28627
Upstream Status: 4490f559f75514d5a6f0e729e85235a7be6216bf
commit 4490f559f75514d5a6f0e729e85235a7be6216bf
Author: Matt Ranostay <mranostay@ti.com>
Date: Tue Nov 28 11:14:01 2023 +0530
PCI: j721e: Add PCIe 4x lane selection support
Add support for setting of two-bit field that allows selection of 4x lane
PCIe which was previously limited to only 2x lanes.
Link: https://lore.kernel.org/linux-pci/20231128054402.2155183-5-s-vadapalli@ti.com
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Signed-off-by: Achal Verma <a-verma1@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-28627
Upstream Status: 3ac7f14084f54bff9c31573d1ed59d047a34fe03
commit 3ac7f14084f54bff9c31573d1ed59d047a34fe03
Author: Matt Ranostay <mranostay@ti.com>
Date: Tue Nov 28 11:14:00 2023 +0530
PCI: j721e: Add per platform maximum lane settings
Various platforms have different maximum amount of lanes that can be
selected. Add max_lanes to struct j721e_pcie to allow for detection of this
which is needed to calculate the needed bitmask size for the possible lane
count.
Link: https://lore.kernel.org/linux-pci/20231128054402.2155183-4-s-vadapalli@ti.com
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Signed-off-by: Achal Verma <a-verma1@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-26162
Upstream Status: b09d0f98a434bd6b9b9e0fb63bebfcac5e1a679e
commit b09d0f98a434bd6b9b9e0fb63bebfcac5e1a679e
Author: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Date: Wed Oct 18 14:32:48 2023 +0300
PCI: cadence: Use FIELD_GET()
Convert open-coded variants of PCI field access into FIELD_GET() to
make the code easier to understand.
Link: https://lore.kernel.org/r/20231018113254.17616-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-26162
Upstream Status: e111ac7025cb8aff275dda40ca09f9de9f84b7e9
commit e111ac7025cb8aff275dda40ca09f9de9f84b7e9
Author: Li Chen <me@linux.beauty>
Date: Wed Jul 5 18:15:51 2023 +0800
PCI: cadence: Drop unused member from struct cdns_plat_pcie
The struct cdns_plat_pcie contains a member called is_rc that is not
being used beyond being assigned a value within the cdns_plat_pcie_probe()
function, which is then not used for anything.
Thus, drop is_rc from the struct cdns_plat_pcie, especially since there
already is an is_rc member within the struct cdns_plat_pcie_of_data that
is actively used to convey information about the PCIe controller mode.
[kwilczynski: commit log]
Signed-off-by: Li Chen <lchen@ambarella.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-15044
Upstream Status: c925cfaf0992f151c02f239e035ca9316224f224
commit c925cfaf0992f151c02f239e035ca9316224f224
Author: Rob Herring <robh@kernel.org>
Date: Fri Jul 14 11:48:25 2023 -0600
PCI: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus. As
part of that merge prepping Arm DT support 13 years ago, they "temporarily"
include each other. They also include platform_device.h and of.h. As a
result, there's a pretty much random mix of those include files used
throughout the tree. In order to detangle these headers and replace the
implicit includes with struct declarations, users need to explicitly
include the correct includes.
Link: https://lore.kernel.org/r/20230714174827.4061572-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-2570
Upstream Status: c86f4bd6008e7e9bd561e1f1ec3889cc0a5925e8
commit c86f4bd6008e7e9bd561e1f1ec3889cc0a5925e8
Author: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Date: Tue Mar 21 20:31:58 2023 +0100
PCI: j721e: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is (mostly) ignored
and this typically results in resource leaks. To improve here there is a
quest to make the remove callback return void. In the first step of this
quest all drivers are converted to .remove_new() which already returns
void.
Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.
[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20230321193208.366561-6-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
JIRA: https://issues.redhat.com/browse/RHEL-2570
Upstream Status: 0e12f830236928b6fadf40d917a7527f0a048d2f
commit 0e12f830236928b6fadf40d917a7527f0a048d2f
Author: Siddharth Vadapalli <s-vadapalli@ti.com>
Date: Wed Mar 15 12:38:00 2023 +0530
PCI: cadence: Fix Gen2 Link Retraining process
The Link Retraining process is initiated to account for the Gen2 defect in
the Cadence PCIe controller in J721E SoC. The errata corresponding to this
is i2085, documented at:
https://www.ti.com/lit/er/sprz455c/sprz455c.pdf
The existing workaround implemented for the errata waits for the Data Link
initialization to complete and assumes that the link retraining process
at the Physical Layer has completed. However, it is possible that the
Physical Layer training might be ongoing as indicated by the
PCI_EXP_LNKSTA_LT bit in the PCI_EXP_LNKSTA register.
Fix the existing workaround, to ensure that the Physical Layer training
has also completed, in addition to the Data Link initialization.
Link: https://lore.kernel.org/r/20230315070800.1615527-1-s-vadapalli@ti.com
Fixes: 4740b969aa ("PCI: cadence: Retrain Link to work around Gen2 training defect")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2228915
Upstream Status: 80c170d7b13d0a46a46f869774baf3c02d775654
Conflict(s):
Patching file drivers/pci/controller/Kconfig: Hunk #8 FAILED at 274.
This is due to RHEL not having taken in upstream commit 7bb49d774f48
(" arm64: bcmbca: Make BCM4908 drivers depend on ARCH_BCMBCA").
Patching file drivers/pci/controller/dwc/Kconfig: Hunk #6 FAILED at 95,
Hunk #7 FAILED at 107. These are both due to RHEL not having taken in
upstream commit 75c2f26da03f ("PCI: imx6: Add i.MX PCIe EP mode
support").
commit 80c170d7b13d0a46a46f869774baf3c02d775654
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Tue Apr 18 12:43:33 2023 -0500
PCI: Use consistent controller Kconfig menu entry language
Use "PCIe controller" consistently instead of "host bridge", "bus driver",
etc. Annotate with "(host mode)" or "(endpoint mode)" as needed.
Link: https://lore.kernel.org/r/20230418174336.145585-5-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2124638
Upstream Status: 19b7858c3357df038d896c10e0d5e4572a77dd25
commit 19b7858c3357df038d896c10e0d5e4572a77dd25
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Tue Jul 19 16:13:25 2022 -0500
PCI: Convert to new *_PM_OPS macros
Replace SET_*_PM_OPS with *_PM_OPS, which which have the advantage that the
compiler always sees the PM callbacks as referenced, so they don't need to
be wrapped with "#ifdef CONFIG_PM_SLEEP" or tagged with "__maybe_unused" to
avoid "defined but not used" warnings.
See 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old ones").
Link: https://lore.kernel.org/r/20220719215108.1583108-1-helgaas@kernel.org
Tested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Pali Rohár <pali@kernel.org> # pci-mvebu.c
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2118429
Upstream Status: 95b00f68209e2bc9f2ee9126afcebab451e0e9d8
commit 95b00f68209e2bc9f2ee9126afcebab451e0e9d8
Author: Parshuram Thombare <pthombar@cadence.com>
Date: Mon Oct 25 05:31:15 2021 -0700
PCI: cadence: Clear FLR in device capabilities register
Clear FLR (Function Level Reset) from device capabilities
registers for all physical functions.
During FLR, the Margining Lane Status and Margining Lane Control
registers should not be reset, as per PCIe specification.
However, the controller incorrectly resets these registers upon FLR.
This causes PCISIG compliance FLR test to fail. Hence preventing
all functions from advertising FLR support if flag quirk_disable_flr
is set.
Link: https://lore.kernel.org/r/1635165075-89864-1-git-send-email-pthombar@cadence.com
Signed-off-by: Parshuram Thombare <pthombar@cadence.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2118429
Upstream Status: a1f67bc131c3935f325513cd153249fdbc22ac5b
commit a1f67bc131c3935f325513cd153249fdbc22ac5b
Author: Christian Gmeiner <christian.gmeiner@gmail.com>
Date: Thu May 12 07:55:38 2022 +0200
PCI: cadence: Allow PTM Responder to be enabled
This enables the Controller [RP] to automatically respond with
Response/ResponseD messages if CDNS_PCIE_LM_TPM_CTRL_PTMRSEN
and PCI_PTM_CTRL_ENABLE bits are both set.
Link: https://lore.kernel.org/r/20220512055539.1782437-1-christian.gmeiner@gmail.com
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2118429
Upstream Status: 0aa3a0937feeb91a0e4e438c3c063b749b194192
commit 0aa3a0937feeb91a0e4e438c3c063b749b194192
Author: Dan Carpenter <dan.carpenter@oracle.com>
Date: Tue Mar 15 09:58:29 2022 +0300
PCI: cadence: Fix find_first_zero_bit() limit
The ep->ob_region_map bitmap is a long and it has BITS_PER_LONG bits.
Link: https://lore.kernel.org/r/20220315065829.GA13572@kili
Fixes: 37dddf14f1 ("PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2066898
Upstream Status: 053ca37c87af65f41f5842070c68aa53c3d035f5
commit 053ca37c87af65f41f5842070c68aa53c3d035f5
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu Jan 27 15:49:49 2022 -0600
PCI: j721e: Initialize pcie->cdns_pcie before using it
Christian reported a NULL pointer dereference in j721e_pcie_probe() caused
by 19e863828acf ("PCI: j721e: Drop redundant struct device *"), which
removed struct j721e_pcie.dev since there's another copy in struct
cdns_pcie.dev reachable via j721e_pcie->cdns_pcie->dev.
The problem is that j721e_pcie->cdns_pcie was dereferenced before being
initialized:
j721e_pcie_probe
pcie = devm_kzalloc() # struct j721e_pcie
j721e_pcie_ctrl_init(pcie)
dev = pcie->cdns_pcie->dev <-- dereference cdns_pcie
switch (mode) {
case PCI_MODE_RC:
cdns_pcie = ... # alloc as part of pci_host_bridge
pcie->cdns_pcie = cdns_pcie <-- initialize pcie->cdns_pcie
Move the cdns_pcie initialization earlier so it is done before it is used.
This also simplifies the error exits.
Fixes: 19e863828acf ("PCI: j721e: Drop redundant struct device *")
Link: https://lore.kernel.org/r/20220127222951.GA144828@bhelgaas
Link: https://lore.kernel.org/r/20220124122132.435743-1-christian.gmeiner@gmail.com
Reported-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2066898
Upstream Status: 19e863828acf6d8ac8475ba1fd93c0fe17fdc4ef
commit 19e863828acf6d8ac8475ba1fd93c0fe17fdc4ef
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Wed Dec 22 19:10:40 2021 -0600
PCI: j721e: Drop redundant struct device *
The struct cdns_pcie already contains the struct device for the j721e PCIe
controller. There's no need to store another copy in struct j721e_pcie.
Remove the redundant copy from struct j721e_pcie.
Link: https://lore.kernel.org/r/20211223011054.1227810-10-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tom Joseph <tjoseph@cadence.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2066898
Upstream Status: 72de208f2bda3c6a0d99e744ce7bedf3d3b8011a
commit 72de208f2bda3c6a0d99e744ce7bedf3d3b8011a
Author: Bjorn Helgaas <bhelgaas@google.com>
Date: Wed Dec 22 19:10:39 2021 -0600
PCI: j721e: Drop pointless of_device_get_match_data() cast
of_device_get_match_data() returns "void *", so no cast is needed when
assigning the result to a pointer type. Drop the unnecessary cast.
Link: https://lore.kernel.org/r/20211223011054.1227810-9-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tom Joseph <tjoseph@cadence.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2066898
Upstream Status: 131748ad2939dfaf20b3178112dbd52591d39148
commit 131748ad2939dfaf20b3178112dbd52591d39148
Author: Fan Fei <ffclaire1224@gmail.com>
Date: Wed Dec 22 19:10:34 2021 -0600
PCI: cadence: Prefer of_device_get_match_data()
The cadence driver only needs the device data, not the whole struct
of_device_id. Use of_device_get_match_data() instead of of_match_device().
No functional change intended.
[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20211223011054.1227810-4-helgaas@kernel.org
Signed-off-by: Fan Fei <ffclaire1224@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Tom Joseph <tjoseph@cadence.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2066898
Upstream Status: ccd36795be48956248dc308f4525c06c7f419d76
commit ccd36795be48956248dc308f4525c06c7f419d76
Author: Krzysztof Wilczyński <kw@linux.com>
Date: Fri Jan 7 22:59:42 2022 +0000
PCI: Correct misspelled words
Fix a number of misspelled words, and while at it, correct two phrases used
to indicate a status of an operation where words used have been cleverly
truncated and thus always trigger a spellchecking error while performing a
static code analysis over the PCI tree.
[bhelgaas: reverse sense of quirk ternary]
Link: https://lore.kernel.org/r/20220107225942.121484-1-kw@linux.com
Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2052155
Upstream Status: 496bb18483cc0474913e81e18a6b313aaea4c120
commit 496bb18483cc0474913e81e18a6b313aaea4c120
Author: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Date: Sun Jun 27 13:46:24 2021 +0200
PCI: j721e: Fix j721e_pcie_probe() error path
If an error occurs after a successful cdns_pcie_init_phy() call, it must be
undone by a cdns_pcie_disable_phy() call, as already done above and below.
Update the goto to branch at the correct place of the error handling path.
Link: https://lore.kernel.org/r/db477b0cb444891a17c4bb424467667dc30d0bab.1624794264.git.christophe.jaillet@wanadoo.fr
Fixes: 49e0efdce7 ("PCI: j721e: Add support to provide refclk to PCIe connector")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2045254
Upstream Status: e19a0adf6e8bb0b93a546b8d4c7f8f6891115bbb
commit e19a0adf6e8bb0b93a546b8d4c7f8f6891115bbb
Author: Kishon Vijay Abraham I <kishon@ti.com>
Date: Thu Aug 19 18:03:41 2021 +0530
PCI: cadence: Add support to configure virtual functions
Now that support for SR-IOV is added in PCIe endpoint core, add support
to configure virtual functions in the Cadence PCIe EP driver.
Link: https://lore.kernel.org/r/20210819123343.1951-7-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2045254
Upstream Status: 0cf985d6119cc21fc39774b4b29dcf1e0148bf55
commit 0cf985d6119cc21fc39774b4b29dcf1e0148bf55
Author: Kishon Vijay Abraham I <kishon@ti.com>
Date: Thu Aug 19 18:03:40 2021 +0530
PCI: cadence: Simplify code to get register base address for configuring BAR
No functional change. Simplify code to get register base address for
configuring PCI BAR.
Link: https://lore.kernel.org/r/20210819123343.1951-6-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2045254
Upstream Status: 53fd3cbe5e9d791d6bb6059f73a3851f155ce7c6
commit 53fd3cbe5e9d791d6bb6059f73a3851f155ce7c6
Author: Kishon Vijay Abraham I <kishon@ti.com>
Date: Thu Aug 19 18:03:39 2021 +0530
PCI: endpoint: Add virtual function number in pci_epc ops
Add virtual function number in pci_epc ops. EPC controller driver
can perform virtual function specific initialization based on the
virtual function number.
Link: https://lore.kernel.org/r/20210819123343.1951-5-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2045254
Upstream Status: c8a375a8e15ac31293d7fda08008d6da8f5df3db
commit c8a375a8e15ac31293d7fda08008d6da8f5df3db
Author: Kishon Vijay Abraham I <kishon@ti.com>
Date: Wed Aug 11 18:03:35 2021 +0530
PCI: j721e: Add PCIe support for AM64
AM64 has the same PCIe IP as in J7200 with certain erratas not
applicable (quirk_detect_quiet_flag). Add support for "ti,am64-pcie-host"
compatible and "ti,am64-pcie-ep" compatible that is specific to AM64.
Link: https://lore.kernel.org/r/20210811123336.31357-5-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2045254
Upstream Status: f1de58802f0fff364cf49f5e47d1be744baa434f
commit f1de58802f0fff364cf49f5e47d1be744baa434f
Author: Kishon Vijay Abraham I <kishon@ti.com>
Date: Wed Aug 11 18:03:34 2021 +0530
PCI: j721e: Add PCIe support for J7200
J7200 has the same PCIe IP as in J721E with minor changes in the
wrapper. J7200 allows byte access of bridge configuration space
registers and the register field for LINK_DOWN interrupt is different.
J7200 also requires "quirk_detect_quiet_flag" to be set. Configure these
changes as part of driver data applicable only to J7200.
Link: https://lore.kernel.org/r/20210811123336.31357-4-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2045254
Upstream Status: 09c24094b2e3a15ef3fc44f54a191b3db522fb11
commit 09c24094b2e3a15ef3fc44f54a191b3db522fb11
Author: Nadeem Athani <nadeem@cadence.com>
Date: Wed Aug 11 18:03:33 2021 +0530
PCI: cadence: Add quirk flag to set minimum delay in LTSSM Detect.Quiet state
PCIe fails to link up if SERDES lanes not used by PCIe are assigned to
another protocol. For example, link training fails if lanes 2 and 3 are
assigned to another protocol while lanes 0 and 1 are used for PCIe to
form a two lane link. This failure is due to an incorrect tie-off on an
internal status signal indicating electrical idle.
Status signals going from SERDES to PCIe Controller are tied-off when a
lane is not assigned to PCIe. Signal indicating electrical idle is
incorrectly tied-off to a state that indicates non-idle. As a result,
PCIe sees unused lanes to be out of electrical idle and this causes
LTSSM to exit Detect.Quiet state without waiting for 12ms timeout to
occur. If a receiver is not detected on the first receiver detection
attempt in Detect.Active state, LTSSM goes back to Detect.Quiet and
again moves forward to Detect.Active state without waiting for 12ms as
required by PCIe base specification. Since wait time in Detect.Quiet is
skipped, multiple receiver detect operations are performed back-to-back
without allowing time for capacitance on the transmit lines to
discharge. This causes subsequent receiver detection to always fail even
if a receiver gets connected eventually.
Add a quirk flag "quirk_detect_quiet_flag" to program the minimum
time the LTSSM should wait on entering Detect.Quiet state here.
This has to be set for J7200 as it has an incorrect tie-off on unused
lanes.
Link: https://lore.kernel.org/r/20210811123336.31357-3-kishon@ti.com
Signed-off-by: Nadeem Athani <nadeem@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2045254
Upstream Status: f4455748b2126a9ba2bcc9cfb2fbcaa08de29bb2
commit f4455748b2126a9ba2bcc9cfb2fbcaa08de29bb2
Author: Kishon Vijay Abraham I <kishon@ti.com>
Date: Wed Aug 11 18:03:32 2021 +0530
PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool
No functional change. As we are intending to add additional 1-bit
members in struct j721e_pcie_data/struct cdns_pcie_rc, use bitfields
instead of bool since it takes less space. As discussed in [1],
the preference is to use bitfileds instead of bool inside structures.
[1] -> https://lore.kernel.org/linux-fsdevel/CA+55aFzKQ6Pj18TB8p4Yr0M4t+S+BsiHH=BJNmn=76-NcjTj-g@mail.gmail.com/
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20210811123336.31357-2-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Myron Stowe <mstowe@redhat.com>
- Add DT binding and TI j721e support for refclk to PCIe connector (Kishon
Vijay Abraham I)
- Add host mode and endpoint mode DT bindings for TI AM64 SoC (Kishon Vijay
Abraham I)
* remotes/lorenzo/pci/cadence:
PCI: j721e: Add support to provide refclk to PCIe connector
dt-bindings: PCI: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC
dt-bindings: PCI: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC
dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
list_sort() internally casts the comparison function passed to it
to a different type with constant struct list_head pointers, and
uses this pointer to call the functions, which trips indirect call
Control-Flow Integrity (CFI) checking.
Instead of removing the consts, this change defines the
list_cmp_func_t type and changes the comparison function types of
all list_sort() callers to use const pointers, thus avoiding type
mismatches.
Suggested-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20210408182843.1754385-10-samitolvanen@google.com
Myron Stowe
Krzysztof Wilczyński
Linus Torvalds
Bjorn Helgaas
Sami Tolvanen
Kishon Vijay Abraham I