PCI: xilinx-nwl: Fix register misspelling

JIRA: https://issues.redhat.com/browse/RHEL-67693
Upstream Status: a437027ae1730b8dc379c75fa0dd7d3036917400

commit a437027ae1730b8dc379c75fa0dd7d3036917400
Author: Sean Anderson <sean.anderson@linux.dev>
Date:   Fri May 31 12:13:33 2024 -0400

    PCI: xilinx-nwl: Fix register misspelling

    MSIC -> MISC

    Fixes: c2a7ff18ed ("PCI: xilinx-nwl: Expand error logging")
    Link: https://lore.kernel.org/r/20240531161337.864994-4-sean.anderson@linux.dev
    Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Signed-off-by: Myron Stowe <mstowe@redhat.com>
This commit is contained in:
Myron Stowe 2025-02-17 12:49:34 -07:00
parent 284e9a6330
commit c57df88476
1 changed files with 6 additions and 6 deletions

View File

@ -80,8 +80,8 @@
#define MSGF_MISC_SR_NON_FATAL_DEV BIT(22)
#define MSGF_MISC_SR_FATAL_DEV BIT(23)
#define MSGF_MISC_SR_LINK_DOWN BIT(24)
#define MSGF_MSIC_SR_LINK_AUTO_BWIDTH BIT(25)
#define MSGF_MSIC_SR_LINK_BWIDTH BIT(26)
#define MSGF_MISC_SR_LINK_AUTO_BWIDTH BIT(25)
#define MSGF_MISC_SR_LINK_BWIDTH BIT(26)
#define MSGF_MISC_SR_MASKALL (MSGF_MISC_SR_RXMSG_AVAIL | \
MSGF_MISC_SR_RXMSG_OVER | \
@ -96,8 +96,8 @@
MSGF_MISC_SR_NON_FATAL_DEV | \
MSGF_MISC_SR_FATAL_DEV | \
MSGF_MISC_SR_LINK_DOWN | \
MSGF_MSIC_SR_LINK_AUTO_BWIDTH | \
MSGF_MSIC_SR_LINK_BWIDTH)
MSGF_MISC_SR_LINK_AUTO_BWIDTH | \
MSGF_MISC_SR_LINK_BWIDTH)
/* Legacy interrupt status mask bits */
#define MSGF_LEG_SR_INTA BIT(0)
@ -299,10 +299,10 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, void *data)
if (misc_stat & MSGF_MISC_SR_FATAL_DEV)
dev_err(dev, "Fatal Error Detected\n");
if (misc_stat & MSGF_MSIC_SR_LINK_AUTO_BWIDTH)
if (misc_stat & MSGF_MISC_SR_LINK_AUTO_BWIDTH)
dev_info(dev, "Link Autonomous Bandwidth Management Status bit set\n");
if (misc_stat & MSGF_MSIC_SR_LINK_BWIDTH)
if (misc_stat & MSGF_MISC_SR_LINK_BWIDTH)
dev_info(dev, "Link Bandwidth Management Status bit set\n");
/* Clear misc interrupt status */