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gpio: pl061: Make the irqchip immutable 

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2071835
Tested: This is one of a series of patch sets to enable Arm SystemReady IR
 support in the kernel for NXP i.MX8 platforms.  This set updates GPIO
 support.  It has been tested via simple boot tests and by using the
 kernel GPIO tools to verify pins are being identified and can be used.

commit 15d8c14ac849f41f2d41dbddb69f402aaf73ff8b
Author: Marc Zyngier <maz@kernel.org>
Date:   Tue Apr 19 15:18:41 2022 +0100

    gpio: pl061: Make the irqchip immutable

    Prevent gpiolib from messing with the irqchip by advertising
    the irq_chip structure as immutable, making it const, and adding
    the various calls that gpiolib relies upon.

    Reviewed-by: Bartosz Golaszewski <brgl@bgdev.pl>
    Signed-off-by: Marc Zyngier <maz@kernel.org>
    Link: https://lore.kernel.org/r/20220419141846.598305-6-maz@kernel.org
    (cherry picked from commit 15d8c14ac849f41f2d41dbddb69f402aaf73ff8b)

Signed-off-by: Al Stone <ahs3@redhat.com>
This commit is contained in:
Al Stone 2022-08-24 13:28:50 -06:00
parent 1338d64c0c
commit 73515ef59b
1 changed files with 23 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
drivers/gpio/gpio-pl061.c
View File

@ -52,7 +52,6 @@ struct pl061 {
void __iomem *base;
struct gpio_chip gc;
struct irq_chip irq_chip;
int parent_irq;
#ifdef CONFIG_PM
@ -241,6 +240,8 @@ static void pl061_irq_mask(struct irq_data *d)
gpioie = readb(pl061->base + GPIOIE) & ~mask;
writeb(gpioie, pl061->base + GPIOIE);
raw_spin_unlock(&pl061->lock);
gpiochip_disable_irq(gc, d->hwirq);
}
static void pl061_irq_unmask(struct irq_data *d)
@ -250,6 +251,8 @@ static void pl061_irq_unmask(struct irq_data *d)
u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
u8 gpioie;
gpiochip_enable_irq(gc, d->hwirq);
raw_spin_lock(&pl061->lock);
gpioie = readb(pl061->base + GPIOIE) | mask;
writeb(gpioie, pl061->base + GPIOIE);
@ -283,6 +286,24 @@ static int pl061_irq_set_wake(struct irq_data *d, unsigned int state)
return irq_set_irq_wake(pl061->parent_irq, state);
}
static void pl061_irq_print_chip(struct irq_data *data, struct seq_file *p)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
seq_printf(p, dev_name(gc->parent));
}
static const struct irq_chip pl061_irq_chip = {
.irq_ack = pl061_irq_ack,
.irq_mask = pl061_irq_mask,
.irq_unmask = pl061_irq_unmask,
.irq_set_type = pl061_irq_type,
.irq_set_wake = pl061_irq_set_wake,
.irq_print_chip = pl061_irq_print_chip,
.flags = IRQCHIP_IMMUTABLE,
GPIOCHIP_IRQ_RESOURCE_HELPERS,
};
static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
{
struct device *dev = &adev->dev;
@ -315,13 +336,6 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
/*
* irq_chip support
*/
pl061->irq_chip.name = dev_name(dev);
pl061->irq_chip.irq_ack = pl061_irq_ack;
pl061->irq_chip.irq_mask = pl061_irq_mask;
pl061->irq_chip.irq_unmask = pl061_irq_unmask;
pl061->irq_chip.irq_set_type = pl061_irq_type;
pl061->irq_chip.irq_set_wake = pl061_irq_set_wake;
writeb(0, pl061->base + GPIOIE); /* disable irqs */
irq = adev->irq[0];
if (!irq)
@ -329,7 +343,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
pl061->parent_irq = irq;
girq = &pl061->gc.irq;
girq->chip = &pl061->irq_chip;
gpio_irq_chip_set_chip(girq, &pl061_irq_chip);
girq->parent_handler = pl061_irq_handler;
girq->num_parents = 1;
girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),