MIPS: Set `si_code' for SIGFPE signals sent from emulation too
Rework `process_fpemu_return' and move IEEE 754 exception interpretation there, from `do_fpe'. Record the cause bits set in FCSR before they are cleared and pass them through to `process_fpemu_return' so as to set `si_code' correctly too for SIGFPE signals sent from emulation rather than those issued by hardware with the FPE processor exception only. For simplicity `mipsr2_decoder' assumes `*fcr31' has been preinitialised and only sets it to anything if an FPU instruction has been emulated, which in turn is the only case SIGFPE can be issued for here. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
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443c44032a
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304acb717e
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@ -66,7 +66,8 @@ extern int do_dsemulret(struct pt_regs *xcp);
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extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
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extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
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struct mips_fpu_struct *ctx, int has_fpu,
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struct mips_fpu_struct *ctx, int has_fpu,
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void *__user *fault_addr);
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void *__user *fault_addr);
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int process_fpemu_return(int sig, void __user *fault_addr);
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int process_fpemu_return(int sig, void __user *fault_addr,
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unsigned long fcr31);
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int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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unsigned long *contpc);
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unsigned long *contpc);
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@ -84,11 +84,16 @@ extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
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#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR
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#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR
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static int mipsr2_emulation;
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static int mipsr2_emulation;
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static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst) { return 0; };
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static inline int mipsr2_decoder(struct pt_regs *regs, u32 inst,
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unsigned long *fcr31)
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{
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return 0;
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};
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#else
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#else
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/* MIPS R2 Emulator ON/OFF */
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/* MIPS R2 Emulator ON/OFF */
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extern int mipsr2_emulation;
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extern int mipsr2_emulation;
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extern int mipsr2_decoder(struct pt_regs *regs, u32 inst);
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extern int mipsr2_decoder(struct pt_regs *regs, u32 inst,
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unsigned long *fcr31);
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#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */
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#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */
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#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation)
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#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation)
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@ -898,8 +898,9 @@ static inline int mipsr2_find_op_func(struct pt_regs *regs, u32 inst,
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* mipsr2_decoder: Decode and emulate a MIPS R2 instruction
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* mipsr2_decoder: Decode and emulate a MIPS R2 instruction
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* @regs: Process register set
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* @regs: Process register set
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* @inst: Instruction to decode and emulate
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* @inst: Instruction to decode and emulate
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* @fcr31: Floating Point Control and Status Register returned
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*/
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*/
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int mipsr2_decoder(struct pt_regs *regs, u32 inst)
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int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31)
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{
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{
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int err = 0;
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int err = 0;
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unsigned long vaddr;
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unsigned long vaddr;
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@ -1168,6 +1169,7 @@ fpu_emul:
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err = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 0,
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err = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 0,
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&fault_addr);
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&fault_addr);
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*fcr31 = current->thread.fpu.fcr31;
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/*
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/*
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* We can't allow the emulated instruction to leave any of
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* We can't allow the emulated instruction to leave any of
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@ -700,29 +700,60 @@ asmlinkage void do_ov(struct pt_regs *regs)
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exception_exit(prev_state);
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exception_exit(prev_state);
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}
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}
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int process_fpemu_return(int sig, void __user *fault_addr)
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int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcr31)
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{
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{
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if (sig == SIGSEGV || sig == SIGBUS) {
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struct siginfo si = { 0 };
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struct siginfo si = {0};
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switch (sig) {
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case 0:
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return 0;
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case SIGFPE:
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si.si_addr = fault_addr;
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si.si_signo = sig;
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/*
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* Inexact can happen together with Overflow or Underflow.
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* Respect the mask to deliver the correct exception.
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*/
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fcr31 &= (fcr31 & FPU_CSR_ALL_E) <<
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(ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E));
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if (fcr31 & FPU_CSR_INV_X)
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si.si_code = FPE_FLTINV;
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else if (fcr31 & FPU_CSR_DIV_X)
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si.si_code = FPE_FLTDIV;
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else if (fcr31 & FPU_CSR_OVF_X)
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si.si_code = FPE_FLTOVF;
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else if (fcr31 & FPU_CSR_UDF_X)
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si.si_code = FPE_FLTUND;
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else if (fcr31 & FPU_CSR_INE_X)
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si.si_code = FPE_FLTRES;
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else
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si.si_code = __SI_FAULT;
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force_sig_info(sig, &si, current);
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return 1;
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case SIGBUS:
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si.si_addr = fault_addr;
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si.si_signo = sig;
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si.si_code = BUS_ADRERR;
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force_sig_info(sig, &si, current);
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return 1;
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case SIGSEGV:
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si.si_addr = fault_addr;
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si.si_addr = fault_addr;
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si.si_signo = sig;
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si.si_signo = sig;
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if (sig == SIGSEGV) {
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down_read(¤t->mm->mmap_sem);
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down_read(¤t->mm->mmap_sem);
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if (find_vma(current->mm, (unsigned long)fault_addr))
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if (find_vma(current->mm, (unsigned long)fault_addr))
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si.si_code = SEGV_ACCERR;
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si.si_code = SEGV_ACCERR;
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else
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else
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si.si_code = SEGV_MAPERR;
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si.si_code = SEGV_MAPERR;
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up_read(¤t->mm->mmap_sem);
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up_read(¤t->mm->mmap_sem);
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} else {
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si.si_code = BUS_ADRERR;
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}
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force_sig_info(sig, &si, current);
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force_sig_info(sig, &si, current);
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return 1;
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return 1;
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} else if (sig) {
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default:
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force_sig(sig, current);
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force_sig(sig, current);
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return 1;
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return 1;
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} else {
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return 0;
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}
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}
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}
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}
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@ -730,7 +761,8 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode,
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unsigned long old_epc, unsigned long old_ra)
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unsigned long old_epc, unsigned long old_ra)
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{
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{
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union mips_instruction inst = { .word = opcode };
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union mips_instruction inst = { .word = opcode };
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void __user *fault_addr = NULL;
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void __user *fault_addr;
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unsigned long fcr31;
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int sig;
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int sig;
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/* If it's obviously not an FP instruction, skip it */
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/* If it's obviously not an FP instruction, skip it */
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@ -760,6 +792,7 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode,
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/* Run the emulator */
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/* Run the emulator */
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sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1,
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sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1,
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&fault_addr);
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&fault_addr);
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fcr31 = current->thread.fpu.fcr31;
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/*
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/*
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* We can't allow the emulated instruction to leave any of
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* We can't allow the emulated instruction to leave any of
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@ -767,12 +800,12 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode,
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*/
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*/
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current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
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current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
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/* If something went wrong, signal */
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process_fpemu_return(sig, fault_addr);
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/* Restore the hardware register state */
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/* Restore the hardware register state */
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own_fpu(1);
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own_fpu(1);
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/* Send a signal if required. */
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process_fpemu_return(sig, fault_addr, fcr31);
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return 0;
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return 0;
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}
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}
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@ -782,7 +815,8 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode,
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asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
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asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
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{
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{
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enum ctx_state prev_state;
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enum ctx_state prev_state;
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siginfo_t info = {0};
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void __user *fault_addr;
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int sig;
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prev_state = exception_enter();
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prev_state = exception_enter();
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if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs),
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if (notify_die(DIE_FP, "FP exception", regs, 0, regs_to_trapnr(regs),
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@ -791,9 +825,6 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
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die_if_kernel("FP exception in kernel code", regs);
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die_if_kernel("FP exception in kernel code", regs);
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if (fcr31 & FPU_CSR_UNI_X) {
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if (fcr31 & FPU_CSR_UNI_X) {
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int sig;
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void __user *fault_addr = NULL;
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/*
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/*
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* Unimplemented operation exception. If we've got the full
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* Unimplemented operation exception. If we've got the full
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* software emulator on-board, let's use it...
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* software emulator on-board, let's use it...
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@ -810,6 +841,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
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/* Run the emulator */
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/* Run the emulator */
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sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1,
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sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1,
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&fault_addr);
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&fault_addr);
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fcr31 = current->thread.fpu.fcr31;
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/*
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/*
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* We can't allow the emulated instruction to leave any of
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* We can't allow the emulated instruction to leave any of
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@ -819,35 +851,13 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
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/* Restore the hardware register state */
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/* Restore the hardware register state */
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own_fpu(1); /* Using the FPU again. */
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own_fpu(1); /* Using the FPU again. */
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} else {
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/* If something went wrong, signal */
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sig = SIGFPE;
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process_fpemu_return(sig, fault_addr);
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fault_addr = (void __user *) regs->cp0_epc;
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goto out;
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}
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}
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/*
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/* Send a signal if required. */
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* Inexact can happen together with Overflow or Underflow.
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process_fpemu_return(sig, fault_addr, fcr31);
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* Respect the mask to deliver the correct exception.
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*/
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fcr31 &= (fcr31 & FPU_CSR_ALL_E) <<
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(ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E));
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if (fcr31 & FPU_CSR_INV_X)
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info.si_code = FPE_FLTINV;
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else if (fcr31 & FPU_CSR_DIV_X)
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info.si_code = FPE_FLTDIV;
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else if (fcr31 & FPU_CSR_OVF_X)
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info.si_code = FPE_FLTOVF;
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else if (fcr31 & FPU_CSR_UDF_X)
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info.si_code = FPE_FLTUND;
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else if (fcr31 & FPU_CSR_INE_X)
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info.si_code = FPE_FLTRES;
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else
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info.si_code = __SI_FAULT;
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info.si_signo = SIGFPE;
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info.si_errno = 0;
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info.si_addr = (void __user *) regs->cp0_epc;
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force_sig_info(SIGFPE, &info, current);
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out:
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out:
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exception_exit(prev_state);
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exception_exit(prev_state);
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@ -1050,7 +1060,9 @@ asmlinkage void do_ri(struct pt_regs *regs)
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if (mipsr2_emulation && cpu_has_mips_r6 &&
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if (mipsr2_emulation && cpu_has_mips_r6 &&
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likely(user_mode(regs)) &&
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likely(user_mode(regs)) &&
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likely(get_user(opcode, epc) >= 0)) {
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likely(get_user(opcode, epc) >= 0)) {
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status = mipsr2_decoder(regs, opcode);
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unsigned long fcr31 = 0;
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status = mipsr2_decoder(regs, opcode, &fcr31);
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switch (status) {
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switch (status) {
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case 0:
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case 0:
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case SIGEMT:
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case SIGEMT:
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@ -1060,7 +1072,8 @@ asmlinkage void do_ri(struct pt_regs *regs)
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goto no_r2_instr;
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goto no_r2_instr;
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default:
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default:
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process_fpemu_return(status,
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process_fpemu_return(status,
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¤t->thread.cp0_baduaddr);
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¤t->thread.cp0_baduaddr,
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fcr31);
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task_thread_info(current)->r2_emul_return = 1;
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task_thread_info(current)->r2_emul_return = 1;
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return;
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return;
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}
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}
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@ -1307,10 +1320,13 @@ asmlinkage void do_cpu(struct pt_regs *regs)
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enum ctx_state prev_state;
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enum ctx_state prev_state;
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unsigned int __user *epc;
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unsigned int __user *epc;
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unsigned long old_epc, old31;
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unsigned long old_epc, old31;
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void __user *fault_addr;
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unsigned int opcode;
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unsigned int opcode;
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unsigned long fcr31;
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unsigned int cpid;
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unsigned int cpid;
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int status, err;
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int status, err;
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unsigned long __maybe_unused flags;
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unsigned long __maybe_unused flags;
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int sig;
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prev_state = exception_enter();
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prev_state = exception_enter();
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cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
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cpid = (regs->cp0_cause >> CAUSEB_CE) & 3;
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@ -1384,12 +1400,12 @@ asmlinkage void do_cpu(struct pt_regs *regs)
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case 1:
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case 1:
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err = enable_restore_fp_context(0);
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err = enable_restore_fp_context(0);
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if (!raw_cpu_has_fpu || err) {
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if (raw_cpu_has_fpu && !err)
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int sig;
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break;
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void __user *fault_addr = NULL;
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sig = fpu_emulator_cop1Handler(regs,
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sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 0,
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¤t->thread.fpu,
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&fault_addr);
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0, &fault_addr);
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fcr31 = current->thread.fpu.fcr31;
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/*
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/*
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* We can't allow the emulated instruction to leave
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* We can't allow the emulated instruction to leave
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@ -1397,9 +1413,9 @@ asmlinkage void do_cpu(struct pt_regs *regs)
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*/
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*/
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current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
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current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
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if (!process_fpemu_return(sig, fault_addr) && !err)
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/* Send a signal if required. */
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if (!process_fpemu_return(sig, fault_addr, fcr31) && !err)
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mt_ase_fp_affinity();
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mt_ase_fp_affinity();
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}
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break;
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break;
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@ -1076,7 +1076,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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own_fpu(1); /* Restore FPU state. */
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own_fpu(1); /* Restore FPU state. */
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/* Signal if something went wrong. */
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/* Signal if something went wrong. */
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process_fpemu_return(res, fault_addr);
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process_fpemu_return(res, fault_addr, 0);
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if (res == 0)
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if (res == 0)
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break;
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break;
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@ -1511,7 +1511,7 @@ fpu_emul:
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own_fpu(1); /* restore FPU state */
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own_fpu(1); /* restore FPU state */
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/* If something went wrong, signal */
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/* If something went wrong, signal */
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process_fpemu_return(res, fault_addr);
|
process_fpemu_return(res, fault_addr, 0);
|
||||||
|
|
||||||
if (res == 0)
|
if (res == 0)
|
||||||
goto success;
|
goto success;
|
||||||
|
|
Loading…
Reference in New Issue