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Jerry Snitselaar 8aa01872e6 genpt: Generic Page Table base API 
JIRA: https://issues.redhat.com/browse/RHEL-147902
Upstream-Status: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Conflicts: context diff in .clang-format

commit 7c5b184db7145fd417785377337bd15c4fe1d0f4
Author: Jason Gunthorpe <jgg@nvidia.com>
Date: Tue Nov 4 14:29:59 2025 -0400

    genpt: Generic Page Table base API

    The generic API is intended to be separated from the implementation of
    page table algorithms. It contains only accessors for walking and
    manipulating the table and helpers that are useful for building an
    implementation. Memory management is not in the generic API, but part of
    the implementation.

    Using a multi-compilation approach the implementation module would include
    headers in this order:

      common.h
      defs_FMT.h
      pt_defs.h
      FMT.h
      pt_common.h
      IMPLEMENTATION.h

    Where each compilation unit would have a combination of FMT and
    IMPLEMENTATION to produce a per-format per-implementation module.

    The API is designed so that the format headers have minimal logic, and
    default implementations are provided if the format doesn't include one.

    Generally formats provide their code via an inline function using the
    pattern:

      static inline FMTpt_XX(..) {}
      #define pt_XX FMTpt_XX

    The common code then enforces a function signature so that there is no
    drift in function arguments, or accidental polymorphic functions (as has
    been slightly troublesome in mm). Use of function-like #defines are
    avoided in the format even though many of the functions are small enough.

    Provide kdocs for the API surface.

    This is enough to implement the 8 initial format variations with all of
    their features:
     * Entries comprised of contiguous blocks of IO PTEs for larger page
       sizes (AMDv1, ARMv8)
     * Multi-level tables, up to 6 levels. Runtime selected top level
     * The size of the top table level can be selected at runtime (ARM's
       concatenated tables)
     * The number of levels in the table can optionally increase dynamically
       during map (AMDv1)
     * Optional leaf entries at any level
     * 32 bit/64 bit virtual and output addresses, using every bit
     * Sign extended addressing (x86)
     * Dirty tracking

    A basic simple format takes about 200 lines to declare the require inline
    functions.

    Reviewed-by: Kevin Tian <kevin.tian@intel.com>
    Reviewed-by: Pasha Tatashin <pasha.tatashin@soleen.com>
    Reviewed-by: Samiullah Khawaja <skhawaja@google.com>
    Tested-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
    Tested-by: Pasha Tatashin <pasha.tatashin@soleen.com>
    Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
    Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

(cherry picked from commit 7c5b184db7145fd417785377337bd15c4fe1d0f4)
Signed-off-by: Jerry Snitselaar <jsnitsel@redhat.com>
2026-04-06 17:36:29 -07:00

766 lines
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# SPDX-License-Identifier: GPL-2.0
#
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#
# For more information, see:
#
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# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
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- 'kvm_for_each_memslot'
- 'kvm_for_each_memslot_in_gfn_range'
- 'kvm_for_each_vcpu'
- 'libbpf_nla_for_each_attr'
- 'list_for_each'
- 'list_for_each_codec'
- 'list_for_each_codec_safe'
- 'list_for_each_continue'
- 'list_for_each_entry'
- 'list_for_each_entry_continue'
- 'list_for_each_entry_continue_rcu'
- 'list_for_each_entry_continue_reverse'
- 'list_for_each_entry_from'
- 'list_for_each_entry_from_rcu'
- 'list_for_each_entry_from_reverse'
- 'list_for_each_entry_lockless'
- 'list_for_each_entry_rcu'
- 'list_for_each_entry_reverse'
- 'list_for_each_entry_safe'
- 'list_for_each_entry_safe_continue'
- 'list_for_each_entry_safe_from'
- 'list_for_each_entry_safe_reverse'
- 'list_for_each_entry_srcu'
- 'list_for_each_from'
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- 'list_for_each_rcu'
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- 'llist_for_each_entry'
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- 'llist_for_each_safe'
- 'lwq_for_each_safe'
- 'map__for_each_symbol'
- 'map__for_each_symbol_by_name'
- 'mas_for_each'
- 'mci_for_each_dimm'
- 'media_device_for_each_entity'
- 'media_device_for_each_intf'
- 'media_device_for_each_link'
- 'media_device_for_each_pad'
- 'media_entity_for_each_pad'
- 'media_pipeline_for_each_entity'
- 'media_pipeline_for_each_pad'
- 'mlx5_lag_for_each_peer_mdev'
- 'msi_domain_for_each_desc'
- 'msi_for_each_desc'
- 'mt_for_each'
- 'nanddev_io_for_each_page'
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- 'nla_for_each_attr'
- 'nla_for_each_attr_type'
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- 'nr_neigh_for_each'
- 'nr_neigh_for_each_safe'
- 'nr_node_for_each'
- 'nr_node_for_each_safe'
- 'of_for_each_phandle'
- 'of_property_for_each_string'
- 'of_property_for_each_u32'
- 'pci_bus_for_each_resource'
- 'pci_dev_for_each_resource'
- 'pcl_for_each_chunk'
- 'pcl_for_each_segment'
- 'pcm_for_each_format'
- 'perf_config_items__for_each_entry'
- 'perf_config_sections__for_each_entry'
- 'perf_config_set__for_each_entry'
- 'perf_cpu_map__for_each_cpu'
- 'perf_cpu_map__for_each_cpu_skip_any'
- 'perf_cpu_map__for_each_idx'
- 'perf_evlist__for_each_entry'
- 'perf_evlist__for_each_entry_reverse'
- 'perf_evlist__for_each_entry_safe'
- 'perf_evlist__for_each_evsel'
- 'perf_evlist__for_each_mmap'
- 'perf_hpp_list__for_each_format'
- 'perf_hpp_list__for_each_format_safe'
- 'perf_hpp_list__for_each_sort_list'
- 'perf_hpp_list__for_each_sort_list_safe'
- 'perf_tool_event__for_each_event'
- 'plist_for_each'
- 'plist_for_each_continue'
- 'plist_for_each_entry'
- 'plist_for_each_entry_continue'
- 'plist_for_each_entry_safe'
- 'plist_for_each_safe'
- 'pnp_for_each_card'
- 'pnp_for_each_dev'
- 'protocol_for_each_card'
- 'protocol_for_each_dev'
- 'queue_for_each_hw_ctx'
- 'radix_tree_for_each_slot'
- 'radix_tree_for_each_tagged'
- 'rb_for_each'
- 'rbtree_postorder_for_each_entry_safe'
- 'rdma_for_each_block'
- 'rdma_for_each_port'
- 'rdma_umem_for_each_dma_block'
- 'resort_rb__for_each_entry'
- 'resource_list_for_each_entry'
- 'resource_list_for_each_entry_safe'
- 'rhl_for_each_entry_rcu'
- 'rhl_for_each_rcu'
- 'rht_for_each'
- 'rht_for_each_entry'
- 'rht_for_each_entry_from'
- 'rht_for_each_entry_rcu'
- 'rht_for_each_entry_rcu_from'
- 'rht_for_each_entry_safe'
- 'rht_for_each_from'
- 'rht_for_each_rcu'
- 'rht_for_each_rcu_from'
- 'rq_for_each_bvec'
- 'rq_for_each_segment'
- 'rq_list_for_each'
- 'rq_list_for_each_safe'
- 'sample_read_group__for_each'
- 'scsi_for_each_prot_sg'
- 'scsi_for_each_sg'
- 'sctp_for_each_hentry'
- 'sctp_skb_for_each'
- 'sec_for_each_insn'
- 'sec_for_each_insn_continue'
- 'sec_for_each_insn_from'
- 'sec_for_each_sym'
- 'shdma_for_each_chan'
- 'shost_for_each_device'
- 'sk_for_each'
- 'sk_for_each_bound'
- 'sk_for_each_entry_offset_rcu'
- 'sk_for_each_from'
- 'sk_for_each_rcu'
- 'sk_for_each_safe'
- 'sk_nulls_for_each'
- 'sk_nulls_for_each_from'
- 'sk_nulls_for_each_rcu'
- 'snd_array_for_each'
- 'snd_pcm_group_for_each_entry'
- 'snd_soc_dapm_widget_for_each_path'
- 'snd_soc_dapm_widget_for_each_path_safe'
- 'snd_soc_dapm_widget_for_each_sink_path'
- 'snd_soc_dapm_widget_for_each_source_path'
- 'sparsebit_for_each_set_range'
- 'strlist__for_each_entry'
- 'strlist__for_each_entry_safe'
- 'sym_for_each_insn'
- 'sym_for_each_insn_continue_reverse'
- 'symbols__for_each_entry'
- 'tb_property_for_each'
- 'tcf_act_for_each_action'
- 'tcf_exts_for_each_action'
- 'ttm_resource_manager_for_each_res'
- 'udp_portaddr_for_each_entry'
- 'udp_portaddr_for_each_entry_rcu'
- 'usb_hub_for_each_child'
- 'v4l2_device_for_each_subdev'
- 'v4l2_m2m_for_each_dst_buf'
- 'v4l2_m2m_for_each_dst_buf_safe'
- 'v4l2_m2m_for_each_src_buf'
- 'v4l2_m2m_for_each_src_buf_safe'
- 'virtio_device_for_each_vq'
- 'while_for_each_ftrace_op'
- 'xa_for_each'
- 'xa_for_each_marked'
- 'xa_for_each_range'
- 'xa_for_each_start'
- 'xas_for_each'
- 'xas_for_each_conflict'
- 'xas_for_each_marked'
- 'xbc_array_for_each_value'
- 'xbc_for_each_key_value'
- 'xbc_node_for_each_array_value'
- 'xbc_node_for_each_child'
- 'xbc_node_for_each_key_value'
- 'xbc_node_for_each_subkey'
- 'ynl_attr_for_each'
- 'ynl_attr_for_each_nested'
- 'ynl_attr_for_each_payload'
- 'zorro_for_each_dev'
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