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Merge: net: stmmac: backport multi-channel IRQs patches

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MR: https://gitlab.com/redhat/centos-stream/src/kernel/centos-stream-10/-/merge_requests/3360

## Summary of Changes

Backport multi-channel IRQ support in `dwmac-s32`.

## Approved Development Ticket(s)

JIRA: https://redhat.atlassian.net/browse/RHEL-168971

Signed-off-by: Jared Kangas <jkangas@redhat.com>

Approved-by: Michal Schmidt <mschmidt@redhat.com>
Approved-by: Eric Chanudet <echanude@redhat.com>
Approved-by: CKI KWF Bot <cki-ci-bot+kwf-gitlab-com@redhat.com>

Merged-by: CKI GitLab Kmaint Pipeline Bot <26919896-cki-kmaint-pipeline-bot@users.noreply.gitlab.com>
This commit is contained in:
CKI KWF Bot
2026-09-04 06:45:37 +00:00
parent c479115f05 27202383c0
commit ce98a89dba
3 changed files with 133 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
+42 -5
View File
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2021-2024 NXP
# Copyright 2021-2026 NXP
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
@@ -16,6 +16,8 @@ description:
the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
interface over Pinctrl device or the output can be routed
to the embedded SerDes for SGMII connectivity.
The DWMAC instances have connected all RX/TX queues interrupts,
enabling load balancing of data traffic across all CPU cores.
properties:
compatible:
@@ -45,10 +47,25 @@ properties:
FlexTimer Modules connect to GMAC_0.
interrupts:
maxItems: 1
minItems: 1
maxItems: 11
interrupt-names:
const: macirq
oneOf:
- items:
- const: macirq
- items:
- const: macirq
- const: tx-queue-0
- const: rx-queue-0
- const: tx-queue-1
- const: rx-queue-1
- const: tx-queue-2
- const: rx-queue-2
- const: tx-queue-3
- const: rx-queue-3
- const: tx-queue-4
- const: rx-queue-4
clocks:
items:
@@ -88,8 +105,28 @@ examples:
<0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */
nxp,phy-sel = <&gpr 0x4>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 0: tx, rx */
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 1: tx, rx */
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 2: tx, rx */
<GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 3: tx, rx */
<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 4: tx, rx */
<GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq",
"tx-queue-0", "rx-queue-0",
"tx-queue-1", "rx-queue-1",
"tx-queue-2", "rx-queue-2",
"tx-queue-3", "rx-queue-3",
"tx-queue-4", "rx-queue-4";
snps,mtl-rx-config = <&mtl_rx_setup>;
snps,mtl-tx-config = <&mtl_tx_setup>;
clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>;
drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c
+35 -1
View File
@@ -2,7 +2,7 @@
/*
* NXP S32G/R GMAC glue layer
*
* Copyright 2019-2024 NXP
* Copyright 2019-2026 NXP
*
*/
@@ -110,6 +110,37 @@ static void s32_gmac_exit(struct platform_device *pdev, void *priv)
clk_disable_unprepare(gmac->rx_clk);
}
static void s32_gmac_setup_multi_irq(struct device *dev,
struct plat_stmmacenet_data *plat,
struct stmmac_resources *res)
{
int i;
/* RX IRQs */
for (i = 0; i < plat->rx_queues_to_use; i++) {
if (res->rx_irq[i] <= 0) {
dev_dbg(dev, "Missing RX queue %d interrupt\n", i);
goto mac_irq_mode;
}
}
/* TX IRQs */
for (i = 0; i < plat->tx_queues_to_use; i++) {
if (res->tx_irq[i] <= 0) {
dev_dbg(dev, "Missing TX queue %d interrupt\n", i);
goto mac_irq_mode;
}
}
plat->flags |= STMMAC_FLAG_MULTI_MSI_EN;
dev_info(dev, "Multi-IRQ mode (per queue IRQs) selected\n");
return;
mac_irq_mode:
plat->flags &= ~STMMAC_FLAG_MULTI_MSI_EN;
dev_info(dev, "MAC IRQ mode selected\n");
}
static int s32_dwmac_probe(struct platform_device *pdev)
{
struct plat_stmmacenet_data *plat;
@@ -165,6 +196,9 @@ static int s32_dwmac_probe(struct platform_device *pdev)
plat->core_type = DWMAC_CORE_GMAC4;
plat->pmt = 1;
plat->flags |= STMMAC_FLAG_SPH_DISABLE;
s32_gmac_setup_multi_irq(dev, plat, &res);
plat->rx_fifo_size = 20480;
plat->tx_fifo_size = 20480;
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+56 -1
View File
@@ -733,9 +733,47 @@ struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,
}
EXPORT_SYMBOL_GPL(stmmac_pltfr_find_clk);
/**
* stmmac_pltfr_get_irq_array - Read per-channel IRQs from platform device
* @pdev: platform device
* @fmt: IRQ name format string (e.g., "tx-queue-%d")
* @irqs: array to store IRQ numbers
* @num: maximum number of IRQs to read
*
* Return: 0 on success, -EPROBE_DEFER if IRQ is deferred, -EINVAL on error.
* Missing IRQs are set to 0 and iteration stops at first missing IRQ.
*/
static int stmmac_pltfr_get_irq_array(struct platform_device *pdev,
const char *fmt, int *irqs, size_t num)
{
char name[16];
int i;
for (i = 0; i < num; i++) {
if (snprintf(name, sizeof(name), fmt, i) >= sizeof(name))
return -EINVAL;
irqs[i] = platform_get_irq_byname_optional(pdev, name);
if (irqs[i] == -EPROBE_DEFER)
return -EPROBE_DEFER;
if (irqs[i] <= 0) {
dev_dbg(&pdev->dev, "IRQ %s not found\n", name);
/* Stop silently on first unset irq */
irqs[i] = 0;
break;
}
}
return 0;
}
int stmmac_get_platform_resources(struct platform_device *pdev,
struct stmmac_resources *stmmac_res)
{
int ret;
memset(stmmac_res, 0, sizeof(*stmmac_res));
/* Get IRQ information early to have an ability to ask for deferred
@@ -779,7 +817,24 @@ int stmmac_get_platform_resources(struct platform_device *pdev,
stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
return PTR_ERR_OR_ZERO(stmmac_res->addr);
if (IS_ERR(stmmac_res->addr))
return PTR_ERR(stmmac_res->addr);
/* TX channels irq */
ret = stmmac_pltfr_get_irq_array(pdev, "tx-queue-%d",
stmmac_res->tx_irq,
MTL_MAX_TX_QUEUES);
if (ret)
return ret;
/* RX channels irq */
ret = stmmac_pltfr_get_irq_array(pdev, "rx-queue-%d",
stmmac_res->rx_irq,
MTL_MAX_RX_QUEUES);
if (ret)
return ret;
return 0;
}
EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);