qiurui/Centos-kernel-stream-10
1
0
Fork 0
mirror of https://gitlab.com/redhat/centos-stream/src/kernel/centos-stream-10.git synced 2026-09-09 00:07:04 +08:00
Code Issues Packages Projects Releases Wiki Activity

net: stmmac: visconti: use stmmac_get_phy_intf_sel()

Browse Source 
JIRA: https://issues.redhat.com/browse/RHEL-128151

commit ccb4ff9f24e23f3599dd13e124f0c7cd29380df3
Author: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Date:   Tue Nov 11 08:12:48 2025 +0000

    net: stmmac: visconti: use stmmac_get_phy_intf_sel()

    Use stmmac_get_phy_intf_sel() to decode the PHY interface mode to the
    phy_intf_sel value, validate the result and use that to set the
    control register to select the operating mode for the DWMAC core.

    Note that this will allow GMII as well as MII as the phy_intf_sel
    value is the same for both.

    Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
    Link: https://patch.msgid.link/E1vIjUe-0000000DquB-3JDY@rmk-PC.armlinux.org.uk
    Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Signed-off-by: Izabela Bakollari <ibakolla@redhat.com>
This commit is contained in:
Izabela Bakollari
2026-04-29 09:46:44 +02:00
parent e2b6a8e1d9
commit 19356d52f1
1 changed files with 5 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c
+5 -19
View File
@@ -42,10 +42,6 @@
#define ETHER_CLK_SEL_RX_TX_CLK_EN (ETHER_CLK_SEL_RX_CLK_EN | ETHER_CLK_SEL_TX_CLK_EN)
#define ETHER_CONFIG_INTF_MII PHY_INTF_SEL_GMII_MII
#define ETHER_CONFIG_INTF_RGMII PHY_INTF_SEL_RGMII
#define ETHER_CONFIG_INTF_RMII PHY_INTF_SEL_RMII
struct visconti_eth {
void __iomem *reg;
struct clk *phy_ref_clk;
@@ -150,22 +146,12 @@ static int visconti_eth_init_hw(struct platform_device *pdev, struct plat_stmmac
{
struct visconti_eth *dwmac = plat_dat->bsp_priv;
unsigned int clk_sel_val;
u32 phy_intf_sel;
int phy_intf_sel;
switch (plat_dat->phy_interface) {
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
phy_intf_sel = ETHER_CONFIG_INTF_RGMII;
break;
case PHY_INTERFACE_MODE_MII:
phy_intf_sel = ETHER_CONFIG_INTF_MII;
break;
case PHY_INTERFACE_MODE_RMII:
phy_intf_sel = ETHER_CONFIG_INTF_RMII;
break;
default:
phy_intf_sel = stmmac_get_phy_intf_sel(plat_dat->phy_interface);
if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &&
phy_intf_sel != PHY_INTF_SEL_RGMII &&
phy_intf_sel != PHY_INTF_SEL_RMII) {
dev_err(&pdev->dev, "Unsupported phy-mode (%d)\n", plat_dat->phy_interface);
return -EOPNOTSUPP;
}